17815915. ISOLATION REGIONS WITHIN A MEMORY DIE simplified abstract (Micron Technology, Inc.)
Contents
ISOLATION REGIONS WITHIN A MEMORY DIE
Organization Name
Inventor(s)
Raja Kumar Varma Manthena of Boise ID (US)
Yoshiaki Fukuzumi of Yokohama (JP)
ISOLATION REGIONS WITHIN A MEMORY DIE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17815915 titled 'ISOLATION REGIONS WITHIN A MEMORY DIE
Simplified Explanation
Methods, systems, and devices for isolating regions within a memory die are described in this patent application. The fabrication process involves forming memory pillars through a stack of material in multiple regions of the memory die. This can be achieved by creating a first plurality of trenches in one direction and a second plurality of trenches in another direction through the stack of material.
To create isolation regions, first voids are formed through the first plurality of trenches, and a dielectric material is deposited in both the first voids and the first plurality of trenches. This forms the first isolation regions. Then, second voids are formed through the second plurality of trenches, and a dielectric material is deposited in both the second voids and the second plurality of trenches, forming the second isolation regions.
Bullet points to explain the patent/innovation:
- Memory pillars are formed through a stack of material in multiple regions of a memory die.
- First and second pluralities of trenches are created through the stack of material.
- First voids are formed through the first pluralities of trenches, and a dielectric material is deposited in them, forming first isolation regions.
- Second voids are formed through the second pluralities of trenches, and a dielectric material is deposited in them, forming second isolation regions.
Potential applications of this technology:
- Memory die fabrication for various electronic devices such as computers, smartphones, and tablets.
- Improving the performance and reliability of memory systems by isolating different regions within the memory die.
Problems solved by this technology:
- Ensuring proper isolation between different regions of a memory die to prevent interference and improve overall performance.
- Enhancing the reliability and durability of memory systems by reducing the risk of cross-talk and electrical interference.
Benefits of this technology:
- Improved memory system performance due to better isolation between different regions.
- Increased reliability and longevity of memory systems by minimizing the risk of electrical interference.
- Enables more efficient use of space within the memory die by isolating different regions without compromising functionality.
Original Abstract Submitted
Methods, systems, and devices for isolation regions within a memory die are described. During fabrication, memory pillars may be formed through a stack of material in a plurality regions of a memory die. In some cases, a first plurality of trenches extending in a first direction and a second plurality of trenches extending in a second direction may be formed through the stack of material (e.g., interposed between the plurality of regions). Additionally or alternatively, first voids may be formed via the first plurality of trenches, and a dielectric material may be deposited in the first voids and the first plurality of trenches, forming first isolation regions. Then, second voids may be formed via the second plurality of trenches, and a dielectric material may be deposited in the second voids and the second plurality of trenches, forming second isolation regions.
