SEARCH RESULTS for assignor:"CHEN, KUEI-SHUN"

Showing 1 to 10 of 10 results

Last Update Patent(s) Assignor(s) Orig. Assignee(s) Assignee(s) Reel/Frame
21-Jun-2018

(X0) 15474522: Pattern Fidelity Enhancement with Directional Patterning Technology

(A1) 20180174853: Pattern Fidelity Enhancement with Directional Patterning Technology

SHEN, YU-TIEN

HUNG, CHI-CHENG

LIN, CHIN-HSIANG

WANG, CHIEN-WEI

CHANG, CHING-YU

TING, CHIH-YUAN

CHEN, KUEI-SHUN

LIU, RU-GUN

LIN, WEI-LIANG

CHANG, YA HUI

LUNG, YUAN-HSIANG

CHEN, YEN-MING

YEN, YUNG-SUNG

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

42243/63

21-Jun-2018

(X0) 15474522: Pattern Fidelity Enhancement with Directional Patterning Technology

(A1) 20180174853: Pattern Fidelity Enhancement with Directional Patterning Technology

SHEN, YU-TIEN

HUNG, CHI-CHENG

LIN, CHIN-HSIANG

WANG, CHIEN-WEI

CHANG, CHING-YU

TING, CHIH-YUAN

CHEN, KUEI-SHUN

LIU, RU-GUN

LIN, WEI-LIANG

CHANG, YA HUI

LUNG, YUAN-HSIANG

CHEN, YEN-MING

YEN, YUNG-SUNG

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

41801/152

22-May-2018

(X0) 15352118: FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE USING PATTERNING STACKS

(A1) 20180138034: FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE USING PATTERNING STACKS

(B2) 9: FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE USING PATTERNING STACKS

LIN, LI-YEN

CHANG, CHING-YU

CHEN, KUEI-SHUN

LIN, CHIN-HSIANG

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

40351/306

17-Apr-2018

(X0) 14801383: Method and Structure for Mandrel and Spacer Patterning

(A1) 20170017745: Method and Structure for Mandrel and Spacer Patterning

(B2) 9: Method and Structure for Mandrel and Spacer Patterning

WANG, CHUNG-MING

PENG, CHIH-HSIUNG

CHANG, CHI-KANG

CHEN, KUEI-SHUN

FU, SHIH-CHI

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

37028/52

17-Apr-2018

(X0) 15250023: DUMMY GATE STRUCTURE AND METHODS THEREOF

(A1) 20160365428: DUMMY GATE STRUCTURE AND METHODS THEREOF

(B2) 9: DUMMY GATE STRUCTURE AND METHODS THEREOF

LIU, CHIA-CHU

CHEN, KUEI-SHUN

CHIANG, MU-CHI

CHEN, CHAO-CHENG

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

39567/882

10-Apr-2018

(X0) 14841173: Method for Integrated Circuit Patterning

(A1) 20170062222: Method for Integrated Circuit Patterning

(B2) 9: Method for Integrated Circuit Patterning

YANG, TSUNG-LIN

CHEN, HUA FENG

HSIEH, MIN-YANN

LI, PO-HSUEH

FU, SHIH-CHI

CHEN, KUEI-SHUN

LUNG, YUAN-HSIANG

TSAI, YAN-TSO

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

36548/145

05-Apr-2018

(X0) 15411613: Method for Improving Circuit Layout for Manufacturability

(A1) 20180096090: Method for Improving Circuit Layout for Manufacturability

WU, YUN-LIN

KUO, CHENG-CHENG

CHIANG, CHIA-PING

HSU, CHIH-WEI

LIN, HUA-TAI

CHEN, KUEI-SHUN

LUNG, YUAN-HSIANG

TSAI, YAN-TSO

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

41029/354

29-Mar-2018

(X0) 15395310: Directional Patterning Methods

(A1) 20180090370: Directional Patterning Methods

HUNG, CHI-CHENG

LIU, RU-GUN

LIN, WEI-LIANG

YU, TA-CHING

YEN, YUNG-SUNG

FANG, ZIWEI

GAU, TSAI-SHENG

LIN, CHIN-HSIANG

CHEN, KUEI-SHUN

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

41986/832

26-Feb-2018

(X0) 15720593: SEMICONDUCTOR DEVICE HAVING NON-ORTHOGONAL ELEMENT

(A1) 20180025968: SEMICONDUCTOR DEVICE HAVING NON-ORTHOGONAL ELEMENT

LIU, CHIA-CHU

YEH, SHIAO-CHIAN

WU, HONG-JANG

CHEN, KUEI-SHUN

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

45016/80

08-Feb-2018

(X0) 15783448: Method and Structure for Gap Filling Improvement

(A1) 20180040617: Method and Structure for Gap Filling Improvement

SU, YING-HAO

SU, YU-CHUNG

LIU, YU-LUN

CHANG, CHI-KANG

LIU, CHIA-CHU

CHEN, KUEI-SHUN

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

43861/458