SEARCH RESULTS for assignee:"SHANGHAI HUALI MICROELECTRONICS CORPORATION"

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(X0) 15800071: OPTIMIZATION METHOD AND SEYSTEM FOR OVERLAY ERROR COMPENSATION

(A1) 20180275529: OPTIMIZATION METHOD AND SEYSTEM FOR OVERLAY ERROR COMPENSATION

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(X0) 15429194: HIGH PRESSURE LOW THERMAL BUDGE HIGH-K POST ANNEALING PROCESS

(A1) 20180175195: HIGH PRESSURE LOW THERMAL BUDGE HIGH-K POST ANNEALING PROCESS

(B2) 1: HIGH PRESSURE LOW THERMAL BUDGE HIGH-K POST ANNEALING PROCESS

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(X0) 15283286: SIMULATION METHOD OF CMP PROCESS

(A1) 20180032648: SIMULATION METHOD OF CMP PROCESS

(B2) 1: SIMULATION METHOD OF CMP PROCESS

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(X0) 15659577: STRUCTURE AND GENERATION METHOD OF CLOCK DISTRIBUTION NETWORK

(A1) 20180260507: STRUCTURE AND GENERATION METHOD OF CLOCK DISTRIBUTION NETWORK

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(X0) 15937881: DESIGN OF EMBEDDED SIGE EPITAXY TEST PAD

(A1) 20180240718: DESIGN OF EMBEDDED SIGE EPITAXY TEST PAD

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(X0) 14691516: EMBEDDED SIGE EPITAXY TEST PAD

(A1) 20160225678: EMBEDDED SIGE EPITAXY TEST PAD

(B2) 1: EMBEDDED SIGE EPITAXY TEST PAD

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(X0) 15429188: METHODS FOR FABRICATING METAL GATE STRUCTURES

(A1) 20180174923: METHODS FOR FABRICATING METAL GATE STRUCTURES

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(X0) 15429191: HIGH PRESSURE LOW THERMAL BUDGE HIGH-K POST ANNEALING PROCESS

(A1) 20180174848: HIGH PRESSURE LOW THERMAL BUDGE HIGH-K POST ANNEALING PROCESS

(B2) 1: HIGH PRESSURE LOW THERMAL BUDGE HIGH-K POST ANNEALING PROCESS

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(X0) 15429192: METHOD FOR AVOIDING IL REGROWN IN A HKMG PROCESS

(A1) 20180175157: METHOD FOR AVOIDING IL REGROWN IN A HKMG PROCESS

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(X0) 15429193: INTEGRATION PROCESS OF FINFET SPACER FORMATION

(A1) 20180175169: INTEGRATION PROCESS OF FINFET SPACER FORMATION

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(A1) 20180174924: FABRICATION TECHNOLOGY FOR METAL GATE

(X0) 15429195: FABRICATION TECHNOLOGY FOR METAL GATE

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(X0) 15241284: METHOD OF PREPARING A PLAN-VIEW TRANSMISSION ELECTRON MICROSCOPE SAMPLE USED IN AN INTEGRATED CIRCUIT ANALYSIS

(A1) 20170053778: METHOD OF PREPARING A PLAN-VIEW TRANSMISSION ELECTRON MICROSCOPE SAMPLE USED IN AN INTEGRATED CIRCUIT ANALYSIS

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(X0) 15390528: SIGE SOURCE/DRAIN STRUCTURE AND PREPARATION METHOD THEREOF

(A1) 20180158951: SIGE SOURCE/DRAIN STRUCTURE AND PREPARATION METHOD THEREOF

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(X0) 15385884: METHOD FOR FORMING HIGH ASPECT RATIO PATTERNING STRUCTURE

(A1) 20180144929: METHOD FOR FORMING HIGH ASPECT RATIO PATTERNING STRUCTURE

(B2) 9: METHOD FOR FORMING HIGH ASPECT RATIO PATTERNING STRUCTURE

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(X0) 15333105: PHOTORESIST BOTTLE CAPABLE OF IMPROVING POOR COATING COVERAGE

(A1) 20170123311: PHOTORESIST BOTTLE CAPABLE OF IMPROVING POOR COATING COVERAGE

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(X0) 15283271: METHOD FOR FORMING SHALLOW TRENCHES OF THE DUAL ACTIVE REGIONS

(B1) 9: METHOD FOR FORMING SHALLOW TRENCHES OF THE DUAL ACTIVE REGIONS

(A1) 20180033810: METHOD FOR FORMING SHALLOW TRENCHES OF THE DUAL ACTIVE REGIONS

(B2) 9: METHOD FOR FORMING SHALLOW TRENCHES OF THE DUAL ACTIVE REGIONS