US Patent Application 18448285. SEMICONDUCTOR DEVICE simplified abstract

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SEMICONDUCTOR DEVICE

Organization Name

ROHM CO., LTD.

Inventor(s)

Naoki Takahashi of Kyoto (JP)

SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18448285 titled 'SEMICONDUCTOR DEVICE

Simplified Explanation

The patent application describes a semiconductor device with two insulated-gate transistors, a charger-discharger, and a gate voltage correction circuit.

  • The device has two transistors connected in parallel, allowing for increased power handling capability.
  • A charger-discharger is included to control the charging and discharging of the gates of the transistors.
  • The charger-discharger can perform three types of control: charging both gates, discharging both gates, or charging only one gate.
  • A gate voltage correction circuit is implemented to ensure that the gate voltages of the transistors are equalized.
  • This correction circuit eliminates any voltage differences between the gates during charging, discharging, or protection operations.
  • The protection operation refers to a scenario where the transistors are intentionally kept off to prevent damage or malfunction.
  • The gate voltage correction circuit ensures that the transistors are properly controlled and protected.


Original Abstract Submitted

A semiconductor device includes first and second insulated-gate transistors in parallel with each other, a charger-discharger, and a gate voltage correction circuit. The charger-discharger can perform first control to charge both of the gates of the first and second transistors, second control to discharge both of the gates of the first and second transistors, and third control to charge one of the gates of the first and second transistors. The gate voltage correction circuit corrects the gate voltages of the first and second transistors to eliminate the difference between those voltages in at least one of the first control, the second control, and protection operation in which the first and second transistors are forcibly kept off.