View source for US Patent Application 18224079. PIXEL OF A DISPLAY DEVICE, AND DISPLAY DEVICE simplified abstract

=PIXEL OF A DISPLAY DEVICE, AND DISPLAY DEVICE=


==Organization Name==

[[Samsung Display Co., Ltd.]]


==Inventor(s)==

[[MINJAE Jeong of Hwaseong-si (KR)]]

[[JANGMI Kang of Seoul (KR)]]

[[HYEONGSEOK Kim of Hwaseong-si (KR)]]

[[JUNHYUN Park of Suwon-si (KR)]]

[[MUKYUNG Jeon of Ulsan (KR)]]

==PIXEL OF A DISPLAY DEVICE, AND DISPLAY DEVICE - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18224079 titled 'PIXEL OF A DISPLAY DEVICE, AND DISPLAY DEVICE

==Simplified Explanation==

The abstract describes a pixel of a display device that includes several transistors and components to control the display and emit light. 

* The pixel includes a first transistor with a top gate, first and second terminals, and a bottom gate.
* A second transistor is connected to a writing signal line, a data line, and the first node of the first transistor.
* A storage capacitor is connected between the first and second nodes of the first transistor.
* A light emitting element is connected between the second node and a second power supply voltage line.
* A seventh transistor is connected to an initialization signal line, a bias voltage line, and the bottom gate of the first transistor.


==Original Abstract Submitted==

A pixel of a display device includes a first transistor including a top gate coupled to a first node, a first terminal, a second terminal coupled to a second node, and a bottom gate, a second transistor including a gate coupled to a writing signal line, a first terminal coupled to a data line, and a second terminal coupled to the first node, a storage capacitor coupled between the first node and the second node, a light emitting element coupled between the second node and a second power supply voltage line, and a seventh transistor including a gate coupled to an initialization signal line, a first terminal coupled to a bias voltage line, and a second terminal coupled to the bottom gate.