Texas instruments incorporated (20240320154). MULTI-LEVEL CACHE SECURITY simplified abstract

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MULTI-LEVEL CACHE SECURITY

Organization Name

texas instruments incorporated

Inventor(s)

Abhijeet Ashok Chachad of Plano TX (US)

David Matthew Thompson of Dallas TX (US)

Naveen Bhoria of Plano TX (US)

MULTI-LEVEL CACHE SECURITY - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240320154 titled 'MULTI-LEVEL CACHE SECURITY

The abstract of the patent application describes a system with first and second level memories, memory controllers, and a shadow cache. The system can determine if a read operation with secure code matches an address in the shadow cache and the secure code of a cache line.

  • Simplified Explanation: The patent application describes a system that can verify the security of read operations by comparing addresses and secure codes.
  • Key Features and Innovation:

- System with first and second level memories - Memory controllers for each memory - Shadow cache for security verification - Comparison of addresses and secure codes for read operations

  • Potential Applications:

- Data security in memory systems - Secure data retrieval processes - Enhanced security measures in computing systems

  • Problems Solved:

- Ensuring data security during read operations - Preventing unauthorized access to sensitive information - Improving overall system security

  • Benefits:

- Enhanced data protection - Secure data retrieval processes - Improved system security measures

  • Commercial Applications:

- Data centers - Financial institutions - Government agencies

  • Prior Art:

- Research on memory security measures - Studies on data protection in computing systems

  • Frequently Updated Research:

- Ongoing developments in memory security technology - Research on improving data protection measures

Questions about memory security technology: 1. How does the system verify the security of read operations? - The system compares addresses and secure codes to determine if a read operation is secure.

2. What are the potential applications of this technology? - This technology can be applied in data centers, financial institutions, and government agencies for enhanced data security.


Original Abstract Submitted

an example system includes first and second level memories and first and second memory controllers respectively coupled thereto. the system also includes a shadow cache associated with the second level memory and coupled to the second memory controller, which is also coupled to the first memory controller. in response to a generated read operation that includes a secure code, the second memory controller determines whether an address of the read operation matches an address that is tagged in the shadow cache; and determine whether the secure code of the read operation matches a secure code of a cache line hit by the read operation. the second memory controller then performs one of two sets of additional operations, depending on whether or not the address of the read operation matches the address tagged in the shadow cache and whether or not the secure code of the read operation matches the secure code of the cache line.