Tesla, Inc. patent applications on October 24th, 2024

Patent Applications by Tesla, Inc. on October 24th, 2024

Tesla, Inc.: 9 patent applications

Tesla, Inc. has applied for patents in the areas of H01R12/71 (2), H05K7/20 (2), B60R21/203 (1), H01M4/38 (1), H05K1/02 (1) B60R21/203 (1), G06F1/26 (1), G06V20/70 (1), H01M10/0525 (1), H01R12/716 (1)

With keywords such as: array, electronic, electrode, computing, components, layer, data, electronics, include, and node in patent application abstracts.

Patent Applications by Tesla, Inc.

20240353905. COMPUTING SYSTEM WITH VERTICAL CLOCK DELIVERY ARCHITECTURE_simplified_abstract_(tesla, inc.)

Inventor(s): Jin Zhao of San Jose CA (US) for tesla, inc., Raghuvir Ramachandran of Los Gatos CA (US) for tesla, inc., Shishuang Sun of Cupertino CA (US) for tesla, inc., William Chang of Palo Alto CA (US) for tesla, inc., Timothy Fischer of Denver CO (US) for tesla, inc.

IPC Code(s): G06F1/26

CPC Code(s): G06F1/26

Abstract: systems and methods of for vertical power and clock delivery are disclosed. in some embodiments, a computing system can include an array of chips comprising a chip and a power delivery module configured to provide a power supply voltage and one or more clock signals to the chip, the power delivery module being positioned vertically relative to the chip, and the chip configured to vertically receive the one or more clock signals from the power delivery module.

20240355132. VISION-BASED SYSTEM TRAINING WITH SIMULATED CONTENT_simplified_abstract_(tesla, inc.)

Inventor(s): Pengfei Phil Duan of Austin TX (US) for tesla, inc., Nishant Desai of Austin TX (US) for tesla, inc., Phillip Lee of Austin TX (US) for tesla, inc.

IPC Code(s): G06V20/70, G06V10/774, G06V20/56

CPC Code(s): G06V20/70

Abstract: aspects of the present application correspond to utilization of a combined set of inputs to generate or train machine learned algorithms for utilization in vehicles with vision system-only based processing. a network service can receive a first set of inputs (e.g., a first data set) from a target vehicle including captured vision system data at a first point in time. the network service can receive a second set of inputs (e.g., a second data set) from the target vehicle including captured vision system data at a second point in time. the second point in time is subsequent to the first point in time. based on the second set of ground truth labels and values, the network service can then determine or derive labels and associated values for the first set of ground truth labels and values.

20240356059. PRELITHIATED HYBRIDIZED ENERGY STORAGE DEVICE_simplified_abstract_(tesla, inc.)

Inventor(s): Hieu Minh Duong of Rosemead CA (US) for tesla, inc., Porter Mitchell of Chandler AZ (US) for tesla, inc., Mohammed-Yazid Saidi of La Mesa CA (US) for tesla, inc., Joon Ho Shin of San Diego CA (US) for tesla, inc., Haim Feigenbaum of Irvine CA (US) for tesla, inc.

IPC Code(s): H01M10/0525, H01M4/04, H01M4/133, H01M4/134, H01M4/1393, H01M4/1395, H01M4/36, H01M4/38, H01M4/587, H01M4/62

CPC Code(s): H01M10/0525

Abstract: an energy storage device can include a first electrode, a second electrode and a separator between the first electrode and the second electrode wherein the first electrode includes an electrochemically active material and a porous carbon material, and the second electrode includes elemental lithium metal and carbon particles. a method for fabricating an energy storage device can include forming a first electrode and a second electrode, and inserting a separator between the first electrode and the second electrode, where forming the first electrode includes combining an electrochemically active material and a porous carbon material, and forming the second electrode includes combining elemental lithium metal and a plurality of carbon particles.

20240356255. ARRAY OF COMPLIANT CONNECTORS FOR ELECTRONIC ASSEMBLIES_simplified_abstract_(tesla, inc.)

Inventor(s): Rishabh Bhandari of San Carlos CA (US) for tesla, inc., Yong guo Li of Gilroy CA (US) for tesla, inc., Mohamed Haitham Helmy Nasr of Sunnyvale CA (US) for tesla, inc., Samuel Lichy of San Jose CA (US) for tesla, inc., Aydin Nabovati of Toronto (CA) for tesla, inc., Shiva Farzinazar of Santa Clara CA (US) for tesla, inc., Mitchell Heschke of Los Altos Hills CA (US) for tesla, inc.

IPC Code(s): H01R12/71, H01R13/24, H01R13/46, H05K7/20

CPC Code(s): H01R12/716

Abstract: an array of compliant connectors for electronic assemblies is provided. in one aspect, a system includes an array of first electronic components and an array of second electronic components. each of the second electronic components is paired with corresponding to one of the first electronic components. each pair of the first and second electronic components is coupled via a plurality of compliant connectors.

20240356285. CONNECTOR SYSTEM FOR CONNECTING PROCESSOR SYSTEMS AND RELATED METHODS_simplified_abstract_(tesla, inc.)

Inventor(s): Yong guo Li of Gilroy CA (US) for tesla, inc., Peter Groen of Palo Alto CA (US) for tesla, inc., Rishabh Bhandari of San Carlos CA (US) for tesla, inc., Aydin Nabovati of Toronto (CA) for tesla, inc., Xuyang Zhang of San Jose CA (US) for tesla, inc.

IPC Code(s): H01R13/631, H01R12/71, H01R13/518

CPC Code(s): H01R13/6315

Abstract: a connector system is disclosed. the connector system can include a support structure, a holder coupled to the support structure, an alignment adjustment structure positioned between the support structure and the holder, and an actuator. the holder can receive a first connector of a connection line. the alignment adjustment structure is compressible along a first axis and movable along a second axis different from the first axis. the actuator is configured to provide movement of the holder so as to connect the first connector to a second connector of a processor system, such as a system on wafer (sow) assembly.

20240356867. COMMUNICATION LATENCY MITIGATION FOR ON-CHIP NETWORKS_simplified_abstract_(tesla, inc.)

Inventor(s): Douglas R. Williams of Mountain View CA (US) for tesla, inc.

IPC Code(s): H04L49/109, H04L45/745

CPC Code(s): H04L49/109

Abstract: this application relates to systems and methods for reduced latency in arrays of computing nodes. in some embodiments, a method of routing data can include outputting a first bypass signal and a second bypass signal from a first computing node of an array of computing nodes, wherein the first bypass signal indicates to route packet data through a second computing node and the second bypass signal indicates to turn the packet data in a third computing node. the packet can be routed through the second node based on the first bypass signal in a single clock cycle, and the packet can be routed from the second computing node to the third computing node in a single clock cycle. the second computing node receives the first bypass signal by way of a faster route than it receives the packet data.

20240357729. COLD PLATE HAVING OPENING AND RELATED SYSTEMS_simplified_abstract_(tesla, inc.)

Inventor(s): Mohamed Haitham Helmy Nasr of Sunnyvale CA (US) for tesla, inc., Samuel Lichy of San Jose CA (US) for tesla, inc., Aydin Nabovati of Toronto (CA) for tesla, inc., Rishabh Bhandari of San Carlos CA (US) for tesla, inc., Yong guo Li of Gilroy CA (US) for tesla, inc., Zheng Gao of Sunnyvale CA (US) for tesla, inc.

IPC Code(s): H05K1/02, H05K1/18

CPC Code(s): H05K1/0204

Abstract: electronic assemblies with a cold plate having an opening are provided. in one aspect. a system includes an array of electronic components. a control board. and a cold plate having a plurality of openings therethrough. the cold plate can be arranged between the array of electronic components and the control board. the cold plate can cool the array of electronic components. the system can also include a plurality of pass through connectors arranged in the openings in the cold plate and configured to connect the array of electronic components to the control board. the cold plate can also be used to cool the control board electronics and the connectors passing through.

20240357769. HETEROGENOUS MULTI-LAYER STRUCTURE_simplified_abstract_(tesla, inc.)

Inventor(s): Shishuang Sun of Cupertino CA (US) for tesla, inc., Ganesh Venkataramanan of Sunnyvale CA (US) for tesla, inc., Yang Sun of Palo Alto CA (US) for tesla, inc., Jin Zhao of San Jose CA (US) for tesla, inc., Shaowei Deng of Palo Alto CA (US) for tesla, inc., William Chang of Palo Alto CA (US) for tesla, inc., Mengzhi Pang of Cupertino CA (US) for tesla, inc., Steven Butler of Palo Alto CA (US) for tesla, inc., William Arthur McGee of San Jose CA (US) for tesla, inc., Aydin Nabovati of Toronto (CA) for tesla, inc.

IPC Code(s): H05K7/20

CPC Code(s): H05K7/205

Abstract: the systems, methods, and devices disclosed herein relate to a multi-layer structures arranged in a vertically orientation. in some embodiments, a computing assembly can include a first cooling system, a first electronics layer, a second cooling system, and a second electronics layer. the first cooling system can be disposed on top of and can be in thermal communication with the first electronics layer. the first electronics layer array includes an array of integrated circuit dies that are in electronic communication with each other in a plane that is orthogonal to power delivery. the first electronics layer can be disposed on top of and can be in thermal communication with the second cooling system, and the second cooling system can be disposed on top of and can be in thermal communication with the second electronics layer. the second electronics layer includes an array of power delivery modules. in some embodiments, at least one layer can use system on wafer packaging.

Tesla, Inc. patent applications on October 24th, 2024