Taiwan semiconductor manufacturing company, ltd. (20240347512). PACKAGE simplified abstract

From WikiPatents
Jump to navigation Jump to search

PACKAGE

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Ming-Fa Chen of Taichung City (TW)

Chao-Wen Shih of Hsinchu County (TW)

Hsien-Wei Chen of Hsinchu City (TW)

Sung-Feng Yeh of Taipei City (TW)

Tzuan-Horng Liu of Taoyuan City (TW)

PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240347512 titled 'PACKAGE

The abstract of the patent application describes a package consisting of a carrier substrate, a first die, and a second die stacked in sequential order on the carrier substrate. The first die includes a first bonding layer, a second bonding layer, and an alignment mark embedded in the first bonding layer. The second die includes a third bonding layer. The rear surface of the first die is in physical contact with the carrier substrate, while the active surface of the first die is in physical contact with the third bonding layer of the second die.

  • The package includes a carrier substrate, a first die, and a second die stacked in sequential order.
  • The first die has a first bonding layer, a second bonding layer, and an alignment mark embedded in the first bonding layer.
  • The second die has a third bonding layer.
  • The rear surface of the first die is in contact with the carrier substrate, and the active surface of the first die is in contact with the third bonding layer of the second die.
  • This configuration allows for efficient stacking of dies in a package.

Potential Applications: - Semiconductor packaging - Integrated circuits - Microelectronics

Problems Solved: - Efficient stacking of dies in a package - Improved alignment and bonding between dies

Benefits: - Enhanced performance of electronic devices - Compact design for space-saving applications - Improved reliability and durability of packaged components

Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Enhanced Performance This technology can be utilized in the manufacturing of various electronic devices such as smartphones, tablets, laptops, and other consumer electronics. The compact design and improved performance make it ideal for high-tech industries.

Questions about Semiconductor Packaging Technology: 1. How does this technology improve the performance of electronic devices? This technology enhances the efficiency and reliability of semiconductor packaging, leading to improved overall performance of electronic devices.

2. What are the potential applications of this advanced packaging technology? The potential applications include semiconductor packaging, integrated circuits, and microelectronics, among others.


Original Abstract Submitted

a package includes a carrier substrate, a first die, and a second die. the first die and the second die are stacked on the carrier substrate in sequential order. the first die includes a first bonding layer, a second bonding layer, and an alignment mark embedded in the first bonding layer. the second die includes a third bonding layer. a surface of the first bonding layer form a rear surface of the first die and a surface of the second bonding layer form an active surface of the first die. the rear surface of the first die is in physical contact with the carrier substrate. the active surface of the first die is in physical contact with the third bonding layer of the second die.