Taiwan semiconductor manufacturing company, ltd. (20240339432). JOINT STRUCTURE IN SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF simplified abstract

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JOINT STRUCTURE IN SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Kuan-Yu Huang of Taipei (TW)

Chih-Wei Wu of Yilan County (TW)

Sung-Hui Huang of Yilan County (TW)

Shang-Yun Hou of Hsinchu (TW)

Ying-Ching Shih of Hsinchu City (TW)

Cheng-Chieh Li of Hsinchu City (TW)

JOINT STRUCTURE IN SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240339432 titled 'JOINT STRUCTURE IN SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

The method described in the patent application involves forming a semiconductor package by creating two package components with different sizes of conductive bumps, and then bonding them together with joint structures.

  • The first package component has smaller first and second conductive bumps, while the second package component has larger third and fourth conductive bumps.
  • Joint structures are formed to bond the two package components together, with specific angles between the exposed sidewalls of the conductive bumps and the tangent lines at the end points of the joint structures.

Potential Applications: - Semiconductor packaging industry - Electronics manufacturing

Problems Solved: - Improving the bonding process in semiconductor packaging - Enhancing the reliability and performance of semiconductor packages

Benefits: - Increased efficiency in semiconductor packaging - Enhanced durability of semiconductor packages

Commercial Applications: - Semiconductor manufacturing companies - Electronics companies

Questions about the technology: 1. How does the size difference of the conductive bumps impact the bonding process? 2. What are the specific advantages of using joint structures in semiconductor packaging?

Frequently Updated Research: - Ongoing research in semiconductor packaging materials and processes

By optimizing the size and angles of conductive bumps in semiconductor packaging, this technology aims to improve the reliability and performance of electronic devices.


Original Abstract Submitted

a method of forming a semiconductor package includes: forming a first package component including a first and a second conductive bumps; forming a second package component including a third and a fourth conductive bumps, where dimensions of the first and second conductive bumps are less than dimensions of the third and fourth conductive bumps; and forming a first and a second joint structures to bond the second package component to the first package component. a first angle between an exposed sidewall of the first conductive bump and a tangent line at an end point of a boundary of the first joint structure on the sidewall of the first conductive bump is less than a second angle between an exposed sidewall of the second conductive bump and a tangent line at an end point of a boundary of the second joint structure on the sidewall of the second conductive bump.