Taiwan semiconductor manufacturing company, ltd. (20240206193). STRUCTURE AND FORMATION METHOD OF PACKAGE WITH INTEGRATED CHIPS simplified abstract

STRUCTURE AND FORMATION METHOD OF PACKAGE WITH INTEGRATED CHIPS

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Chuei-Tang Wang of Taichung City (TW)

Tso-Jung Chang of Taoyuan City (TW)

Wen-Shiang Liao of Miaoli County (TW)

Jeng-Shien Hsieh of Kaohsiung (TW)

Chih-Peng Lin of Hsinchu County (TW)

Shih-Ping Lin of Taichung City (TW)

Chieh-Yen Chen of Taipei City (TW)

Chen-Hua Yu of Hsinchu City (TW)

STRUCTURE AND FORMATION METHOD OF PACKAGE WITH INTEGRATED CHIPS - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240206193 titled 'STRUCTURE AND FORMATION METHOD OF PACKAGE WITH INTEGRATED CHIPS

The abstract of the patent application describes a method for bonding memory-containing chip structures and logic control chip structures using dielectric-to-dielectric and metal-to-metal bonding techniques. The logic control chip structure is formed using a more advanced technology node than the memory-containing chip structure.

• Dielectric-to-dielectric and metal-to-metal bonding method for memory-containing and logic control chip structures
• Logic control chip structure formed with more advanced technology node
• Package structure for integrated chips
• Enhanced performance and functionality through advanced bonding techniques
• Potential for improved efficiency and speed in electronic devices

Potential Applications: - Semiconductor industry - Electronics manufacturing - Integrated circuit design

Problems Solved: - Enhanced performance and functionality of integrated chips - Improved efficiency and speed in electronic devices

Benefits: - Increased performance capabilities - Enhanced functionality of electronic devices - Improved efficiency in semiconductor manufacturing processes

Commercial Applications: Title: Advanced Chip Bonding Techniques for Enhanced Performance Description: This technology can be utilized in the semiconductor industry to improve the performance and functionality of electronic devices, leading to potential market advantages in various applications.

Questions about the technology: 1. How do dielectric-to-dielectric and metal-to-metal bonding techniques improve the performance of integrated chips? 2. What are the potential market implications of using a more advanced technology node for logic control chip structures?

Original Abstract Submitted

a package structure and a formation method are provided. the method includes bonding a first memory-containing chip structure to a second memory-containing chip structure through dielectric-to-dielectric bonding and metal-to-metal bonding. the method also includes bonding a logic control chip structure to the second memory-containing chip structure through dielectric-to-dielectric bonding and metal-to-metal bonding. the logic control chip structure is formed using a more advanced technology node than the second memory-containing chip structure.