Taiwan semiconductor manufacturing company, ltd. (20240178120). INTEGRATED FAN-OUT PACKAGE AND MANUFACTURING METHOD THEREOF simplified abstract

INTEGRATED FAN-OUT PACKAGE AND MANUFACTURING METHOD THEREOF

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Chung-Ming Weng of Taichung City (TW)

Tzu-Sung Huang of Tainan City (TW)

Wei-Kang Hsieh of Tainan City (TW)

Hao-Yi Tsai of Hsinchu City (TW)

Ming-Hung Tseng of Miaoli County (TW)

Tsung-Hsien Chiang of Hsinchu (TW)

Yen-Liang Lin of Taichung City (TW)

Chu-Chun Chueh of Hsinchu City (TW)

INTEGRATED FAN-OUT PACKAGE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240178120 titled 'INTEGRATED FAN-OUT PACKAGE AND MANUFACTURING METHOD THEREOF

Simplified Explanation

The integrated fan-out package described in the patent application includes a first redistribution structure with different metal densities in different regions, a die, conductive structures surrounding the die, an encapsulant encapsulating the die and conductive structures, and a second redistribution structure on top of the encapsulant, die, and conductive structures.

• The first redistribution structure has first regions with lower metal density and a second region surrounding the first regions with higher metal density.
• The die is placed over the first redistribution structure.
• The conductive structures are positioned on the first redistribution structure to enclose the die, with their vertical projections falling within the first regions.
• The encapsulant covers the die and conductive structures.
• The second redistribution structure is located on top of the encapsulant, die, and conductive structures.

Potential Applications

The technology described in this patent application could be applied in the semiconductor industry for advanced packaging solutions, such as in mobile devices, IoT devices, and other electronic products requiring compact and efficient packaging.

Problems Solved

This technology addresses the need for improved packaging solutions for electronic devices, providing a more efficient and reliable way to integrate components in a compact space.

Benefits

The integrated fan-out package offers enhanced performance, reliability, and space-saving benefits compared to traditional packaging methods. It also allows for better thermal management and electrical performance.

Potential Commercial Applications

• Advanced packaging solutions for mobile devices
• Semiconductor industry applications for IoT devices
• Electronic products requiring compact and efficient packaging

Possible Prior Art

One possible prior art in this field could be the development of fan-out wafer-level packaging (FOWLP) technology, which has been used in the semiconductor industry for integrating components in a compact and efficient manner.

Unanswered Questions

How does the metal density in different regions of the first redistribution structure affect the overall performance of the integrated fan-out package?

The patent application mentions different metal densities in different regions of the first redistribution structure, but it does not elaborate on how this impacts the performance of the package.

What specific materials are used for the conductive structures in the integrated fan-out package?

The patent application mentions conductive structures surrounding the die, but it does not specify the materials used for these structures.

Original Abstract Submitted

an integrated fan-out package includes a first redistribution structure, a die, conductive structures, an encapsulant, and a second redistribution structure. the first redistribution structure has first regions and a second region surrounding the first regions. a metal density in the first regions is smaller than a metal density in the second region. the die is disposed over the first redistribution structure. the conductive structures are disposed on the first redistribution structure to surround the die. vertical projections of the conductive structures onto the first redistribution structure fall within the first regions of the first redistribution structure. the encapsulant encapsulates the die and the conductive structures. the second redistribution structure is disposed on the encapsulant, the die, and the conductive structures.