Taiwan semiconductor manufacturing company, ltd. (20240121965). VERTICALLY STACKED FeFETS WITH COMMON CHANNEL simplified abstract

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VERTICALLY STACKED FeFETS WITH COMMON CHANNEL

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Georgios Vellianitis of Heverlee (BE)

Gerben Doornbos of Kessel-Lo (BE)

VERTICALLY STACKED FeFETS WITH COMMON CHANNEL - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240121965 titled 'VERTICALLY STACKED FeFETS WITH COMMON CHANNEL

Simplified Explanation

The abstract describes a patent application for ferroelectric field-effect transistors (FEFETs) in a three-dimensional structure with vertical columns. Source/drain electrodes are provided by horizontal conductive layers interleaved with dielectric layers, while channels for the FEFETs are formed by a continuous semiconductor layer in each vertical column. Gate electrodes are provided by a control gate structure connecting the gate electrodes in parallel.

  • Vertical column structure for FEFETs
  • Source/drain electrodes provided by horizontal conductive layers
  • Channels formed by continuous semiconductor layer
  • Gate electrodes connected in parallel

Potential Applications

The technology can be applied in high-density integrated circuits, memory devices, and logic circuits.

Problems Solved

This technology solves the problem of limited area density in traditional transistor structures and provides an extra degree of freedom in circuit design.

Benefits

The benefits of this technology include increased area density, improved circuit design flexibility, and the use of oxide semiconductor channels.

Potential Commercial Applications

The potential commercial applications of this technology include semiconductor manufacturing, electronics industry, and memory device production.

Possible Prior Art

One possible prior art for this technology could be the use of traditional field-effect transistors in integrated circuits.

Unanswered Questions

How does this technology compare to traditional transistor structures in terms of performance and efficiency?

This article does not provide a direct comparison between the new technology and traditional transistor structures.

What are the potential challenges in implementing this three-dimensional structure in large-scale production?

The article does not address the potential challenges in large-scale production of the three-dimensional structure for FEFETs.


Original Abstract Submitted

ferroelectric field effect transistors are in a three-dimensional structure that includes vertical columns. source/drain electrodes are provided by horizontal conductive layers that are interleaved with dielectric layers. channels for the fefets in each vertical column are provided by a continuous semiconductor layer, e.g., a vertical strip of semiconductor. another vertical strip may provide the ferroelectric layers for the fefets in the vertical column. the gate electrodes are provided by a control gate structure that connects the gate electrodes in parallel. the source/drain electrodes of multiple vertical columns may be connected in parallel. the source/drain electrodes of multiple tiers may also be connected in parallel. this structure provides high area density, adds an extra degree of freedom in circuit design, and lends itself to the use of oxide semiconductor channels.