Taiwan semiconductor manufacturing co., ltd. (20240222318). METHOD OF MAKING SEMICONDUCTOR DEVICE HAVING REDUCED BUMP HEIGHT VARIATION simplified abstract
Contents
METHOD OF MAKING SEMICONDUCTOR DEVICE HAVING REDUCED BUMP HEIGHT VARIATION
Organization Name
taiwan semiconductor manufacturing co., ltd.
Inventor(s)
Jing-Cheng Lin of Chu Tung Zhen (TW)
Po-Hao Tsai of Zhongli City (TW)
METHOD OF MAKING SEMICONDUCTOR DEVICE HAVING REDUCED BUMP HEIGHT VARIATION - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240222318 titled 'METHOD OF MAKING SEMICONDUCTOR DEVICE HAVING REDUCED BUMP HEIGHT VARIATION
The abstract describes a method of making a semiconductor device by patterning a photoresist on a substrate to create multiple openings of different widths, and then plating a conductive material into each opening at varying heights.
- Patterning a photoresist on a substrate to create multiple openings of different widths
- Plating a conductive material into each opening at varying heights
- Creating openings with different widths in a direction parallel to the substrate surface
- Achieving precise control over the plating process to deposit the conductive material at specific heights in each opening
- Enhancing the performance and functionality of semiconductor devices through this method
Potential Applications: This technology can be applied in the manufacturing of various semiconductor devices such as integrated circuits, sensors, and microprocessors.
Problems Solved: This method addresses the need for precise and controlled deposition of conductive materials in semiconductor device manufacturing processes.
Benefits: The method allows for the creation of complex semiconductor devices with improved performance and functionality due to the precise plating of conductive materials at different heights in various openings.
Commercial Applications: This technology can be utilized in the semiconductor industry for the production of advanced electronic devices with enhanced capabilities, potentially leading to improved efficiency and performance in various electronic applications.
Questions about the technology: 1. How does the method of plating conductive materials at varying heights in different openings improve semiconductor device performance? 2. What are the specific challenges in controlling the plating process to achieve the desired heights in each opening?
Original Abstract Submitted
a method of making a semiconductor device includes patterning a photoresist on a substrate to form a plurality of openings. a first opening has a first width, a second opening has a second width, smaller than the first width, and a third opening is between the first opening and the second opening and has a third width, different from the first width and the second width. the width is measured in a direction parallel to a top surface of the substrate. the method further includes plating a first conductive material into each opening of the plurality of openings in the photoresist. plating the first conductive material includes plating of the first conductive material to a first height in the first opening, plating the first conductive material to a second height in the second opening, and plating the first conductive material to a third height in the third opening.
