Taiwan semiconductor manufacturing co., ltd. (20240222242). GIGA INTERPOSER INTEGRATION THROUGH CHIP-ON-WAFER-ON-SUBSTRATE simplified abstract

GIGA INTERPOSER INTEGRATION THROUGH CHIP-ON-WAFER-ON-SUBSTRATE

Organization Name

taiwan semiconductor manufacturing co., ltd.

Inventor(s)

Shang-Yun Hou of Jubei (TW)

Hsien-Pin Hu of Zhubei (TW)

Sao-Ling Chiu of Hsinchu (TW)

Wen-Hsin Wei of Hsinchu (TW)

Ping-Kang Huang of Chiayi (TW)

Chih-Ta Shen of Hsinchu (TW)

Szu-Wei Lu of Hsinchu (TW)

Ying-Ching Shih of Hsinchu (TW)

Wen-Chih Chiou of Zhunan Township (TW)

Chi-Hsi Wu of Hsinchu (TW)

Chen-Hua Yu of Hsinchu (TW)

GIGA INTERPOSER INTEGRATION THROUGH CHIP-ON-WAFER-ON-SUBSTRATE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240222242 titled 'GIGA INTERPOSER INTEGRATION THROUGH CHIP-ON-WAFER-ON-SUBSTRATE

The semiconductor structure described in the patent application consists of a first interposer, a second interposer positioned next to the first interposer but spaced apart from it, and a first die attached to both the first and second interposers on one side.

• The innovation involves a unique semiconductor structure with multiple interposers for enhanced functionality.
• By attaching a single die to multiple interposers, the structure allows for improved performance and connectivity.
• The design enables efficient heat dissipation and electrical connections within the semiconductor device.
• The spacing between the interposers helps in reducing interference and optimizing signal transmission.
• Overall, the structure offers a novel approach to semiconductor packaging and integration.

Potential Applications: This technology could be applied in various electronic devices such as smartphones, computers, and IoT devices. It can also be used in high-performance computing systems, data centers, and automotive electronics.

Problems Solved: Enhanced performance and connectivity in semiconductor devices. Improved heat dissipation and signal transmission. Optimized packaging and integration of electronic components.

Benefits: Increased efficiency and reliability in electronic devices. Enhanced overall performance and functionality. Improved thermal management and signal integrity.

Commercial Applications: This technology could revolutionize the semiconductor industry by offering more advanced and efficient packaging solutions. It could be highly sought after by electronics manufacturers looking to improve the performance of their products.

Questions about the technology: 1. How does the use of multiple interposers benefit the overall performance of the semiconductor structure? 2. What specific challenges does this technology address in current semiconductor packaging methods?

Original Abstract Submitted

a semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.