Taiwan semiconductor manufacturing co., ltd. (20240222194). PACKAGE COMPONENT WITH STEPPED PASSIVATION LAYER simplified abstract
Contents
PACKAGE COMPONENT WITH STEPPED PASSIVATION LAYER
Organization Name
taiwan semiconductor manufacturing co., ltd.
Inventor(s)
Ming-Da Cheng of Taoyuan City (TW)
Tzy-Kuang Lee of Taichung (TW)
Song-Bor Lee of Zhubei City (TW)
Wen-Hsiung Lu of Tainan City (TW)
Po-Hao Tsai of Taoyuan City (TW)
Wen-Che Chang of Taichung (TW)
PACKAGE COMPONENT WITH STEPPED PASSIVATION LAYER - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240222194 titled 'PACKAGE COMPONENT WITH STEPPED PASSIVATION LAYER
The method described in the abstract involves the formation of a first conductive feature, deposition of a passivation layer on the sidewall and top surface of the first conductive feature, etching the passivation layer to reveal the first conductive feature, and recessing a first top surface of the passivation layer to form a step.
- Forming a first conductive feature
- Depositing a passivation layer on the first conductive feature
- Etching the passivation layer to reveal the first conductive feature
- Recessing a top surface of the passivation layer to form a step
- Forming a planarization layer on the passivation layer
- Forming a second conductive feature extending into the passivation layer to contact the first conductive feature
Potential Applications: - Semiconductor manufacturing - Microelectronics industry - Integrated circuit fabrication
Problems Solved: - Enhancing the conductivity of features in semiconductor devices - Improving the reliability and performance of electronic components
Benefits: - Increased efficiency in semiconductor manufacturing processes - Enhanced functionality of integrated circuits - Improved overall performance of electronic devices
Commercial Applications: Title: Advanced Semiconductor Manufacturing Process for Enhanced Device Performance This technology can be utilized in the production of high-performance electronic devices such as smartphones, computers, and automotive electronics. It can also benefit companies involved in semiconductor manufacturing and microelectronics production.
Questions about the technology: 1. How does the method described in the abstract improve the performance of electronic devices? 2. What are the potential cost savings associated with implementing this semiconductor manufacturing process?
Original Abstract Submitted
a method includes forming a first conductive feature, depositing a passivation layer on a sidewall and a top surface of the first conductive feature, etching the passivation layer to reveal the first conductive feature, and recessing a first top surface of the passivation layer to form a step. the step comprises a second top surface of the passivation layer. the method further includes forming a planarization layer on the passivation layer, and forming a second conductive feature extending into the passivation layer to contact the first conductive feature.
