Taiwan semiconductor manufacturing co., ltd. (20240222108). CONTROLLING THRESHOLD VOLTAGES THROUGH BLOCKING LAYERS simplified abstract
Contents
CONTROLLING THRESHOLD VOLTAGES THROUGH BLOCKING LAYERS
Organization Name
taiwan semiconductor manufacturing co., ltd.
Inventor(s)
Chia-Ching Lee of New Taipei City (TW)
Chung-Chiang Wu of Taichung City (TW)
Shih-Hang Chiu of Taichung City (TW)
Da-Yuan Lee of Jhubei City (TW)
CONTROLLING THRESHOLD VOLTAGES THROUGH BLOCKING LAYERS - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240222108 titled 'CONTROLLING THRESHOLD VOLTAGES THROUGH BLOCKING LAYERS
The method described in the abstract involves depositing layers in different regions of a device and then removing certain layers to form metal-filling layers.
- Depositing a first work-function layer and a second work-function layer in separate device regions.
- Depositing a first fluorine-blocking layer and a second fluorine-blocking layer in the respective device regions.
- Removing the second fluorine-blocking layer.
- Forming a first metal-filling layer over the first fluorine-blocking layer, and a second metal-filling layer over the second work-function layer.
Potential Applications: - Semiconductor manufacturing - Electronics industry
Problems Solved: - Enhancing device performance - Preventing fluorine diffusion
Benefits: - Improved device efficiency - Enhanced device reliability
Commercial Applications: Title: Advanced Semiconductor Manufacturing Process This technology can be used in the production of high-performance electronic devices, leading to increased market competitiveness and technological advancements in the semiconductor industry.
Questions about the technology: 1. How does the method described in the patent application improve device performance? 2. What are the specific advantages of using fluorine-blocking layers in semiconductor manufacturing processes?
Original Abstract Submitted
a method includes depositing a first work-function layer and a second work-function layer in a first device region and a second device region, respectively, and depositing a first fluorine-blocking layer and a second fluorine-blocking layer in the first device region and the second device region, respectively. the first fluorine-blocking layer is over the first work-function layer, and the second fluorine-blocking layer is over the second work-function layer. the method further includes removing the second fluorine-blocking layer, and forming a first metal-filling layer over the first fluorine-blocking layer, and a second metal-filling layer over the second work-function layer.
