Taiwan semiconductor manufacturing co., ltd. (20240194644). VERTICALLY MOUNTED DIE GROUPS simplified abstract

VERTICALLY MOUNTED DIE GROUPS

Organization Name

taiwan semiconductor manufacturing co., ltd.

Inventor(s)

Jen-Yuan Chang of Hsinchu (TW)

VERTICALLY MOUNTED DIE GROUPS - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240194644 titled 'VERTICALLY MOUNTED DIE GROUPS

The semiconductor package described in the patent application consists of a base substrate structure and multiple die groups located on the top surface of the base substrate structure. These die groups include a first die group and a second die group positioned adjacent to each other.

• The first die group comprises several first dies stacked parallel to each other and parallel to the front surface of the group. The front surface of the first die group intersects with the top surface at a first edge extending in a specific direction.
• The second die group consists of multiple second dies stacked parallel to each other and parallel to the front surface of the group. The front surface of the second die group intersects with the top surface at a second edge extending in a different direction from the first edge.

Potential Applications: - This semiconductor package design could be used in various electronic devices requiring compact and efficient packaging of multiple dies. - It may find applications in mobile devices, IoT devices, and other consumer electronics where space-saving and performance are crucial.

Problems Solved: - The design addresses the challenge of efficiently stacking and arranging multiple dies in a semiconductor package while ensuring optimal performance and thermal management.

Benefits: - Improved space utilization within the semiconductor package. - Enhanced thermal performance due to the specific arrangement of the die groups. - Potential for increased functionality and performance in electronic devices.

Commercial Applications: Title: Innovative Semiconductor Package Design for Enhanced Performance This technology could be utilized in the production of smartphones, tablets, wearables, and other compact electronic devices. The efficient stacking and arrangement of dies can lead to smaller form factors, improved performance, and better thermal management, making it an attractive option for manufacturers looking to enhance their products.

Questions about the Innovative Semiconductor Package Design: 1. How does the specific arrangement of die groups in this semiconductor package improve performance compared to traditional designs? 2. What are the potential challenges in manufacturing semiconductor packages with such intricate die group arrangements?

Original Abstract Submitted

a semiconductor package includes: a base substrate structure; and a plurality of die groups disposed on a top surface of the based substrate structure, the plurality of die groups comprising a first die group and a second die group neighboring to each other. the first die group includes a plurality of first dies stacked parallel to each other and parallel to a front surface of the first die group, the front surface of the first die group and the top surface intersect at a first edge extending in a first direction. the second die group includes a plurality of second dies stacked parallel to each other and parallel to a front surface of the second die group, the front surface of the second die group and the top surface intersect at a second edge extending in a second direction not parallel to the first direction.