Taiwan semiconductor manufacturing co., ltd. (20240162159). SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF simplified abstract

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SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Organization Name

taiwan semiconductor manufacturing co., ltd.

Inventor(s)

Chung-Hao Tsai of Changhua County (TW)

Chen-Hua Yu of Hsinchu City (TW)

Chuei-Tang Wang of Taichung City (TW)

Wei-Ting Chen of Tainan City (TW)

Chien-Hsun Chen of Pingtung County (TW)

Shih-Ya Huang of Hsinchu City (TW)

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240162159 titled 'SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Simplified Explanation

The semiconductor package described in the abstract includes a pair of dies, a redistribution structure, and a conductive plate. The dies are positioned side by side and each includes a contact pad. The redistribution structure electrically connects the pair of dies and consists of an innermost dielectric layer, an outermost dielectric layer, and a redistribution conductive layer. The conductive plate is connected to the contact pads of the dies and extends over the outermost dielectric layer and the pair of dies.

  • Pair of dies positioned side by side
  • Each die includes a contact pad
  • Redistribution structure connects the dies
  • Structure includes innermost and outermost dielectric layers
  • Conductive plate connected to contact pads
  • Plate extends over outermost dielectric layer and dies

Potential Applications

The technology described in this patent application could be used in various semiconductor devices, such as microprocessors, memory chips, and sensors.

Problems Solved

This technology helps improve the electrical connectivity and performance of semiconductor packages by efficiently connecting the pair of dies and providing a conductive plate for enhanced functionality.

Benefits

The benefits of this technology include improved electrical connections, enhanced performance, and increased reliability of semiconductor packages.

Potential Commercial Applications

One potential commercial application of this technology could be in the manufacturing of advanced electronic devices for consumer electronics, automotive systems, and industrial equipment.

Possible Prior Art

One possible prior art for this technology could be the use of redistribution structures in semiconductor packages to improve electrical connections and performance.

Unanswered Questions

How does this technology compare to existing semiconductor packaging solutions in terms of cost-effectiveness?

This article does not provide information on the cost-effectiveness of this technology compared to existing semiconductor packaging solutions.

What are the environmental implications of using this technology in semiconductor manufacturing processes?

This article does not address the environmental implications of using this technology in semiconductor manufacturing processes.


Original Abstract Submitted

semiconductor package includes a pair of dies, a redistribution structure, and a conductive plate. dies of the pair of dies are disposed side by side. each die includes a contact pad. redistribution structure is disposed on the pair of dies, and electrically connects the pair of dies. redistribution structure includes an innermost dielectric layer, an outermost dielectric layer, and a redistribution conductive layer. innermost dielectric layer is closer to the pair of dies. redistribution conductive layer extends between the innermost dielectric layer and the outermost dielectric layer. outermost dielectric layer is furthest from the pair of dies. conductive plate is electrically connected to the contact pads of the pair of dies. conductive plate extends over the outermost dielectric layer of the redistribution structure and over the pair of dies. vertical projection of the conductive plate falls on spans of the dies of the pair of dies.