Taiwan semiconductor manufacturing co., ltd. (20240128194). Integrated Circuit Packages and Methods of Forming the Same simplified abstract
Contents
- 1 Integrated Circuit Packages and Methods of Forming the Same
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 Integrated Circuit Packages and Methods of Forming the Same - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
Integrated Circuit Packages and Methods of Forming the Same
Organization Name
taiwan semiconductor manufacturing co., ltd.
Inventor(s)
Ming-Fa Chen of Taichung City (TW)
Yun-Han Lee of Baoshan Township (TW)
Integrated Circuit Packages and Methods of Forming the Same - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240128194 titled 'Integrated Circuit Packages and Methods of Forming the Same
Simplified Explanation
The abstract describes a patent application related to integrated circuit packages. The innovation involves a device with a power distribution interposer and an integrated circuit die directly bonded together. Here are the key points:
- Device includes a power distribution interposer with a first bonding layer, a first die connector, and a back-side interconnect structure.
- Integrated circuit die includes a second bonding layer directly bonded to the first bonding layer, a second die connector directly bonded to the first die connector, and a device layer with a contact and a transistor.
- The contact connects the back-side of the first source/drain region of the transistor to the second die connector.
Potential Applications
This technology could be applied in various electronic devices requiring efficient power distribution and interconnect structures.
Problems Solved
This innovation solves the challenge of creating a reliable and efficient bond between the power distribution interposer and the integrated circuit die.
Benefits
The direct bonding between layers improves electrical connectivity and overall performance of the device.
Potential Commercial Applications
This technology could be utilized in the manufacturing of advanced electronic devices such as smartphones, tablets, and other consumer electronics.
Possible Prior Art
One possible prior art could be the use of traditional wire bonding or flip chip technology in integrated circuit packaging.
Unanswered Questions
How does this technology compare to existing bonding methods in terms of reliability and performance?
The article does not provide a direct comparison between this technology and other bonding methods.
What are the specific materials used in the dielectric-to-dielectric and metal-to-metal bonds?
The article does not specify the exact materials used in the bonding process.
Original Abstract Submitted
integrated circuit packages and methods of forming the same are provided. in an embodiment, a device includes: a power distribution interposer including: a first bonding layer; a first die connector in the first bonding layer; and a back-side interconnect structure including a power rail connected to the first die connector; and an integrated circuit die including: a second bonding layer directly bonded to the first bonding layer by dielectric-to-dielectric bonds; a second die connector in the second bonding layer, the second die connector directly bonded to the first die connector by metal-to-metal bonds; and a device layer on the second bonding layer, the device layer including a contact and a transistor, the transistor including a first source/drain region, the contact connecting a back-side of the first source/drain region to the second die connector.
