TEXAS INSTRUMENTS INCORPORATED patent applications on July 25th, 2024
Patent Applications by TEXAS INSTRUMENTS INCORPORATED on July 25th, 2024
TEXAS INSTRUMENTS INCORPORATED: 19 patent applications
TEXAS INSTRUMENTS INCORPORATED has applied for patents in the areas of H01L23/00 (3), G06F9/38 (2), G06F9/30 (2), G06F1/3287 (2), G06F1/3206 (2) B32B9/007 (1), H01L24/78 (1), H03M1/1023 (1), H03K19/018592 (1), H03K5/04 (1)
With keywords such as: input, signal, output, coupled, circuit, data, control, voltage, receiver, and configured in patent application abstracts.
Patent Applications by TEXAS INSTRUMENTS INCORPORATED
20240246317. SP2-Bonded Carbon Structures_simplified_abstract_(texas instruments incorporated)
Inventor(s): Luigi COLOMBO of Dallas TX (US) for texas instruments incorporated, Nazila DADVAND of Richardson TX (US) for texas instruments incorporated, Benjamin Stassen COOK of Addison TX (US) for texas instruments incorporated, Archana VENUGOPAL of Dallas TX (US) for texas instruments incorporated
IPC Code(s): B32B9/00, B32B9/04, B82Y30/00, C01B32/184, C01B32/19, C23C18/32, C23C18/38, H01M50/00
CPC Code(s): B32B9/007
Abstract: a microstructure comprises a plurality of interconnected units wherein the units are formed of graphene tubes. the graphene tubes may be formed by photo-initiating the polymerization of a monomer in a pattern of interconnected units to form a polymer microlattice, removing unpolymerized monomer, coating the polymer microlattice with a metal, removing the polymer microlattice to leave a metal microlattice, depositing graphitic carbon on the metal microlattice, converting the graphitic carbon to graphene, and removing the metal microlattice.
Inventor(s): Christlyn Faith ARIAS of Mabalacat City (PH) for texas instruments incorporated, Jeffrey SOLAS of Iloilo City (PH) for texas instruments incorporated
IPC Code(s): G01N27/22, H01L21/48, H01L21/56, H01L23/00, H01L23/31, H01L23/495
CPC Code(s): G01N27/223
Abstract: a semiconductor device includes a semiconductor die having a surface and sensing circuitry at a sensing region of the surface. a tubular wall of a metal material has an inner sidewall around the sensing region to provide a sensing cavity that extends from the surface of the semiconductor die to an opening at a distal edge thereof. the tubular wall includes a proximal portion and a distal flange portion. the proximal portion extends longitudinally from the surface. the distal flange portion extends radially outwardly from the proximal portion a first distance and radially inwardly from the proximal portion a second distance that is less than the first distance.
Inventor(s): Ricky Alan Jackson of Richardson TX (US) for texas instruments incorporated, Wai Lee of Dallas TX (US) for texas instruments incorporated
IPC Code(s): G01N27/22
CPC Code(s): G01N27/225
Abstract: monolithic humidity sensor devices, and methods of manufacture. the devices include circuitry on or over a silicon substrate. a primary passivation barrier is formed over the circuitry with conductive vias therethrough; a capacitor, comprising metal fingers with spaces therebetween, is formed above said primary passivation barrier and electrically coupled by the conductive vias to the circuitry. a secondary passivation barrier is formed over the capacitor. a hygroscopic material layer is formed over the secondary passivation barrier, wherein the capacitor is operable to exhibit a capacitance value responsive to moisture present in the hygroscopic material layer and the circuitry is operable to generate a signal responsive to said capacitance value.
20240248162. PASSIVE RADAR RECEIVER SYSTEM_simplified_abstract_(texas instruments incorporated)
Inventor(s): Yaron Alpert of Hod Hasharon (IL) for texas instruments incorporated, Matan Ben-Shachar of D.N. EMEK HEFER (IL) for texas instruments incorporated, Anand Ganesh Dabak of Plano TX (US) for texas instruments incorporated, Brian Ginsburg of Allen TX (US) for texas instruments incorporated
IPC Code(s): G01S1/04, G01S19/25, G01S19/30
CPC Code(s): G01S1/045
Abstract: one example includes a passive radar receiver system including an rf receiver front-end to receive a wireless source signal and a reflected signal. an antenna switch of the front-end switches a first antenna to a receiver chain during a first time to generate first radar signal data based on a combined wireless signal comprising wireless source signal and the reflected signal, and switches a second antenna to the receiver chain during a second time to generate second radar signal data based on the combined wireless signal. a signal processor generates source signal data associated with the wireless source signal based on the first and second radar signal data and generates reflected signal data associated with the reflected signal based on the first and second radar signal data, and generates target radar data associated with a target based on the source and reflected radar signal data.
Inventor(s): Zeshan Ahmad of Plano TX (US) for texas instruments incorporated, Mayank Kumar Singh of Mountain View CA (US) for texas instruments incorporated
IPC Code(s): G01S7/03, G01S7/35, H03F3/24
CPC Code(s): G01S7/038
Abstract: in an embodiment, a system includes: an analog-to-digital converter (adc); a transmitter path; a receiver path including a first amplifier including: an output coupled to the adc, and a first high-pass filter; and a controller coupled to the transmitter path and to the receiver path, where the controller is configured to: cause a corner frequency of the first high-pass filter to increase from a first value to a second value, simultaneously or after causing the corner frequency of the first high-pass filter to increase, cause the transmitter path to be enabled, and after a first signal begins transmission in the enabled transmitter path, and during transmission of the first signal in the enabled transmitter path, cause the corner frequency of the first high-pass filter to decrease from the second value to the first value.
20240248503. POWER REGULATOR CIRCUITRY_simplified_abstract_(texas instruments incorporated)
Inventor(s): Ramesh Mosur Chandrasekaran of Plano TX (US) for texas instruments incorporated
IPC Code(s): G05F1/575, H02M3/158
CPC Code(s): G05F1/575
Abstract: an example circuit includes a first source follower input stage having a reference voltage input and a first output. a second source follower input stage has a feedback voltage input and a second output, in which second source follower input stage is configured to receive a feedback voltage at the feedback voltage input. the feedback voltage is representative of an output voltage at an output terminal of the circuit. a common gate differential gain stage has first and second differential inputs and first and second drive outputs. the first differential input is coupled to the first output, and the second differential input is coupled to the second output. the common gate differential gain stage is configured to control the output voltage at the output terminal by controlling at least one of the first or second drive outputs.
Inventor(s): Timothy David Anderson of University Park TX (US) for texas instruments incorporated, Duc Quang Bui of Grand Prairie TX (US) for texas instruments incorporated
IPC Code(s): G06F1/28, G06F1/3206, G06F1/3234, G06F1/3287, G06F9/30, G06F9/38, G06F13/26
CPC Code(s): G06F1/28
Abstract: in an example, a device includes a memory, a register, a data path including a set of lanes, and a processor that executes a program. the following operations are performed in response to execution of the program: write data to a field of the register, in which the data specifies that at least one lane of the set of lanes is powered on; execute an instruction on the at least one powered on lane; receive an interrupt; based on the interrupt, copy the data from the register to the memory; service the interrupt; and based on completing the service, copy data the data from the memory to the register.
Inventor(s): Timothy David Anderson of University Park TX (US) for texas instruments incorporated, Duc Quang Bui of Grand Prairie TX (US) for texas instruments incorporated
IPC Code(s): G06F9/30, G06F1/3206, G06F1/3287, G06F9/38
CPC Code(s): G06F9/30036
Abstract: in an embodiment, a circuit includes a data path including at least a first lane of a first width and a second lane of a second, larger, width; an execution unit to execute a first instruction on data of the first width or less using the first lane, and to execute a second instruction on data greater than the first width and less than or equal to the second width using the second lane; and a control register that stores a value indicating which of the first and second lanes to be used in instruction execution by the execution unit. the circuit is configured to, based on the value stored in the control register, power off the first lane when the execution unit executes the second instruction but not the first instruction, and power off the second lane when the execution unit executes the first instruction but not the second instruction.
Inventor(s): Sriramakrishan GOVINDARAJAN of Bengaluru (IN) for texas instruments incorporated, Mihir Narendra MODY of Bengaluru (IN) for texas instruments incorporated, Prithvi Shankar YEYYADI ANANTHA of Bengaluru (IN) for texas instruments incorporated
IPC Code(s): G06F12/02
CPC Code(s): G06F12/0246
Abstract: an adaptive memory mirroring performance accelerator (ammpa) includes a transaction handling block that dynamically maps the most frequently accessed memory regions into faster access memory. the technique creates shadow copies of the most frequently accessed memory regions in the faster access memory, which is associated with lower latency. the regions for which shadow copies are provided are updated dynamically based on use. the technique is flexible for different memory hierarchies.
Inventor(s): Jeffrey Kempf of Dallas TX (US) for texas instruments incorporated, Gregory S. Pettitt of Durant OK (US) for texas instruments incorporated
IPC Code(s): G09G5/06
CPC Code(s): G09G5/06
Abstract: a system includes a spatial light modulator (slm) and a circuit including a processor. the slm includes pixel elements. the circuit is configured to convert m primary video signals to n multi-primary video signals. the circuit is configured to use a first multi-primary video signal to derive a first additive offset to a first primary video signal, to use the first multi-primary video signal to derive a second additive offset to a second primary video signal of the m primary video signals, to add the first additive offset to the first primary video signal, to add the second additive offset to the second primary video signal, and to derive a bit plane based on the first primary signal having the first additive offset added thereto and to transmit the bit plane to the slm to selectively control on and off states of the pixel elements of the slm.
20240250060. CAPILLARY FOR STITCH BOND_simplified_abstract_(texas instruments incorporated)
Inventor(s): Ye Zhuang of Chengdu (CN) for texas instruments incorporated, Huo Yun Duan of Chengdu (CN) for texas instruments incorporated, Zi Qi Wang of Chengdu (CN) for texas instruments incorporated, Xiao Lin Kang of Chengdu (CN) for texas instruments incorporated, Xiaoling Kang of Chengdu (CN) for texas instruments incorporated, Tingting Yu of Chengdu (CN) for texas instruments incorporated
IPC Code(s): H01L23/00
CPC Code(s): H01L24/78
Abstract: an example semiconductor package comprises a semiconductor die having a top surface, a bond pad formed on the top surface, a bond wire having a first end and a second end, wherein the first end is attached to the bond pad. the semiconductor package having a contact pad, wherein the second end of the wire bond is attached to the contact pad by a stitch bond, the stitch bond having a plateau region formed between a cut end and a ramped portion, wherein a bottom surface of the plateau region forms an attachment to the contact pad.
Inventor(s): Makoto Shibuya of Sunnyvale CA (US) for texas instruments incorporated, Kwang-Soo Kim of Sunnyvale CA (US) for texas instruments incorporated
IPC Code(s): H01L25/16, H01L21/56, H01L23/00, H01L23/31, H01L23/495, H01L23/538
CPC Code(s): H01L25/16
Abstract: an electronic device includes a semiconductor die attached to a substrate and coupled to a circuit of the electronic device, an electronic component coupled to the circuit, and a package structure that encloses the semiconductor die, the package structure having an opening that exposes a portion of the electronic component. a method includes attaching a semiconductor die to a substrate or a die attach pad, performing an electrical connection process that couples the semiconductor die to a circuit, forming a package structure that encloses the semiconductor die and having an opening that exposes a metal terminal attached to the substrate, and attaching an electronic component through the opening to the metal terminal.
Inventor(s): Benjamin M. McCue of Knoxville TN (US) for texas instruments incorporated, Ryan Lind of Knoxville TN (US) for texas instruments incorporated
IPC Code(s): H02M3/158, H02M1/00
CPC Code(s): H02M3/158
Abstract: systems, apparatus, articles of manufacture, and methods are disclosed to dynamically limit current for power converters. an example switch control circuitry configured to control a plurality of switches based on a loop voltage to control inductor current through a inductor; loop gain circuitry configured to generate the loop voltage based on an input voltage and a reference voltage; and clamping circuitry configured to clamp the loop voltage after the loop voltage exceeds a threshold, the switch control circuitry configured to clamp the inductor current based on the clamping of the loop voltage, wherein the clamping of the inductor current clamps an input current.
Inventor(s): Zeshan Ahmad of Plano TX (US) for texas instruments incorporated, Mayank Kumar Singh of Mountain View CA (US) for texas instruments incorporated
IPC Code(s): H03F3/08, H03F3/45, H04B1/16
CPC Code(s): H03F3/087
Abstract: in an embodiment, a system includes: an analog-to-digital converter (adc); a receiver path including a transimpedance amplifier having an output coupled to the adc; and a controller coupled to the receiver path and configured to, upon detection of a jamming event of the receiver path, cause an increase in a transconductance of the transimpedance amplifier from a first transconductance value to a second transconductance value.
20240250667. OSCILLATOR WITH FREQUENCY CONTROL_simplified_abstract_(texas instruments incorporated)
Inventor(s): Danielle GRIFFITH of Richardson TX (US) for texas instruments incorporated
IPC Code(s): H03K3/03, H03K17/06, H03K17/687
CPC Code(s): H03K3/0315
Abstract: a circuit includes a ring oscillator, a current source, an amplifier, a resistor-capacitor (rc) network, and a bias circuit. the current source is configured to power the ring oscillator. the amplifier is configured to control the current source. the amplifier has a first amplifier input and a second amplifier input. the rc network is coupled to the first amplifier input. the bias circuit is coupled to the second amplifier input. the bias circuit is configured to selectably set a frequency range of the ring oscillator, and selectably set a frequency of the ring oscillator within the frequency range.
20240250672. SLEW-RATE CONTROL FOR TRANSISTORS_simplified_abstract_(texas instruments incorporated)
Inventor(s): Joseph M. KHAYAT of BEDFORD NH (US) for texas instruments incorporated
IPC Code(s): H03K5/04, H03K3/012, H03K5/08, H03K17/687
CPC Code(s): H03K5/04
Abstract: a circuit includes an avalanche diode having an anode and a cathode. the circuit also includes a buffer stage having a buffer input, a power input and a buffer output, in which the buffer input is coupled to the anode, and the cathode is coupled to the power input. the circuit includes a transistor coupled between the power input and a clamp output. the transistor has a control input coupled to the buffer output, and a loop circuit is coupled between the buffer output and the buffer input. a capacitor is coupled between the buffer input and an output terminal.
Inventor(s): Deric Wayne WATERS of Dallas TX (US) for texas instruments incorporated, Roland SON of Richardson TX (US) for texas instruments incorporated, Sualp ARAS of Dallas TX (US) for texas instruments incorporated, Ralph Braxton WADE, III of McKinney TX (US) for texas instruments incorporated
IPC Code(s): H03K19/0185, G01R19/10
CPC Code(s): H03K19/018592
Abstract: a bidirectional level shifter circuit includes first and second driver circuits, first and second comparators, and a control circuit. the first driver circuit includes a first driver output and a first enable input. the second driver circuit includes a second driver output and a second enable input. the first comparator includes a first comparator output, a first reference input, and a first comparator input that is coupled to the second driver output. the second comparator includes a second comparator output, a second reference input, and a second comparator input is coupled to the first driver output. the control circuit includes a first control input coupled to the first comparator output, a second control input coupled to the second comparator output, a first control output coupled to the first enable input, and a second control output coupled to the second enable input.
Inventor(s): Ajai PAULOSE of Bengaluru (IN) for texas instruments incorporated, Avarind GANESAN of Bengaluru (IN) for texas instruments incorporated
IPC Code(s): H03M1/10, H03M1/08
CPC Code(s): H03M1/1023
Abstract: a system includes: a first device; and a second device coupled to the first device. the second device has a receiver. the receiver has a comparator and a controller. the comparator has an adjustment terminal. the controller has an input and an output. the output of the controller is coupled to the adjustment terminal of the comparator. the controller is configured to: obtain an offset estimation model; receive an input voltage at its input; determine a comparator offset responsive to the offset estimation model and the input voltage; and provide an adjustment control signal to its output responsive to the determined comparator offset.
Inventor(s): Srijan Rastogi of Bengaluru (IN) for texas instruments incorporated, Mayank Garg of Ambala City (IN) for texas instruments incorporated, Anant Shankar Kamath of Bangalore (IN) for texas instruments incorporated
IPC Code(s): H04B3/36, H03F3/45
CPC Code(s): H04B3/36
Abstract: universal serial bus (usb) repeater circuits and methods of operating the same for communicating data signals from a first pair of data terminals to a second pair of data terminals of the repeater. in a first channel, an amplifier stage in a receiver amplifies a differential signal received at the first pair of data terminals to generate a differential signal at first and second output nodes of the receiver, and a transmitting circuit transmits a differential signal at the second pair of data terminals responsive to the differential signal at the first and second output nodes of the receiver. the receiver includes a hysteresis stage that receives an offset in opposition to the differential signal at the first and second output nodes of the receiver. end-of-packet (eop) dribble in usb communications in the hs mode is reduced by the offset at the hysteresis stage.
TEXAS INSTRUMENTS INCORPORATED patent applications on July 25th, 2024
- TEXAS INSTRUMENTS INCORPORATED
- B32B9/00
- B32B9/04
- B82Y30/00
- C01B32/184
- C01B32/19
- C23C18/32
- C23C18/38
- H01M50/00
- CPC B32B9/007
- Texas instruments incorporated
- G01N27/22
- H01L21/48
- H01L21/56
- H01L23/00
- H01L23/31
- H01L23/495
- CPC G01N27/223
- CPC G01N27/225
- G01S1/04
- G01S19/25
- G01S19/30
- CPC G01S1/045
- G01S7/03
- G01S7/35
- H03F3/24
- CPC G01S7/038
- G05F1/575
- H02M3/158
- CPC G05F1/575
- G06F1/28
- G06F1/3206
- G06F1/3234
- G06F1/3287
- G06F9/30
- G06F9/38
- G06F13/26
- CPC G06F1/28
- CPC G06F9/30036
- G06F12/02
- CPC G06F12/0246
- G09G5/06
- CPC G09G5/06
- CPC H01L24/78
- H01L25/16
- H01L23/538
- CPC H01L25/16
- H02M1/00
- CPC H02M3/158
- H03F3/08
- H03F3/45
- H04B1/16
- CPC H03F3/087
- H03K3/03
- H03K17/06
- H03K17/687
- CPC H03K3/0315
- H03K5/04
- H03K3/012
- H03K5/08
- CPC H03K5/04
- H03K19/0185
- G01R19/10
- CPC H03K19/018592
- H03M1/10
- H03M1/08
- CPC H03M1/1023
- H04B3/36
- CPC H04B3/36
