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Create the page "G06F12/1009" on this wiki! See also the search results found.

• Texas instruments incorporated (20250094044). MULTICORE SHARED CACHE OPERATION ENGINE
  [[Category:G06F12/06]] [[Category:G06F12/0811]]
  2 KB (280 words) - 04:35, 24 March 2025
• 18963043. MULTICORE SHARED CACHE OPERATION ENGINE (Texas Instruments Incorporated)
  [[Category:G06F12/06]] [[Category:G06F12/0811]]
  2 KB (280 words) - 05:11, 24 March 2025
• Samsung electronics co., ltd. (20250013578). MEMORY MANAGEMENT METHOD BASED ON VIRTUAL MEMORY AND APPARATUS USING THE SAME
  [[Category:G06F12/1009]] [[Category:G06F12/1036]]
  1 KB (200 words) - 08:31, 25 March 2025
• 18763105. MEMORY MANAGEMENT METHOD BASED ON VIRTUAL MEMORY AND APPARATUS USING THE SAME (Samsung Electronics Co., Ltd.)
  [[Category:G06F12/1009]] [[Category:G06F12/1036]]
  1 KB (200 words) - 08:13, 18 February 2025
• Huawei technologies co., ltd. (20250068569). MEMORY SHARING METHOD AND APPARATUS
  [[Category:G06F12/1009]] [[Category:G06F12/02]]
  1 KB (218 words) - 07:58, 17 March 2025
• 18940993. MEMORY SHARING METHOD AND APPARATUS (HUAWEI TECHNOLOGIES CO., LTD.)
  [[Category:G06F12/1009]] [[Category:G06F12/02]]
  1 KB (218 words) - 09:31, 17 March 2025
• Google llc (20250094353). Memory Migration and Page Fault Avoidance
  [[Category:G06F12/1009]] [[Category:G06F12/0817]]
  1 KB (202 words) - 03:43, 24 March 2025
• 18965439. Memory Migration and Page Fault Avoidance (Google LLC)
  [[Category:G06F12/1009]] [[Category:G06F12/0817]]
  1 KB (202 words) - 04:55, 24 March 2025
• Intel corporation (20250061060). METHOD AND APPARATUS FOR SHARED VIRTUAL MEMORY TO MANAGE DATA COHERENCY IN A HETEROGENEOUS PROCESSING SYSTEM
  [[Category:G06F12/0815]] [[Category:G06F12/0804]]
  1 KB (191 words) - 03:51, 19 March 2025
• Micron technology, inc. (20250013579). STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY
  [[Category:G06F12/1009]] [[Category:G06F12/0815]]
  1 KB (214 words) - 09:59, 25 March 2025
• 18893262. STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY (Micron Technology, Inc.)
  [[Category:G06F12/1009]] [[Category:G06F12/0815]]
  1 KB (214 words) - 08:22, 18 February 2025
• US Patent Application 18229814. CONFIGURABLE CACHE FOR COHERENT SYSTEM simplified abstract
  [[Category:G06F12/084]] [[Category:G06F12/0811]]
  3 KB (397 words) - 06:09, 4 December 2023
• Intel corporation (20250103547). SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE
  [[Category:G06F12/02]] [[Category:G06F12/06]]
  3 KB (501 words) - 01:39, 30 March 2025
• 18906859. SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE (Intel Corporation)
  [[Category:G06F12/02]] [[Category:G06F12/06]]
  3 KB (501 words) - 04:31, 31 March 2025
• Intel corporation (20240403259). COMPRESSION TECHNIQUES simplified abstract
  [[Category:G06F12/02]] [[Category:G06F12/06]]
  4 KB (513 words) - 15:39, 11 December 2024
• Intel corporation (20240403259). COMPRESSION TECHNIQUES
  [[Category:G06F12/02]] [[Category:G06F12/06]]
  4 KB (513 words) - 15:48, 11 December 2024
• Texas instruments incorporated (20250103510). TRACKING STREAMING ENGINE VECTOR PREDICATES TO CONTROL PROCESSOR EXECUTION
  [[Category:G06F12/1045]] [[Category:G06F12/0862]]
  2 KB (248 words) - 03:49, 31 March 2025
• 18973226. TRACKING STREAMING ENGINE VECTOR PREDICATES TO CONTROL PROCESSOR EXECUTION (TEXAS INSTRUMENTS INCORPORATED)
  [[Category:G06F12/1045]] [[Category:G06F12/0862]]
  2 KB (248 words) - 05:10, 31 March 2025
• Intel corporation (20250103546). CACHE STRUCTURE AND UTILIZATION
  [[Category:G06F12/02]] [[Category:G06F12/06]]
  4 KB (590 words) - 01:39, 30 March 2025
• 18906428. CACHE STRUCTURE AND UTILIZATION (Intel Corporation)
  [[Category:G06F12/02]] [[Category:G06F12/06]]
  4 KB (590 words) - 04:31, 31 March 2025

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