Semiconductor Energy Laboratory Co., Ltd. patent applications on August 8th, 2024
Patent Applications by Semiconductor Energy Laboratory Co., Ltd. on August 8th, 2024
Semiconductor Energy Laboratory Co., Ltd.: 26 patent applications
Semiconductor Energy Laboratory Co., Ltd. has applied for patents in the areas of H01L29/786 (9), H01L27/12 (7), H01L29/66 (5), G02F1/1368 (4), G09G3/36 (4) H10K59/38 (2), G09G3/3266 (2), H01M4/364 (1), H10K59/122 (1), H10K50/121 (1)
With keywords such as: layer, electrode, transistor, device, provided, display, material, circuit, semiconductor, and film in patent application abstracts.
Patent Applications by Semiconductor Energy Laboratory Co., Ltd.
Inventor(s): Yuichi YANAGISAWA of Tochigi (JP) for semiconductor energy laboratory co., ltd., Nozomu SUGISAWA of Isehara (JP) for semiconductor energy laboratory co., ltd., Natsuko TAKASE of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): G02F1/1333, G02F1/1337, G02F1/1339, G02F1/1343, G02F1/1368, G06F3/041, G06F3/044, G06F3/14, H05B33/12, H10K50/84, H10K59/128, H10K59/18, H10K59/40, H10K59/86, H10K77/10, H10K102/00
CPC Code(s): G02F1/13336
Abstract: a display device or an electronic device with high portability and browsability is provided. a display device which includes two display panels that overlap with each other and in which the area of a portion where the two display panels overlap with each other is variable is provided. the larger the area where the two display panels overlap with each other is, the smaller the display device becomes. the first display panel includes a first region that performs display. the second display panel includes a second region that performs display, and a third region that is adjacent to the second region and transmits visible light. when the third region overlaps with the side of a surface which performs display of the first region, display can be performed using a seamless large display region.
Inventor(s): Hisao IKEDA of Zama (JP) for semiconductor energy laboratory co., ltd., Yoshiyuki KUROKAWA of Sagamihara (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): G06F3/01, G06T7/70, G06V40/18, H10K39/34
CPC Code(s): G06F3/013
Abstract: an electronic device capable of gaze tracking is provided. the electronic device includes a display apparatus, an image processing portion, and a control portion. the display apparatus includes a light-emitting device and a light-receiving device. the light-emitting device has a function of emitting light to a user's eye as a display image. the light-receiving device has a function of capturing a retina of the user's eye as a captured image. the image processing portion has a function of detecting a macula included in the retina from the captured image and a function of calculating position data of the macula. the control portion has a function of obtaining a position of a user's gaze destination on the display image from the position data of the macula.
Inventor(s): Hidetomo KOBAYASHI of Isehara (JP) for semiconductor energy laboratory co., ltd., Kouhei TOYOTAKA of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): G09G3/3266, G09G3/3233, G09G3/34, G09G3/36, H10K59/121
CPC Code(s): G09G3/3266
Abstract: a display device that can be easily and more flexibly designed is provided. the display device includes a pixel circuit and a driver circuit in a display portion. the driver circuit includes a plurality of pulse output circuits. each of the plurality of pulse output circuits has a function of driving a gate line. the pixel circuit is electrically connected to the gate line. each of the plurality of pulse output circuits includes a first transistor. the pixel circuit includes a second transistor. a layer including the second transistor is over a layer including the first transistor, and the first transistor and the second transistor overlap with each other.
Inventor(s): Atsushi UMEZAKI of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): G09G3/3266, G02F1/1362, G09G3/34
CPC Code(s): G09G3/3266
Abstract: it is an object to decrease the number of transistors connected to a capacitor. in a structure, a capacitor and one transistor are included, one electrode of the capacitor is connected to a wiring, and the other electrode of the capacitor is connected to a gate of the transistor. since a clock signal is input to the wiring, the clock signal is input to the gate of the transistor through the capacitor. then, on/off of the transistor is controlled by a signal which synchronizes with the clock signal, so that a period when the transistor is on and a period when the transistor is off are repeated. in this manner, deterioration of the transistor can be suppressed.
Inventor(s): Munehiro KOZUMA of Atsugi (JP) for semiconductor energy laboratory co., ltd., Tatsuya ONUKI of Atsugi (JP) for semiconductor energy laboratory co., ltd., Takanori MATSUZAKI of Atsugi (JP) for semiconductor energy laboratory co., ltd., Minato ITO of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): G09G3/3275, G09G3/3233, H01L29/786
CPC Code(s): G09G3/3275
Abstract: a semiconductor device having redundancy is provided. the semiconductor device includes a first driver circuit, a second driver circuit, a first selection circuit, a second selection circuit, and a switch circuit. an output terminal of the first driver circuit is electrically connected to an input terminal of the first selection circuit and a first terminal of the switch circuit, and an output terminal of the second driver circuit is electrically connected to an input terminal of the second selection circuit and a second terminal of the switch circuit.
Inventor(s): Shunpei YAMAZAKI of Setagaya, Tokyo (JP) for semiconductor energy laboratory co., ltd., Yasuhiro JINBO of Isehara, Kanagawa (JP) for semiconductor energy laboratory co., ltd., Tomoya AOYAMA of Atsugi, Kanagawa (JP) for semiconductor energy laboratory co., ltd., Daiki NAKAMURA of Atsugi, Kanagawa (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01L21/67
CPC Code(s): H01L21/6719
Abstract: manufacturing equipment with which steps from processing to sealing of an organic compound film can be continuously performed is provided. the manufacturing equipment can continuously perform a patterning step of a light-emitting device and a sealing step to prevent the top surfaces and side surfaces of organic layers from being exposed to the air, which allows formation of the light-emitting device which has a minute structure, high luminance, and high reliability. this manufacturing equipment can be built in an in-line system where apparatuses are arranged according to the order of process steps for the light-emitting device, resulting in high throughput manufacturing.
Inventor(s): Shunpei YAMAZAKI of Tokyo (JP) for semiconductor energy laboratory co., ltd., Naoki OKUNO of Yamato (JP) for semiconductor energy laboratory co., ltd., Tetsuya KAKEHATA of Isehara (JP) for semiconductor energy laboratory co., ltd., Hiroki KOMAGATA of Atsugi (JP) for semiconductor energy laboratory co., ltd., Yuji EGI of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01L21/8234, H01L21/02, H01L29/66, H01L29/786
CPC Code(s): H01L21/823412
Abstract: a manufacturing method of a semiconductor device includes the forming a first oxide over a substrate; depositing a first insulator over the first oxide; forming an opening reaching the first oxide in the first insulator; depositing a first oxide film in contact with the first oxide and the first insulator in the opening; depositing a first insulating film over the first oxide film by a peald method; depositing a first conductive film over the first insulating film; and removing part of the first oxide film, part of the first insulating film, and part of the first conductive film until a top surface of the first insulator is exposed to form a second oxide, a second insulator, and a first conductor. the deposition of the first insulating film is performed while the substrate is heated to higher than or equal to 300�.
Inventor(s): Shunpei YAMAZAKI of Tokyo (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01L27/12, G02F1/1333, G02F1/13357, G02F1/1343, G02F1/1362, G02F1/1368, G09G3/34, G09G3/36, H01L27/15, H01L29/04, H01L29/12, H01L29/24, H01L29/66, H01L29/786, H10K59/121
CPC Code(s): H01L27/1225
Abstract: disclosed is a display device including a transistor showing extremely low off current. in order to reduce the off current, a semiconductor material whose band gap is greater than that of a silicon semiconductor is used for forming a transistor, and the concentration of an impurity which serves as a carrier donor of the semiconductor material is reduced. specifically, an oxide semiconductor whose band gap is greater than or equal to 2 ev, preferably greater than or equal to 2.5 ev, more preferably greater than or equal to 3 ev is used for a semiconductor layer of a transistor, and the concentration of an impurity which serves as a carrier donor included is reduced. consequently, the off current of the transistor per micrometer in channel width can be reduced to lower than 10 za/�m at room temperature and lower than 100 za/�m at 85� c.
20240266359. DISPLAY DEVICE_simplified_abstract_(semiconductor energy laboratory co., ltd.)
Inventor(s): Atsushi UMEZAKI of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01L27/12, G02F1/1333, G02F1/1343, G02F1/1345, G02F1/1362, G02F1/1368, G09G3/3266, G09G3/36, G11C19/28, H01H71/02, H01H71/10, H01L27/105, H01L27/13, H01L29/423, H01L29/786, H10K59/121, H10K59/131
CPC Code(s): H01L27/124
Abstract: by applying an ac pulse to a gate of a transistor which easily deteriorates, a shift in threshold voltage of the transistor is suppressed. however, in a case where amorphous silicon is used for a semiconductor layer of a transistor, the occurrence of a shift in threshold voltage naturally becomes a problem for a transistor which constitutes a part of circuit that generates an ac pulse. a shift in threshold voltage of a transistor which easily deteriorates and a shift in threshold voltage of a turned-on transistor are suppressed by signal input to a gate electrode of the transistor which easily deteriorates through the turned-on transistor. in other words, a structure for applying an ac pulse to a gate electrode of a transistor which easily deteriorates through a transistor to a gate electrode of which a high potential (vdd) is applied, is included.
20240266369. SEMICONDUCTOR DEVICE_simplified_abstract_(semiconductor energy laboratory co., ltd.)
Inventor(s): Atsushi UMEZAKI of Isehara (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01L27/12, G09G3/14, G09G3/32, G09G3/36, G11C19/00, H01L29/786, H03B1/00, H03K3/00, H03K17/687
CPC Code(s): H01L27/1255
Abstract: provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. the semiconductor device includes a first transistor, a second transistor, and a capacitor. one of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. one of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. the first and second transistors have the same conductivity type.
Inventor(s): Takayuki IKEDA of Atsugi, Kanagawa (JP) for semiconductor energy laboratory co., ltd., Tatsuya ONUKI of Atsugi, Kanagawa (JP) for semiconductor energy laboratory co., ltd., Kiyoshi KATO of Atsugi, Kanagawa (JP) for semiconductor energy laboratory co., ltd., Shunpei YAMAZAKI of Setagaya, Tokyo (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01L27/146, H01L23/00
CPC Code(s): H01L27/14634
Abstract: one embodiment of the present invention relates to a highly functional imaging device that can be manufactured through a small number of steps. the imaging device is formed by bonding a plurality of layers or stacks each including a device to each other. a pixel circuit; a memory circuit; and a pixel driver circuit, a driver circuit of the memory circuit, and the like can be provided for a first layer, a second layer, and a third layer, respectively. with such a structure, a small imaging device can be formed. furthermore, wiring delay or the like can be inhibited by stacking the circuits, so that a high-speed operation can be performed.
Inventor(s): Hajime KIMURA of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01L29/66, H01L27/12, H01L29/26, H01L29/45, H01L29/49, H01L29/786
CPC Code(s): H01L29/66969
Abstract: a semiconductor device includes a substrate having an insulating surface; a light-transmitting first electrode provided over the substrate; a light-transmitting second electrode provided over the substrate; a light-transmitting semiconductor layer provided so as to be electrically connected to the first electrode and the second electrode; a first wiring electrically connected to the first electrode; an insulating layer provided so as to cover at least the semiconductor layer; a light-transmitting third electrode provided over the insulating layer in a region overlapping with the semiconductor layer; and a second wiring electrically connected to the third electrode.
Inventor(s): Yasuharu HOSAKA of Tochigi (JP) for semiconductor energy laboratory co., ltd., Yukinori SHIMA of Tatebayashi (JP) for semiconductor energy laboratory co., ltd., Masataka NAKADA of Tochigi (JP) for semiconductor energy laboratory co., ltd., Masami JINTYOU of Shimotsuga (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01L29/786, G02F1/1368, H01L21/426, H01L27/12, H01L29/04, H01L29/423, H01L29/49, H01L29/66, H10K50/115, H10K59/12, H10K59/40
CPC Code(s): H01L29/7869
Abstract: a semiconductor device that includes a transistor is provided. the transistor includes a first conductive film that functions as a first gate electrode, a first gate insulating film, a first oxide semiconductor film that includes a channel region, a second gate insulating film, and a second oxide semiconductor film and a second conductive film that function as a second gate electrode. the second oxide semiconductor film includes a region higher in carrier density than the first oxide semiconductor film. the second conductive film includes a region in contact with the first conductive film.
20240266444. SEMICONDUCTOR DEVICE_simplified_abstract_(semiconductor energy laboratory co., ltd.)
Inventor(s): Shunpei YAMAZAKI of Setagaya (JP) for semiconductor energy laboratory co., ltd., Masayuki SAKAKURA of Isehara (JP) for semiconductor energy laboratory co., ltd., Hideomi SUZAWA of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01L29/786, H01L27/12, H01L27/146, H01L29/04, H01L29/24, H01L29/66, H01L29/78, H10B99/00
CPC Code(s): H01L29/78696
Abstract: a semiconductor device having a structure which can prevent a decrease in electrical characteristics due to miniaturization is provided. the semiconductor device includes, over an insulating surface, a stack in which a first oxide semiconductor layer and a second oxide semiconductor layer are sequentially formed, and a third oxide semiconductor layer covering part of a surface of the stack. the third oxide semiconductor layer includes a first layer in contact with the stack and a second layer over the first layer. the first layer includes a microcrystalline layer, and the second layer includes a crystalline layer in which c-axes are aligned in a direction perpendicular to a surface of the first layer.
Inventor(s): Masahiro TAKAHASHI of Atsugi (JP) for semiconductor energy laboratory co., ltd., Teruaki OCHIAI of Atsugi (JP) for semiconductor energy laboratory co., ltd., Yohei MOMMA of Isehara (JP) for semiconductor energy laboratory co., ltd., Ayae TSURUTA of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01M4/36, H01M4/02, H01M4/505, H01M4/525
CPC Code(s): H01M4/364
Abstract: a positive electrode active material particle with little deterioration is provided. a power storage device with little deterioration is provided. a highly safe power storage device is provided. the positive electrode active material particle includes a first crystal grain, a second crystal grain, and a crystal grain boundary positioned between the crystal grain and the second crystal grain; the first crystal grain and the second crystal grain include lithium, a transition metal, and oxygen; the crystal grain boundary includes magnesium and oxygen; and the positive electrode active material particle includes a region where the ratio of the atomic concentration of magnesium in the crystal grain boundary to the atomic concentration of the transition metal in first crystal grain and the second crystal grain is greater than or equal to 0.010 and less than or equal to 0.50.
Inventor(s): Yohei MOMMA of Isehara (JP) for semiconductor energy laboratory co., ltd., Hiroshi KADOMA of Sagamihara (JP) for semiconductor energy laboratory co., ltd., Yoshihiro KOMATSU of Ebina (JP) for semiconductor energy laboratory co., ltd., Shiori SAGA of Atsugi (JP) for semiconductor energy laboratory co., ltd., Shunpei YAMAZAKI of Tokyo (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01M4/36, H01M4/02, H01M4/485, H01M4/525, H01M4/58, H01M10/0525
CPC Code(s): H01M4/366
Abstract: a positive electrode active material in which a capacity decrease caused by charge and discharge cycles is suppressed is provided. alternatively, a positive electrode active material having a crystal structure that is unlikely to be broken by repeated charging and discharging is provided. the positive electrode active material contains titanium, nickel, aluminum, magnesium, and fluorine, and includes a region where titanium is unevenly distributed, a region where nickel is unevenly distributed, and a region where magnesium is unevenly distributed in a projection on its surface. aluminum is preferably unevenly distributed in a surface portion, not in the projection, of the positive electrode active material.
Inventor(s): Hiroatsu TODORIKI of Atsugi (JP) for semiconductor energy laboratory co., ltd., Yumiko SAITO of Atsugi (JP) for semiconductor energy laboratory co., ltd., Takahiro KAWAKAMI of Atsugi (JP) for semiconductor energy laboratory co., ltd., Kuniharu NOMOTO of Saitama (JP) for semiconductor energy laboratory co., ltd., Mikio YUKAWA of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01M4/583, B82Y30/00, B82Y40/00, C01B32/192, C01B32/23, H01G9/042, H01G11/22, H01G11/32, H01G11/36, H01M4/04, H01M4/133, H01M4/139, H01M4/1393, H01M4/587, H01M4/62, H01M6/16, H01M10/0525, H01M10/0566
CPC Code(s): H01M4/5835
Abstract: the formation method of graphene includes the steps of forming a layer including graphene oxide over a first conductive layer; and supplying a potential at which the reduction reaction of the graphene oxide occurs to the first conductive layer in an electrolyte where the first conductive layer as a working electrode and a second conductive layer with a as a counter electrode are immersed. a manufacturing method of a power storage device including at least a positive electrode, a negative electrode, an electrolyte, and a separator includes a step of forming graphene for an active material layer of one of or both the positive electrode and the negative electrode by the formation method.
Inventor(s): Minoru TAKAHASHI of Matsumoto (JP) for semiconductor energy laboratory co., ltd., Ryota TAJIMA of Isehara (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01M10/04, H01G9/048, H01G9/145, H01G11/78, H01M50/105, H01M50/116, H01M50/119, H01M50/121, H01M50/122, H01M50/124, H01M50/136
CPC Code(s): H01M10/0436
Abstract: a secondary battery suitable for a portable information terminal or a wearable device is provided. an electronic device having a novel structure which can have various forms and a secondary battery that fits the forms of the electronic device are provided. in the secondary battery, sealing is performed using a film provided with depressions or projections that ease stress on the film due to application of external force. a pattern of depressions or projections is formed on the film by pressing, e.g., embossing.
Inventor(s): Shunpei YAMAZAKI of Tokyo (JP) for semiconductor energy laboratory co., ltd., Minoru TAKAHASHI of Nagano (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01M10/0525, H01M4/04, H01M4/13, H01M4/139, H01M4/36, H01M4/62, H01M10/058
CPC Code(s): H01M10/0525
Abstract: the adhesion between metal foil serving as a current collector and a negative electrode active material is increased to enable long-term reliability. an electrode active material layer (including a negative electrode active material or a positive electrode active material) is formed over a base, a metal film is formed over the electrode active material layer by sputtering, and then the base and the electrode active material layer are separated at the interface therebetween; thus, an electrode is formed. the electrode active material particles in contact with the metal film are bonded by being covered with the metal film formed by the sputtering. the electrode active material is used for at least one of a pair of electrodes (a negative electrode or a positive electrode) in a lithium-ion secondary battery.
Inventor(s): Shuhei YOSHITOMI of Ayase, Kanagawa (JP) for semiconductor energy laboratory co., ltd., Kaori OGITA of Isehara, Kanagawa (JP) for semiconductor energy laboratory co., ltd., Shotaro MURATSUBAKI of Hachioji, Tokyo (JP) for semiconductor energy laboratory co., ltd., Atsushi KAWATSUKI of Yokohama, Kanagawa (JP) for semiconductor energy laboratory co., ltd., Mayumi MIKAMI of Atsugi, Kanagawa (JP) for semiconductor energy laboratory co., ltd., Yohei MOMMA of Isehara, Kanagawa (JP) for semiconductor energy laboratory co., ltd., Tetsuya KAKEHATA of Isehara, Kanagawa (JP) for semiconductor energy laboratory co., ltd., Shunpei YAMAZAKI of Setagaya, Tokyo (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H01M10/0562, H01M4/02, H01M4/505, H01M4/525, H01M4/583, H01M10/0525
CPC Code(s): H01M10/0562
Abstract: provided is a secondary battery having a favorable interface contact between an active material and an electrolyte. the secondary battery includes a positive electrode layer, a negative electrode layer, and an electrolyte layer positioned between the positive electrode layer and the negative electrode layer. the positive electrode layer contains a positive electrode active material and a first solid electrolyte, the negative electrode layer contains a negative electrode active material and a second solid electrolyte, the electrolyte layer contains a third solid electrolyte and an ionic liquid, and a space in the third solid electrolyte is impregnated with the ionic liquid. the secondary battery is bendable.
Inventor(s): Tatsuya ONUKI of Atsugi (JP) for semiconductor energy laboratory co., ltd., Yuto YAKUBO of Atsugi (JP) for semiconductor energy laboratory co., ltd., Seiya SAITO of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H10B12/00, G11C5/06, G11C8/08, H01L27/12, H01L29/24, H01L29/786
CPC Code(s): H10B12/00
Abstract: a novel semiconductor device is provided. the semiconductor device includes a driver circuit and a first transistor layer to a third transistor layer. the first transistor layer includes a first memory cell including a first transistor and a first capacitor. the second transistor layer includes a second memory cell including a second transistor and a second capacitor. the third transistor layer includes a switching circuit and an amplifier circuit. the first transistor is electrically connected to a first local bit line. the second transistor is electrically connected to a second local bit line. the switching circuit has a function of selecting the first local bit line or the second local bit line and electrically connecting the selected local bit line to the amplifier circuit. the first transistor layer to the third transistor layer are provided over the silicon substrate. the third transistor layer is provided between the first transistor layer and the second transistor layer.
Inventor(s): Yuki OKAMOTO of Ebina (JP) for semiconductor energy laboratory co., ltd., Takanori MATSUZAKI of Atsugi (JP) for semiconductor energy laboratory co., ltd., Hiroki INOUE of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/30
Abstract: a memory device capable of reading multi-bit data at a time is provided. the memory device includes a first layer and a second layer positioned above or below the first layer. the first layer includes a first transistor and a first capacitor, and the second layer includes a second transistor and a second capacitor. each of the first and second capacitors is a trench capacitor, and the trench length of the second capacitor is larger than the trench length of the first capacitor. a voltage retained in the first capacitor corresponds to a lower bit signal of data, and a voltage retained in the second capacitor corresponds to a higher bit signal of the data.
Inventor(s): Takahiro ISHISONE of Isehara (JP) for semiconductor energy laboratory co., ltd., Nobuharu OHSAWA of Zama (JP) for semiconductor energy laboratory co., ltd., Satoshi SEO of Sagamihara (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H10K50/12, G06F3/041, H10K50/13, H10K101/00, H10K101/30
CPC Code(s): H10K50/121
Abstract: a light-emitting device with high emission efficiency and reliability is provided. the light-emitting device includes a fluorescent light-emitting layer and a phosphorescent light-emitting layer. a host material used in the fluorescent light-emitting layer has a function of converting triplet excitation energy into light emission and a guest material used in the fluorescent light-emitting layer emits fluorescence. the guest material has a molecular structure including a luminophore and a protecting group, and one molecule of the guest material includes five or more protecting groups. the introduction of the protecting groups into the molecule inhibits transfer of triplet excitation energy from the host material to the guest material by the dexter mechanism. an alkyl group or a branched-chain alkyl group is used as the protecting group. the longest wavelength absorption band in the absorption spectrum of the guest material in the phosphorescent light-emitting layer has an overlap with the emission spectrum of the host material in the phosphorescent light-emitting layer.
Inventor(s): Shunpei YAMAZAKI of Setagaya (JP) for semiconductor energy laboratory co., ltd., Shinya SASAGAWA of Chigasaki (JP) for semiconductor energy laboratory co., ltd., Ryota HODO of Atsugi (JP) for semiconductor energy laboratory co., ltd., Kentaro SUGAYA of Isehara (JP) for semiconductor energy laboratory co., ltd., Yoshikazu HIURA of Atsugi (JP) for semiconductor energy laboratory co., ltd., Takahiro FUJIE of Isehara (JP) for semiconductor energy laboratory co., ltd., Yasuhiro JINBO of Isehara (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H10K59/122, H10K59/12, H10K59/80
CPC Code(s): H10K59/122
Abstract: a display device with high display quality is provided. the display device includes a plurality of light-emitting devices each including a pixel electrode, a light-emitting layer, a functional layer, a common layer, and a common electrode in this order and includes an insulating layer positioned between side surfaces of the light-emitting layers adjacent to each other. the light-emitting layer and the functional layer each having an island shape are provided in each light-emitting device, and the plurality of light-emitting devices share the common layer. the common layer and the common electrode are provided to cover the insulating layer. in a cross-sectional view, an end portion of the insulating layer has a tapered shape with a taper angle greater than 0� and less than 90�.
Inventor(s): Tsunenori SUZUKI of Yokohama (JP) for semiconductor energy laboratory co., ltd., Yasuhiro Niikura of Tokyo (JP) for semiconductor energy laboratory co., ltd., Tomoya Hirose of Atsugi (JP) for semiconductor energy laboratory co., ltd., Satoshi Seo of Sagamihara (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H10K59/38, G06F3/041, G09G3/3208, H10K59/12
CPC Code(s): H10K59/38
Abstract: a novel display panel that is highly convenient or reliable is provided. the display panel includes a first pixel; the first pixel includes a first display element, a first color conversion layer, and a first absorption layer; the first display element emits first light; the first absorption layer overlaps with the first display element; and the first absorption layer absorbs the first light. furthermore, the first color conversion layer is sandwiched between the first display element and the first absorption layer; the first color conversion layer converts the first light into second light; and the second light has a spectrum including a high proportion of light with a long wavelength compared with the first light.
Inventor(s): Takayuki IKEDA of Atsugi (JP) for semiconductor energy laboratory co., ltd., Kenichi OKAZAKI of Atsugi (JP) for semiconductor energy laboratory co., ltd., Yoshiaki OIKAWA of Atsugi (JP) for semiconductor energy laboratory co., ltd., Natsuko TAKASE of Isehara (JP) for semiconductor energy laboratory co., ltd., Kensuke YOSHIZUMI of Atsugi (JP) for semiconductor energy laboratory co., ltd.
IPC Code(s): H10K59/38, H10K50/13, H10K50/19, H10K71/60
CPC Code(s): H10K59/38
Abstract: a display apparatus with high resolution or high definition is provided. the display apparatus includes a first light-emitting device, a second light-emitting device, a first insulating layer, a first coloring layer, and a second coloring layer. the first light-emitting device includes a first pixel electrode, a first el layer, and a common electrode that are stacked in this order. the second light-emitting device includes a second pixel electrode, a second el layer, and the common electrode that are stacked in this order. the first coloring layer overlaps with the first light-emitting device. the second coloring layer transmitting light of a color different from a color of light transmitted by the first coloring layer overlaps with the second light-emitting device. the first el layer and the second el layer have the same structure and are separated from each other. an end portion of the first el layer is positioned over the first pixel electrode. an end portion of the second el layer is positioned over the second pixel electrode. the first insulating layer covers side surfaces of the first pixel electrode, the second pixel electrode, the first el layer, and the second el layer. the common electrode is positioned over the first insulating layer.
Semiconductor Energy Laboratory Co., Ltd. patent applications on August 8th, 2024
- Semiconductor Energy Laboratory Co., Ltd.
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