Samsung electronics co., ltd. (20240357801). SEMICONDUCTOR MEMORY DEVICE simplified abstract
Contents
SEMICONDUCTOR MEMORY DEVICE
Organization Name
Inventor(s)
Moonyoung Jeong of Suwon-si (KR)
SEMICONDUCTOR MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240357801 titled 'SEMICONDUCTOR MEMORY DEVICE
The semiconductor memory device described in the abstract consists of a bit line with an active pattern, first and second word lines, a gate insulating pattern, and capacitors connected to the vertical portions of the active pattern.
- The active pattern includes vertical portions facing each other in a first direction and a horizontal portion connecting them.
- The first and second word lines are on the horizontal portion between the vertical portions, extending in a second direction.
- A gate insulating pattern is located between the word lines and the active pattern.
- Capacitors are connected to each of the vertical portions, with a ferroelectric pattern between the first and second electrode patterns.
Potential Applications: - This technology can be used in various memory devices such as DRAMs and SRAMs. - It can also be applied in embedded systems, IoT devices, and consumer electronics.
Problems Solved: - Enhances memory storage capacity and performance. - Improves data retention and reliability in memory devices.
Benefits: - Increased memory density and speed. - Enhanced data security and stability. - Lower power consumption in memory operations.
Commercial Applications: Title: Advanced Semiconductor Memory Devices for High-Performance Computing This technology can be utilized in high-performance computing systems, data centers, and mobile devices to improve overall efficiency and speed of data processing.
Questions about the technology: 1. How does the ferroelectric pattern in the capacitors contribute to the performance of the memory device? 2. What are the specific advantages of having vertical portions in the active pattern of the memory device?
Original Abstract Submitted
a semiconductor memory device includes a bit line extending in a first direction, an active pattern on the bit line, the active pattern including first and second vertical portions facing each other in the first direction and a horizontal portion connecting the first and second vertical portions, first and second word lines on the horizontal portion between the first and second vertical portions, the first and second word lines extending in a second direction crossing the first direction, a gate insulating pattern between the first and second word lines and the active pattern, and a capacitor connected to each of the first and second vertical portions, the capacitor including a first electrode pattern connected to one of the first and second vertical portions, a second electrode pattern on the first electrode pattern, and a ferroelectric pattern between the first electrode pattern and the second electrode pattern.
