Samsung electronics co., ltd. (20240355796). SEMICONDUCTOR PACKAGE simplified abstract
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240355796 titled 'SEMICONDUCTOR PACKAGE
The semiconductor package described in the abstract consists of multiple layers and components, including redistribution substrates, semiconductor chips, mold layers, and conductive bumps.
- The package includes a first redistribution substrate with a semiconductor chip and a mold layer covering it.
- A second redistribution substrate is placed on top of the first mold layer, with a second semiconductor chip on it.
- The second semiconductor chip features a unique design with conductive bumps that do not overlap the first semiconductor chip.
- A mold via connects the second-chip conductive bump to the first redistribution substrate, overlapping the bump.
Potential Applications: - This technology could be used in various electronic devices that require compact and efficient semiconductor packaging. - It may find applications in consumer electronics, automotive systems, and industrial equipment.
Problems Solved: - The design allows for more efficient use of space within the semiconductor package. - It enables better connectivity between semiconductor chips and redistribution substrates.
Benefits: - Improved performance and reliability of electronic devices. - Enhanced compactness and efficiency in semiconductor packaging.
Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Enhanced Performance This technology could revolutionize the semiconductor packaging industry by offering more efficient and compact solutions for various electronic devices. It could lead to advancements in consumer electronics, automotive systems, and industrial equipment, improving overall performance and reliability.
Questions about the technology: 1. How does this semiconductor packaging technology compare to traditional methods? - This technology offers a more efficient use of space and better connectivity between components, leading to improved performance in electronic devices. 2. What are the potential cost implications of implementing this advanced packaging technology? - While initial costs may be higher due to the complexity of the design, the long-term benefits in terms of performance and reliability could outweigh the initial investment.
Original Abstract Submitted
a semiconductor package includes a first redistribution substrate, a first semiconductor chip disposed on the first redistribution substrate, a first mold layer that covers the first semiconductor chip and the first redistribution substrate, a second redistribution substrate disposed on the first mold layer, a second semiconductor chip disposed on the second redistribution substrate, where the second semiconductor chip includes a second-chip first conductive bump that does not overlap the first semiconductor chip, a first sidewall that overlaps the first semiconductor chip, and a second sidewall that does not overlap the first semiconductor chip, wherein the first sidewall and the second sidewall are opposite to each other, and a first mold via that penetrates the first mold layer connects the second-chip first conductive bump to the first redistribution substrate, and overlaps the second-chip first conductive bump.
