Samsung electronics co., ltd. (20240347401). SEMICONDUCTOR PACKAGE simplified abstract
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
KYONG HWAN Koh of Suwon-si (KR)
JONGWAN Kim of Cheonan-si (KR)
YONGKWAN Lee of Hwaseong-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240347401 titled 'SEMICONDUCTOR PACKAGE
The semiconductor package described in the patent application includes a base substrate with metal line patterns on both surfaces, vias connecting the patterns, a semiconductor chip, and a molding member covering the chip and first surface. The base substrate has a recess at a corner that is filled by a protrusion on the molding member.
- Base substrate with metal line patterns on both surfaces
- Vias connecting the metal line patterns
- Semiconductor chip on the first surface
- Molding member covering the chip and first surface
- Recess at a corner of the base substrate filled by a protrusion on the molding member
Potential Applications: - Semiconductor packaging industry - Electronics manufacturing
Problems Solved: - Enhanced protection for semiconductor chips - Improved connectivity between metal line patterns
Benefits: - Increased durability of semiconductor packages - Enhanced performance of electronic devices
Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Enhanced Device Performance This technology can be used in the production of various electronic devices, such as smartphones, computers, and automotive electronics, to improve their performance and durability.
Questions about Semiconductor Packaging Technology: 1. How does the protrusion on the molding member enhance the protection of the semiconductor chip? 2. What are the potential cost implications of implementing this advanced packaging technology in electronic devices?
Frequently Updated Research: Researchers are constantly exploring new materials and techniques to further improve the performance and durability of semiconductor packages. Stay updated on the latest advancements in the field to ensure the use of cutting-edge technology in electronic devices.
Original Abstract Submitted
a semiconductor package includes a base substrate that includes a first surface and a second surface that face each other, a plurality of first metal line patterns disposed on the first surface, a plurality of second metal line patterns disposed on the second surface, a plurality of vias that penetrate the base substrate and connect the first metal line patterns to the second metal line patterns, a semiconductor chip disposed on the first surface, and a molding member that covers the first surface and the semiconductor chip. the base substrate includes at least one recess at a corner of the base substrate. the recess extends from the first surface toward the second surface. the molding member includes a protrusion that fills the recess.
