Samsung electronics co., ltd. (20240321943). SEMICONDUCTOR MEMORY DEVICE simplified abstract
Contents
SEMICONDUCTOR MEMORY DEVICE
Organization Name
Inventor(s)
Hyungsuk Jung of Suwon-si (KR)
SEMICONDUCTOR MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240321943 titled 'SEMICONDUCTOR MEMORY DEVICE
The semiconductor memory device described in the abstract consists of an upper electrode, a lower electrode, an anti-ferroelectric layer with an anti-ferroelectric material, an oxide layer with a high dielectric material on one surface of the anti-ferroelectric layer, and a metal oxide layer on the opposite surface of the anti-ferroelectric layer.
- The device has an upper electrode, lower electrode, anti-ferroelectric layer, oxide layer, and metal oxide layer.
- The oxide layer and metal oxide layer are thinner than the anti-ferroelectric layer.
- The oxide layer contains a high dielectric material.
- The anti-ferroelectric layer contributes to the device's functionality.
Potential Applications:
- Memory storage in electronic devices
- Data retention in volatile memory systems
Problems Solved:
- Improved memory storage capabilities
- Enhanced data retention in volatile memory systems
Benefits:
- Increased efficiency in memory storage
- Enhanced data retention capabilities
Commercial Applications:
- Memory chips for consumer electronics
- Storage devices for data centers
Questions about the technology: 1. How does the anti-ferroelectric layer contribute to the device's performance? 2. What are the advantages of using a high dielectric material in the oxide layer?
Frequently Updated Research: Research on new materials for improving memory storage efficiency and data retention capabilities in semiconductor devices is ongoing.
Original Abstract Submitted
a semiconductor memory device includes an upper electrode, a lower electrode, an anti-ferroelectric layer disposed between the upper electrode and the lower electrode and including an anti-ferroelectric, an oxide layer disposed on a first surface of the anti-ferroelectric layer and including a high dielectric material, and a metal oxide layer disposed on a second surface of the anti-ferroelectric layer opposite to the first surface. a thickness of each of the oxide layer and the metal oxide layer is less than a thickness of the anti-ferroelectric layer.
