Samsung electronics co., ltd. (20240321823). SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME simplified abstract
Contents
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
Organization Name
Inventor(s)
Gongmyeong Kim of Suwon-si (KR)
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240321823 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
The semiconductor package described in the abstract includes a package substrate with multiple protective layers, a semiconductor chip mounted in a flip-chip structure, an underfill material, an interposer, and inter-substrate connection terminals.
- Package substrate with body layer, first protective layer, and second protective layer
- Semiconductor chip mounted in flip-chip structure on first protective layer
- Underfill material in gaps between protective layer and chip, and between connection terminals
- Interposer on semiconductor chip
- Inter-substrate connection terminals on package substrate connecting to interposer
- Underfill with anchor structure extending into first protective layer
Potential Applications: - Electronics manufacturing - Semiconductor industry - Consumer electronics
Problems Solved: - Enhanced reliability of semiconductor packages - Improved electrical connections - Better protection for semiconductor chips
Benefits: - Increased durability - Enhanced performance - Longer lifespan of electronic devices
Commercial Applications: Title: Enhanced Semiconductor Package for Improved Reliability This technology can be used in various commercial applications such as mobile devices, computers, automotive electronics, and industrial equipment. It can improve the reliability and longevity of electronic products, leading to higher customer satisfaction and reduced maintenance costs.
Prior Art: Prior art related to this technology may include patents or research papers on semiconductor packaging, flip-chip structures, underfill materials, and interposer technologies. Researchers can explore databases such as IEEE Xplore, Google Patents, and academic journals for relevant information.
Frequently Updated Research: Researchers in the semiconductor industry are constantly developing new materials and techniques to enhance the reliability and performance of semiconductor packages. Stay updated on the latest advancements in underfill materials, interposer technologies, and protective layers to improve the design and manufacturing processes of semiconductor packages.
Questions about Semiconductor Packages: 1. What are the key factors influencing the reliability of semiconductor packages? 2. How does the design of inter-substrate connection terminals impact the performance of semiconductor packages?
Original Abstract Submitted
provided is a semiconductor package with enhanced reliability and a method of manufacturing the same. the semiconductor package includes a package substrate including a body layer having a central area and a peripheral area, a first protective layer on a top surface of the body layer, and a second protective layer on the first protective layer in the peripheral area, a semiconductor chip mounted on the first protective layer in the central area in a flip-chip structure, an underfill in a gap between the first protective layer and the semiconductor chip and in a gap between the connection terminals, an interposer on the semiconductor chip, and inter-substrate connection terminals on the peripheral area of the package substrate and electrically connecting the package substrate to the interposer, where the underfill has an anchor structure extending into the first protective layer.
