Samsung electronics co., ltd. (20240321815). SEMICONDUCTOR PACKAGE simplified abstract

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SEMICONDUCTOR PACKAGE

Organization Name

samsung electronics co., ltd.

Inventor(s)

Soohyun Nam of Yongin-si (KR)

Younglyong Kim of Anyang-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240321815 titled 'SEMICONDUCTOR PACKAGE

The semiconductor package described in the abstract includes an interposer substrate with three semiconductor chips facing each other, underfill parts between the chips and the substrate, and side-fill parts extending from the side walls of the chips.

  • Interposer substrate with three semiconductor chips facing each other
  • Underfill parts between the chips and the substrate
  • Side-fill parts extending from the side walls of the chips

Potential Applications: - Semiconductor industry for advanced packaging solutions - Electronics manufacturing for compact and efficient devices

Problems Solved: - Improved thermal management in semiconductor packages - Enhanced structural integrity and reliability of the package

Benefits: - Higher performance and efficiency in electronic devices - Reduction in size and weight of semiconductor packages

Commercial Applications: Title: Advanced Semiconductor Packaging Solutions for Enhanced Performance This technology can be used in various electronic devices such as smartphones, laptops, and IoT devices to improve overall performance and reliability.

Questions about the technology: 1. How does the side-fill part contribute to the structural integrity of the semiconductor package? 2. What are the potential cost implications of implementing this packaging solution in mass production?

Frequently Updated Research: Researchers are constantly exploring new materials and designs to further enhance the performance and reliability of semiconductor packages. Stay updated on the latest advancements in the field for potential improvements in this technology.


Original Abstract Submitted

a semiconductor package including an interposer substrate, first to third semiconductor chips on the interposer substrate to face each other, an underfill part between each of the first to third semiconductor chips and the interposer substrate, a first side-fill part extending upward from a lower end of side walls of the first to third semiconductor chips, and a second side-fill part between the side walls of the first to third semiconductor chips and extending from the first side-fill part to an upper end of the side walls of the first to third semiconductor chips may be provided.