Samsung electronics co., ltd. (20240321712). CHIP-ON-FILM PACKAGE simplified abstract
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CHIP-ON-FILM PACKAGE
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CHIP-ON-FILM PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240321712 titled 'CHIP-ON-FILM PACKAGE
The chip-on-film (COF) package described in the patent application consists of a base film with upper patterns on one surface and lower patterns on the other surface, connected by inner via plugs passing through the base film.
- The COF package includes a base film with upper patterns on one surface and lower patterns on the other surface.
- An upper insulating layer covers the upper patterns and part of the lower patterns on the base film.
- Inner via plugs pass through the base film, connecting the upper patterns to the lower patterns.
- The inner patterns of the upper patterns are connected to the lower patterns through the inner via plugs.
- At least one inner pattern is connected to the inner via plug in a region not covered by the upper insulating layer.
Potential Applications: - This technology can be used in the manufacturing of electronic devices such as smartphones, tablets, and laptops. - It can also be applied in the automotive industry for various electronic components.
Problems Solved: - The COF package provides a compact and efficient way to connect upper and lower patterns on a film, reducing the overall size of electronic devices. - It ensures reliable electrical connections between different patterns on the film.
Benefits: - Improved space utilization in electronic devices. - Enhanced electrical connectivity and reliability. - Cost-effective manufacturing process.
Commercial Applications: - The COF package can be utilized by electronics manufacturers to produce smaller and more efficient devices. - It can also benefit companies in the automotive industry looking to enhance the performance of electronic components in vehicles.
Questions about COF technology: 1. How does the COF package improve the efficiency of electronic devices? 2. What are the key advantages of using inner via plugs in the COF package?
Frequently Updated Research: - Stay updated on the latest advancements in COF technology to ensure optimal utilization in various industries.
Original Abstract Submitted
a chip-on-film (cof) package including a base film having facing first and second surfaces; a first upper pattern on the first surface and extending in a first direction; second upper patterns on the first surface, the second upper patterns including inner patterns and outer patterns that are spaced apart from each other in the first direction; an upper insulating layer covering the first upper pattern and part of the second upper patterns; lower patterns on the second surface and electrically connecting the inner patterns to the outer patterns; and inner via plugs passing through the base film and electrically connecting the inner patterns of the second upper patterns to the lower patterns, wherein at least one inner pattern is electrically connected to the inner via plug in a region that is not covered by the upper insulating layer.
