Samsung electronics co., ltd. (20240290720). INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE simplified abstract
Contents
INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE
Organization Name
Inventor(s)
Seunggeol Ryu of Suwon-si (KR)
Kyungsuk Oh of Seongnam-si (KR)
Keungbeum Kim of Hwaseong-si (KR)
Eonsoo Jang of Hwaseong-si (KR)
INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240290720 titled 'INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE
The abstract describes an integrated circuit semiconductor device with various layers and components arranged on a substrate.
- The device includes a rail through via passing through the substrate, connecting different layers.
- A cell-level portion on the first surface includes a buried rail, local conductive interconnect, cell via, and transistor.
- A signal wiring-level portion above the cell-level portion consists of multi-layer interconnect layers and vias.
- A dummy substrate is placed on the signal wiring-level portion.
- A bonding-level portion bonds the signal wiring-level portion to the dummy substrate with a bonding pad.
- A power delivery network-level portion under the substrate includes lower multi-layer interconnect layers and vias.
- An external connection terminal is located under the power delivery network-level portion.
Potential Applications: - This technology can be used in the manufacturing of advanced integrated circuits for various electronic devices. - It can improve the performance and efficiency of semiconductor devices.
Problems Solved: - Enhances the connectivity and functionality of integrated circuits. - Provides a more efficient power delivery network for semiconductor devices.
Benefits: - Improved performance and efficiency of integrated circuits. - Enhanced connectivity and functionality of semiconductor devices.
Commercial Applications: - This technology can be applied in the production of high-performance electronic devices such as smartphones, computers, and IoT devices.
Questions about the technology: 1. How does this technology improve the efficiency of power delivery in semiconductor devices? 2. What are the key advantages of using a rail through via in integrated circuit design?
Original Abstract Submitted
an integrated circuit semiconductor device includes a substrate having a first surface and a second surface opposite the first surface; a rail through via passing between the first surface and the second surface of the substrate; a cell-level portion arranged on the first surface and comprising a buried rail connected to the rail through via, a local conductive interconnect, a cell via connected to the local conductive interconnect, and a transistor connected to the local conductive interconnect; a signal wiring-level portion arranged on the cell-level portion and comprising a plurality of upper multi-layer interconnect layers connected to the local conductive interconnect via the cell via and upper vias connecting the upper multi-layer interconnect layers to each other; a dummy substrate arranged on the signal wiring-level portion; a bonding-level portion arranged between the signal wiring-level portion and the dummy substrate and bonding the signal wiring-level portion to the dummy substrate, and comprising a bonding pad connected to the upper via; a power delivery network-level portion arranged under the second surface of the substrate and comprising a plurality of lower multi-layer interconnect layers connected to the rail through via and lower vias connecting the lower multi-layer interconnect layers to each other; and an external connection terminal arranged under the power delivery network-level portion and connected to the lower multi-layer interconnect layers.
