Samsung electronics co., ltd. (20240237348). SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME simplified abstract

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SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

Organization Name

samsung electronics co., ltd.

Inventor(s)

Hwayeong Lee of Suwon-si (KR)

Hunmo Yang of Suwon-si (KR)

Seulji Song of Suwon-si (KR)

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240237348 titled 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

The semiconductor memory device described in the abstract consists of a semiconductor substrate with multiple word line layers, insulating layers, a channel structure, and a bit line.

  • The word line layers on the substrate have an insulating line and a word line, with a meandering shape.
  • Insulating layers separate the word line layers vertically on the substrate.
  • The channel structure includes a channel region and a gate dielectric layer.
  • The bit line is connected to the channel structure and extends horizontally in a perpendicular direction.

Potential Applications: This technology can be used in various memory storage devices, such as solid-state drives, smartphones, and computers.

Problems Solved: The design of this semiconductor memory device allows for efficient data storage and retrieval, improving overall performance.

Benefits: Enhanced memory capacity, faster data access speeds, and increased reliability are some of the key benefits of this technology.

Commercial Applications: This technology has significant commercial potential in the semiconductor industry, particularly in the development of advanced memory solutions for consumer electronics and data storage systems.

Questions about the technology: 1. How does the meandering shape of the word line layers impact the performance of the semiconductor memory device? 2. What are the specific advantages of using insulating layers between the word line layers in this design?


Original Abstract Submitted

a semiconductor memory device includes a semiconductor substrate; a plurality of word line layers on the semiconductor substrate, each word line layer of the plurality of word line layers including an insulating line and a word line; a plurality of insulating layers in spaces between the plurality of word line layers, the plurality of insulating layers being apart from each other in a vertical direction on the semiconductor substrate; a channel structure extending in the vertical direction on the semiconductor substrate, the channel structure including a channel region and a gate dielectric layer surrounding the channel region; and a bit line on the channel structure, the bit line extending in a first horizontal direction perpendicular to the vertical direction and being connected to the channel structure, wherein the word line of each word line layer of the plurality of word line layers has a meandering shape.