Samsung electronics co., ltd. (20240234369). SEMICONDUCTOR PACKAGE simplified abstract

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SEMICONDUCTOR PACKAGE

Organization Name

samsung electronics co., ltd.

Inventor(s)

Seokgeun Ahn of Cheonan-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240234369 titled 'SEMICONDUCTOR PACKAGE

The semiconductor package described in the patent application includes a package substrate with a concave portion and a through-hole with oblique side surfaces.

  • The through-hole has a smaller diameter at the top surface than at the bottom surface of the concave portion.
  • Multiple first semiconductor chips are placed on the top surface of the package substrate.
  • A second semiconductor chip is positioned on the bottom surface of the concave portion.
  • A molding portion fills the through-hole, covering both the first and second semiconductor chips.

Potential Applications:

  • This semiconductor package design could be used in various electronic devices requiring compact and efficient semiconductor chip placement.
  • It may find applications in industries such as consumer electronics, automotive, telecommunications, and more.

Problems Solved:

  • The design addresses the challenge of efficiently arranging multiple semiconductor chips in a limited space within a semiconductor package.
  • It provides a solution for optimizing the use of space while maintaining proper chip functionality and protection.

Benefits:

  • Improved efficiency in semiconductor chip placement within a package.
  • Enhanced protection and organization of multiple semiconductor chips.
  • Potential for increased performance and reliability in electronic devices.

Commercial Applications:

  • The technology could be valuable for semiconductor manufacturers looking to enhance the design and functionality of their products.
  • It may lead to the development of more compact and powerful electronic devices for consumers.

Questions about the Semiconductor Package Design: 1. How does the concave portion of the package substrate contribute to the overall design? 2. What are the advantages of having a molding portion covering the semiconductor chips within the through-hole?


Original Abstract Submitted

a semiconductor package is provided. the semiconductor package includes: a package substrate having a first surface, a second surface that is provided opposite the first surface and has a concave portion, and a through-hole having a side surface that is oblique with respect to the first surface, and a first diameter of a first opening of the through-hole defined through the first surface being less than a second diameter of a second opening of the through-hole defined through a bottom surface of the concave portion; a plurality of first semiconductor chips provided on the first surface; a second semiconductor chip provided on the bottom surface; and a molding portion provided in the through-hole, and covering the plurality of first semiconductor chips and the second semiconductor chip.

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