Samsung electronics co., ltd. (20240213113). SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME simplified abstract
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SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
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SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240213113 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
The semiconductor package described in the patent application consists of multiple layers and components, including redistribution layers, dies, through-vias, molding materials, and a heat dissipation member.
- The package includes a first redistribution layer, at least one lower die, a first through-via, and a first molding material that molds these components together.
- A second redistribution layer is placed on top of the lower die, through-via, and molding material, followed by at least one upper die with a specific thickness range.
- A second through-via and a second molding material are added to encapsulate the upper die and connect it to the lower layers.
- A heat dissipation member is placed on top of the upper die and through-via to help dissipate heat effectively.
Potential Applications: - This semiconductor package design can be used in various electronic devices such as smartphones, tablets, laptops, and IoT devices. - It can also be applied in automotive electronics, medical devices, and industrial equipment where efficient heat dissipation is crucial.
Problems Solved: - The package addresses the challenge of heat dissipation in densely packed electronic devices. - It provides a compact and reliable solution for integrating multiple dies in a single package.
Benefits: - Improved thermal performance and reliability of electronic devices. - Enhanced overall performance and longevity of the semiconductor package. - Cost-effective manufacturing process for complex electronic systems.
Commercial Applications: - The technology can be utilized by semiconductor manufacturers, electronics companies, and OEMs looking to enhance the performance and reliability of their products. - It has the potential to drive innovation in the consumer electronics market and other industries requiring advanced semiconductor packaging solutions.
Questions about the technology: 1. How does the specific thickness range of the upper die contribute to the overall performance of the semiconductor package? 2. What are the key factors influencing the selection of materials for the molding process in this semiconductor package design?
Original Abstract Submitted
a semiconductor package includes: a first redistribution layer; at least one lower die on the first redistribution layer; a first through-via on the first redistribution layer; a first molding material that molds the first redistribution layer, the at least one lower die, and the first through-via; a second redistribution layer on the at least one lower die, the first through-via, and the first molding material; at least one upper die on the second redistribution layer and having a thickness between 1.2 and 1.7 times, including endpoints, greater than a thickness of the at least one lower die; a second through-via on the second redistribution layer; a second molding material that molds the second redistribution layer, the at least one upper die, and the second through-via; and a heat dissipation member on the at least one upper die and the second through-via, wherein the heat dissipation member contacts the second through-via.
