Samsung electronics co., ltd. (20240184630). DEVICE AND METHOD WITH BATCH NORMALIZATION simplified abstract

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DEVICE AND METHOD WITH BATCH NORMALIZATION

Organization Name

samsung electronics co., ltd.

Inventor(s)

Jung Ho Ahn of Seoul (KR)

Sun Jung Lee of Seoul (KR)

Jae Wan Choi of Seoul (KR)

Seung Hwan Hwang of Seongnam-si (KR)

DEVICE AND METHOD WITH BATCH NORMALIZATION - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240184630 titled 'DEVICE AND METHOD WITH BATCH NORMALIZATION

Simplified Explanation

The patent application describes a device and method with batch normalization for an accelerator system. The system includes core modules, local reduction operation modules, a global reduction operation module, and a normalization operation module.

  • Core modules with multiple cores perform convolution operations using feature map data and weights.
  • Local reduction operation modules next to core modules calculate local statistical values.
  • Global reduction operation module generates global statistical values based on local values.
  • Normalization operation module normalizes feature map data based on global statistical values.

Potential Applications

The technology can be applied in image processing, deep learning, and artificial intelligence systems.

Problems Solved

The innovation addresses issues related to data normalization and statistical value generation in parallel processing systems.

Benefits

The system improves the efficiency and accuracy of convolution operations in accelerators.

Potential Commercial Applications

Potential commercial applications include computer vision systems, autonomous vehicles, and medical imaging devices.

Possible Prior Art

Prior art may include similar systems for data normalization and statistical value calculation in parallel processing units.

Unanswered Questions

1. How does the system handle large-scale datasets in real-time applications? 2. What are the energy consumption implications of implementing this technology in hardware accelerators?


Original Abstract Submitted

a device and method with batch normalization are provided. an accelerator includes: core modules, each core module including a respective plurality of cores configured to perform a first convolution operation using feature map data and a weight; local reduction operation modules adjacent to the respective core modules, each including a respective plurality of local reduction operators configured to perform a first local operation that obtains first local statistical values of the corresponding core module; a global reduction operation module configured to perform a first global operation that generates first global statistical values of the core module based on the first local statistical values of the core modules; and a normalization operation module configured to perform a first normalization operation on the feature map data based on the first global statistical values.