Samsung electronics co., ltd. (20240162133). SEMICONDUCTOR PACKAGE simplified abstract

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SEMICONDUCTOR PACKAGE

Organization Name

samsung electronics co., ltd.

Inventor(s)

MYUNGSAM Kang of Suwon-si (KR)

YOUNGCHAN Ko of Seoul (KR)

JEONGSEOK Kim of Cheonan-si (KR)

KYUNG DON Mun of Hwaseong-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240162133 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The semiconductor package described in the patent application includes a package substrate, an interposer substrate with redistribution substrates, semiconductor chips, and a connection substrate. The interposer molding layer separates the redistribution substrates, while the connection substrate has a connection hole for the semiconductor chips.

  • Package includes package substrate, interposer substrate, redistribution substrates, semiconductor chips, and connection substrate
  • Interposer molding layer separates redistribution substrates
  • Connection substrate has connection hole for semiconductor chips

Potential Applications

The technology described in the patent application could be applied in the manufacturing of advanced semiconductor packages for various electronic devices such as smartphones, tablets, laptops, and other consumer electronics.

Problems Solved

This technology solves the problem of efficiently connecting multiple semiconductor chips in a compact and reliable manner, allowing for increased functionality and performance in electronic devices.

Benefits

The benefits of this technology include improved performance, increased functionality, reduced size, and enhanced reliability of semiconductor packages used in electronic devices.

Potential Commercial Applications

The technology described in the patent application could be commercially applied in the semiconductor industry for the production of advanced semiconductor packages for consumer electronics, automotive applications, industrial equipment, and other electronic devices.

Possible Prior Art

One possible prior art for this technology could be the use of interposer substrates in semiconductor packaging to improve connectivity and performance of electronic devices.

Unanswered Questions

How does this technology compare to existing semiconductor packaging solutions?

The article does not provide a direct comparison between this technology and existing semiconductor packaging solutions in terms of performance, cost, or reliability.

What are the specific manufacturing processes involved in producing this semiconductor package?

The article does not detail the specific manufacturing processes involved in producing the semiconductor package described in the patent application.


Original Abstract Submitted

disclosed is a semiconductor package comprising a package substrate, an interposer substrate on the package substrate and including a first redistribution substrate, a second redistribution substrate on a bottom surface of the first redistribution substrate, and an interposer molding layer between the first redistribution substrate and the second redistribution substrate, a connection substrate on the interposer substrate and having a connection hole that penetrates the connection substrate, a first semiconductor chip on the interposer substrate and in the connection hole, a second semiconductor chip on the interposer substrate, in the connection hole and horizontally spaced apart from the first semiconductor chip, and a connection semiconductor chip in the interposer molding layer and on the bottom surface of the first redistribution substrate.