Samsung electronics co., ltd. (20240161821). WRITE ASSIST CIRCUIT FOR STATIC RANDOM-ACCESS MEMORY (SRAM) simplified abstract

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WRITE ASSIST CIRCUIT FOR STATIC RANDOM-ACCESS MEMORY (SRAM)

Organization Name

samsung electronics co., ltd.

Inventor(s)

Poornima Venkatasubramanian of Bengaluru (IN)

Pushp Khatter of Bengaluru (IN)

Lava Kumar Pulluru of Bengaluru (IN)

Manish Chandra Joshi of Bengaluru (IN)

Ved Prakash of Bengaluru (IN)

Anurag Kumar of Bengaluru (IN)

Surendra Deshmukh of Bengaluru (IN)

WRITE ASSIST CIRCUIT FOR STATIC RANDOM-ACCESS MEMORY (SRAM) - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240161821 titled 'WRITE ASSIST CIRCUIT FOR STATIC RANDOM-ACCESS MEMORY (SRAM)

Simplified Explanation

The patent application describes a write assist circuit for SRAM bitcells, consisting of two power control circuits each with two switches of different drive strengths, controlled by column select lines, power control lines, and bit lines to alter power supply to the inverters of the bitcells.

  • The write assist circuit includes two power control circuits with switches of different drive strengths.
  • The switches are controlled by column select lines, power control lines, and bit lines to adjust power supply to the inverters of the SRAM bitcells.

Potential Applications

The technology can be applied in:

  • Memory devices
  • Integrated circuits

Problems Solved

The write assist circuit helps in:

  • Improving write performance in SRAM bitcells
  • Reducing power consumption

Benefits

The benefits of this technology include:

  • Enhanced reliability of memory devices
  • Increased speed of write operations

Potential Commercial Applications

The write assist circuit technology can be utilized in:

  • Semiconductor manufacturing
  • Memory chip production

Possible Prior Art

One possible prior art for this technology could be:

  • Write assist circuits in other types of memory devices

Unanswered Questions

How does the write assist circuit impact the overall power consumption of the SRAM device?

The write assist circuit helps in reducing power consumption by optimizing power supply to the bitcells.

What is the impact of the write assist circuit on the speed of read operations in the SRAM device?

The write assist circuit primarily focuses on improving the write performance of the SRAM bitcells, but its impact on read operations needs further investigation.


Original Abstract Submitted

a write assist circuit includes a first power control circuit and second power control circuit, each comprising a first switch and second switch. the first switch of first power control circuit has first drive strength and is configured to be controlled by a column select line, a power control line, a first bit line, and a power supply. the first switch of the second power control circuit has the first drive strength and is configured to be controlled by the column select line, the power control line, a second bit line, and the power supply. the second switch has a second drive strength and is configured to be controlled by the power control line. the first switches are configured to be controlled using input data on first- and second-bit line, respectively, for altering power supply to first inverter and second inverter of sram bitcell.