Samsung display co., ltd. (20240292661). DISPLAY DEVICE simplified abstract
Contents
DISPLAY DEVICE
Organization Name
Inventor(s)
JINSEON Kwak of Yongin-si (KR)
DISPLAY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240292661 titled 'DISPLAY DEVICE
The abstract describes a display device with a substrate containing two well areas with different voltages, each area hosting specific transistors in separate pixel circuits.
- The display device includes a substrate with a first well area and a second well area with different voltages.
- The first pixel circuit consists of a transistor on the first well area and another on the second well area.
- The second pixel circuit comprises a transistor on the first well area and another on the second well area.
Potential Applications: - This technology could be used in various types of display devices such as LCDs, OLEDs, or microLEDs. - It may find applications in smartphones, tablets, laptops, monitors, and televisions.
Problems Solved: - Helps in improving the efficiency and performance of display devices. - Enables better control over pixel circuits and voltage distribution.
Benefits: - Enhanced display quality and resolution. - Lower power consumption and improved battery life in portable devices. - Increased overall performance and reliability of display screens.
Commercial Applications: - Display device manufacturers can integrate this technology into their products to offer better visual experiences to consumers. - Companies involved in the electronics industry can utilize this innovation to stay competitive in the market.
Questions about the technology: 1. How does the different voltage distribution in the well areas impact the overall performance of the display device? 2. What specific advantages does the use of separate pixel circuits bring to the functionality of the display technology?
Original Abstract Submitted
a display device includes: a substrate including: a first well area; and a second well area spaced from the first well area, the second well area having a voltage different from a voltage of the first well area; a first pixel circuit including: a first transistor located on the first well area; and a second transistor located on the second well area; and a second pixel circuit including: a third transistor located on the first well area; and a fourth transistor located on the second well area.
