Samsung Electronics Co., Ltd. patent applications on March 20th, 2025
Patent Applications by Samsung Electronics Co., Ltd. on March 20th, 2025
Samsung Electronics Co., Ltd.: 202 patent applications
Samsung Electronics Co., Ltd. has applied for patents in the areas of H01L23/00 (27), H01L23/31 (13), H01L23/498 (12), H01L29/423 (10), G06F3/06 (10) H01L23/49838 (3), H01L23/5283 (3), G06F3/0659 (3), H10B12/315 (3), H10B12/482 (2)
With keywords such as: device, layer, including, configured, substrate, data, direction, memory, semiconductor, and structure in patent application abstracts.
Patent Applications by Samsung Electronics Co., Ltd.
Inventor(s): Hongki KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): A44C9/00
CPC Code(s): A44C9/0053
Abstract: an electronic device for charging a wearable device includes a housing including a first region for mounting the wearable device and a second region surrounding the first region; a support structure on the first region, configured to supply power to the wearable device, including a first supporting part movable with respect to the housing and a second supporting part facing the first supporting part; and a control structure coupled with the support structure. the control structure may be configured to adjust a distance between the first supporting part and the second supporting part by moving the first supporting part with respect to the housing to fasten the wearable device to the first region through the first supporting part and the second supporting part.
Inventor(s): Jaejin KIM of Suwon-si KR for samsung electronics co., ltd., Kanghoon KIM of Suwon-si KR for samsung electronics co., ltd., Heejun KANG of Suwon-si KR for samsung electronics co., ltd., Yongwook KIM of Suwon-si KR for samsung electronics co., ltd., Sojeong YU of Suwon-si KR for samsung electronics co., ltd., Jiwoong CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): A47J27/21, H05B6/06, H05B6/12
CPC Code(s): A47J27/21158
Abstract: provided is a cooking appliance configured to maintain heat retention of contents. the cooking appliance is configured to, when entering a heat retention mode, compare a temperature of the contents measured via a temperature sensor with a target heat retention temperature, and when the temperature of the contents is equal to or greater than the target heat retention temperature, transmit power control information to a wireless power transmission device, the power control information indicating to suspend transmission of first power and then to re-transmit the first power after an elapse of a preset time.
20250089979. DISHWASHER_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Johannes BÜSING of Suwon-si KR for samsung electronics co., ltd., Jisun YANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): A47L15/42, B01D29/03, B01D29/31, B01D29/56
CPC Code(s): A47L15/4206
Abstract: a dishwasher may comprise: a tub forming a washing chamber; a sump comprising a bottom portion, a side portion, a water storage chamber formed by the bottom portion and the side portion and configured to store water in the tub, and a first coupling portion formed on the side portion; and a filter coupleable to and decoupleable from the water storage chamber to filter foreign substances from the water. the filter comprises a second coupling portion which rotates to be coupled to the first coupling portion. while the second coupling portion is coupled to the first coupling portion, the second coupling portion holds the first coupling portion in place along a vertical direction of the washing chamber.
Inventor(s): Suhas BETTAPALLI NAGARAJ of State College PA US for samsung electronics co., ltd., Yashas Malur Saidutta of Menlo Park CA US for samsung electronics co., ltd., Rakshith Sharma Srinivasa of Sunnyvale CA US for samsung electronics co., ltd., Jaejin Cho of Mountain View CA US for samsung electronics co., ltd., Ching-Hua Lee of Mountain View CA US for samsung electronics co., ltd., Chouchang Yang of San Jose CA US for samsung electronics co., ltd., Yilin Shen of Mountain View CA US for samsung electronics co., ltd., Hongxia Jin of San Jose CA US for samsung electronics co., ltd.
IPC Code(s): A61B5/021, A61B5/00, A61B5/024, A61B5/318
CPC Code(s): A61B5/02125
Abstract: a method for performing cuffless blood pressure (bp) measurement, including: obtaining a first physiological signal and a second physiological signal associated with a user; providing the first physiological signal as an input to a first transformer model; providing the second physiological signal as an input to a second transformer model; providing an output of the first transformer model and an output of the second transformer model as inputs to a third transformer model; providing an output of the third transformer model to at least one bp estimation model; and generating an estimated bp value corresponding to the first physiological signal and the second physiological signal based on an output of the at least one bp estimation model
Inventor(s): Chanwon LEE of Suwon-si KR for samsung electronics co., ltd., Doyoon KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): A61M21/02, A61M21/00, G16H40/63
CPC Code(s): A61M21/02
Abstract: a sleep management system includes: receiving, by a hub device, first data collected by a first sensor and second data collected by a second sensor; obtaining, by the hub device, first processed data by processing the first data and second processed data by processing the second data; transmitting, by the hub device, the first processed data and the second processed data to a user device; obtaining, by the user device, sleep state information by inputting the first processed data and the second processed data to a machine learning model of the user device, wherein the sleep state information is associated with a sleep state of a user; and transmitting, by the user device, the sleep state information to a server device.
Inventor(s): Junghwi EUN of Suwon-si KR for samsung electronics co., ltd., Chanwon LEE of Chanwon KR for samsung electronics co., ltd.
IPC Code(s): A61M21/02
CPC Code(s): A61M21/02
Abstract: disclosed is a sleep management system including at least one sensor that to detects a biometric signal of a user, at least one electronic device, and a hub device that communicates with the at least one sensor and the at least one electronic device. the hub device identifies, based on the biometric signal of the user, a stage as a sleep preparation stage, a sleeping stage, or an awake stage, and transmits, to the at least one electronic device, a control command to control the at least one electronic device based on the identified stage.
Inventor(s): Junsuk LIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): B08B1/30, B08B1/10, B24D11/00, H01L23/00
CPC Code(s): B08B1/30
Abstract: a cleaning apparatus for a wire clamp includes: a cleaner that cleans the wire clamp that clamps a wire; a supplying roller that supplies a cleaning tape to the cleaner; a first guide roller that applies a tension to the cleaning tape that is supplied from the supplying roller to the cleaner; a collecting roller that collects the cleaning tape, which cleans the wire clamp, from the cleaner; and a second guide roller that applies a tension to the cleaning tape that is collected from the cleaner by the collecting roller.
Inventor(s): Sang Jine PARK of Suwon-si KR for samsung electronics co., ltd., Ji Hwan PARK of Suwon-si KR for samsung electronics co., ltd., Kun Tack LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): B08B7/00, H01L21/67
CPC Code(s): B08B7/0021
Abstract: a substrate processing apparatus includes a reactor having a processing space formed therein, a fluid supply unit supplying a supercritical fluid into the processing space of the reactor, and a controller controlling the reactor and the fluid supply unit. the controller controls, in response to whether a state of the supercritical fluid supplied to the reactor satisfies a set condition, the reactor and the fluid supply unit to perform one of cleaning of the processing space by using the supercritical fluid and drying of a substrate seated in the processing space by using the supercritical fluid.
Inventor(s): Daejung KIM of Seoul KR for samsung electronics co., ltd., Minyoung KANG of Seoul KR for samsung electronics co., ltd., Sungsoo KIM of Yongin-si KR for samsung electronics co., ltd., Sohee KIM of Sejong-si KR for samsung electronics co., ltd., Yongsoo YOO of Daegu KR for samsung electronics co., ltd.
IPC Code(s): B25J9/16, B25J11/00, B25J19/02
CPC Code(s): B25J9/163
Abstract: a method includes performing a substrate processing process by carrying a substrate into a chamber, and disposing the substrate in a loading region of the chamber, capturing an image of a lower surface of the substrate to acquire a first image, identifying particle patterns formed on the lower surface of the substrate in the substrate processing process, and an edge of the substrate, from the first image, calculating a first alignment error value of a deviation between an approximate position value for the center of the loading region calculated from the particle patterns and an approximate position value for a center of the substrate calculated from the edge of the substrate, and determining a point in time for teaching a transfer robot that deposits the substrate into the chamber, based on the first alignment error value.
Inventor(s): Xiaoran FAN of Secaucus NJ US for samsung electronics co., ltd., Daewon LEE of Princeton NJ US for samsung electronics co., ltd., Lawrence Jackel of Holmdel NJ US for samsung electronics co., ltd., Richard Howard of HighlandPark NJ US for samsung electronics co., ltd., Ibrahim Volkan Isler of Saint Paul MN US for samsung electronics co., ltd.
IPC Code(s): B25J13/08, B25J9/16, B25J19/02, G06F3/041, G06F3/043
CPC Code(s): B25J13/084
Abstract: a tactile sensing system of a robot may include: a plurality of piezoelectric elements disposed at an object, and including a transmission (tx) piezoelectric element and a reception (rx) piezoelectric element; and at least one processor configured to: control the tx piezoelectric element to generate an acoustic wave having a chirp spread spectrum (css) at every preset time interval, along a surface of the object; receive, via the rx piezoelectric element, an acoustic wave signal corresponding to the generated acoustic wave; select frequency bands from a plurality of frequency bands of the acoustic wave signal; and estimate a location of a touch input on the surface of the object by inputting the acoustic wave signal of the selected frequency bands into a neural network configured to provide a touch prediction score for each of a plurality of predetermined locations on the surface of the object.
Inventor(s): Jong Hoon WON of Suwon-si KR for samsung electronics co., ltd., Deuk Kyu MOON of Suwon-si KR for samsung electronics co., ltd., Shang Hyeun PARK of Suwon-si KR for samsung electronics co., ltd., Tae-Gon KIM of Suwon-si KR for samsung electronics co., ltd., Dongjin YUN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): C09D11/50, B82Y20/00, B82Y40/00, C09D11/037, C09D11/107, C09D11/52, C09K11/02, C09K11/62, G02F1/13357, H01L33/50, H10K59/38
CPC Code(s): C09D11/50
Abstract: an ink composition including a semiconductor nanoparticle, a first organic ligand, and a polymerizable monomer; and a semiconductor nanoparticle-polymer composite prepared therefrom. the semiconductor nanoparticle includes a group 11-13-16 compound including silver, indium, gallium, and sulfur. the first organic ligand includes an aromatic group and fluorine, and in the ink composition, the amount of the semiconductor nanoparticles is about 2 weight percent to about 70 weight percent based on a total weight of the ink composition.
Inventor(s): Jinbum Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): C23C16/46, C23C16/44, C23C16/455, C23C16/48, C23C16/52, H01L21/02
CPC Code(s): C23C16/46
Abstract: a semiconductor processing apparatus includes a support configured to support a wafer, a chamber including an upper dome and a lower dome, a facility cover that at least partially surrounds the chamber, a pre-heating unit that is below the support and is configured to heat the wafer, an upper lamp that is on the chamber and is configured to heat the wafer, a first process gas supply unit configured to supply a first process gas to the chamber, a second process gas supply unit configured to supply a second process gas to the chamber, a valve that is between the second process gas supply unit and the chamber, a pump that is connected to the chamber and is configured to discharge gas from the chamber, and a control unit, where the pre-heating unit includes a first lamp that is different from the upper lamp.
Inventor(s): Jaeryong PARK of Suwon-si KR for samsung electronics co., ltd., Byeongcheol YOON of Suwon-si KR for samsung electronics co., ltd., Younghak KONG of Suwon-si KR for samsung electronics co., ltd., Seulgi LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): D06F29/00, D06F33/32, D06F34/26
CPC Code(s): D06F29/005
Abstract: a clothes treating system may include a washing machine including a tub; a dryer including a heat pump and a fan; a first flow path; a damper to open and close the first flow path; a second flow path; a humidity sensor to detect humidity inside the tub; and a controller configured to: determine whether to perform a tub drying cycle, based on the detected humidity, and based on determining to perform the tub drying cycle, open the first flow path with the damper, operate the heat pump to heat air, and operate the fan to move the heated air through the first flow path, so that air flows into the tub through the first flow path and moisture from the tub is absorbed by the air and flows into the dryer through the second flow path.
Inventor(s): Sungmo LEE of Suwon-si KR for samsung electronics co., ltd., Seunghoon KIM of Suwon-si KR for samsung electronics co., ltd., Junhyun PARK of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): D06F33/40, D06F103/46, D06F105/46
CPC Code(s): D06F33/40
Abstract: a washing machine that minimizes noise of a motor while maintaining deceleration of the motor is provided. the washing machine includes a drum, a motor configured to rotate the drum, an inverter circuit configured to drive the motor, memory, comprising one or more storage media, storing instructions, and one or more processors communicatively coupled to the inverter circuit and the memory. the instructions, when executed by the one or more processors individually or collectively, cause the washing machine to control the inverter circuit based on a d-axis current command value and a q-axis current command value and control the inverter circuit to perform a soft brake for a preset time and control the inverter circuit to perform a short brake based on an elapse of the preset time, for decelerating the motor.
Inventor(s): Hyomin AHN of Suwon-si KR for samsung electronics co., ltd., Jehyung CHO of Suwon-si KR for samsung electronics co., ltd., Jeongil KANG of Suwon-si KR for samsung electronics co., ltd., Seunghoon KIM of Suwon-si KR for samsung electronics co., ltd., Junhyun PARK of Suwon-si KR for samsung electronics co., ltd., Sungmo LEE of Suwon-si KR for samsung electronics co., ltd., Seunghun LEE of Suwon-si KR for samsung electronics co., ltd., Junghyun LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): D06F34/10, D06F34/05, D06F34/08, D06F34/28, H02P3/14
CPC Code(s): D06F34/10
Abstract: a washing machine including a motor regenerative braking configuration uses a buck power converter capable of reducing a direct current (dc) voltage, in association with charging an energy storage device when a voltage of a dc link capacitor becomes greater than or equal to a certain voltage. the washing machine uses the buck power converter in association with discharging the energy storage device and charging the dc link capacitor when the voltage of the dc link capacitor decreases. the washing machine may utilize regenerative braking energy by reducing or increasing a voltage amount provided from the energy storage device to a load by using a power conversion device.
Inventor(s): Eunho YANG of Suwon-si KR for samsung electronics co., ltd., Mincheol YUN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): F04B39/02, F04B35/04
CPC Code(s): F04B39/0246
Abstract: a compressor according to an example of the disclosure may comprise a case storing oil in a lower portion thereof, a stator disposed in the case, a rotor rotated by an electromagnetic interaction with the stator, a rotation shaft coupled with the rotor, and having a hollow portion therein, and an oil pickup part having one end received in the hollow portion and the other end fixed to the stator, wherein the oil pickup part may include a bridge portion connecting the one end and the other end, and at least a portion of which is bent multiple times.
20250093046. COOKING APPARATUS_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jihun HWANG of Suwon-si KR for samsung electronics co., ltd., Junyoung LEE of Suwon-si KR for samsung electronics co., ltd., Sungwook KANG of Suwon-si KR for samsung electronics co., ltd., Moonkyu KIM of Suwon-si KR for samsung electronics co., ltd., Geunyong PARK of Suwon-si KR for samsung electronics co., ltd., Jonghoon LEE of Suwon-si KR for samsung electronics co., ltd., Hongman CHANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): F24C7/08, F24C3/12
CPC Code(s): F24C7/082
Abstract: a cooking apparatus includes a housing, a heat source on one side of the housing, a control panel couplable to the housing, a knob rotatably mountable on the control panel to operate the heat source and movable rearwardly, a stopper between the control panel and the knob and including an anti-rotation portion configured to prevent a rotation of the knob, a button movably couplable to the knob in a left-to-right direction, and a locking pin accommodated in the anti-rotation portion and secured to the button so as to move along the button. the locking pin is deviated from the anti-rotation portion based on movement of the button, the knob is rotatable while the knob is moved rearwardly and the locking pin is deviated from the anti-rotation portion, and the knob is rotated to operate the heat source.
20250093051. OUTDOOR UNIT OF AIR CONDITIONER_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jungwon KIM of Suwon-si KR for samsung electronics co., ltd., Jungho YU of Suwon-si KR for samsung electronics co., ltd., Hyeongju KIM of Suwon-si KR for samsung electronics co., ltd., Woong SUN of Suwon-si KR for samsung electronics co., ltd., Kwangnam SHIN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): F24F1/24, F24F13/02, F24F13/20
CPC Code(s): F24F1/24
Abstract: an outdoor unit of the air conditioner includes: a heat exchange room, a machine room, a partition, a control box accommodating a pcb in the machine room, a heat sink discharging heat from the pcb, and a duct discharging heat from the heat sink to the heat exchange room. the duct includes a duct inlet introducing air, a duct outlet discharging air to the heat exchange room, a first flow path extending from the duct inlet in a first direction along a first part of the heat sink, and a second flow path connecting the first flow path to the duct outlet, in which a second part of the heat sink which extends from the first part in the first direction, is positioned. a width of the second flow path in a second direction is greater than a width of the first flow path in the second direction.
Inventor(s): Woonghee LEE of Suwon-si KR for samsung electronics co., ltd., Soonwon AHN of Suwon-si KR for samsung electronics co., ltd., Joonho YOON of Suwon-si KR for samsung electronics co., ltd., Wonhee LEE of Suwon-si KR for samsung electronics co., ltd., Jangjung LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): F24F8/22, A61L9/20
CPC Code(s): F24F8/22
Abstract: provided is an air conditioner including: a housing including an inlet and an outlet; a heat exchanger within the housing, wherein the heat exchanger is configured to heat exchange with air drawn in through the inlet; a blower fan configured to cause the heat exchanged air to be discharged through the outlet; and a sterilizer configured to irradiate light toward the blower fan; wherein the sterilizer includes: a first light-emitting diode (led) including a first irradiation surface; and a second led including a second irradiation surface, wherein the first irradiation surface faces a first direction, and wherein the second irradiation surface faces a second direction different from the first direction.
Inventor(s): Changhyun PARK of Suwon-si KR for samsung electronics co., ltd., Huiyoung KIM of Suwon-si KR for samsung electronics co., ltd., Seoyoung CHO of Suwon-si KR for samsung electronics co., ltd., Nakhyun KIM of Suwon-si KR for samsung electronics co., ltd., Juyoung KIM of Suwon-si KR for samsung electronics co., ltd., Juwan PARK of Suwon-si KR for samsung electronics co., ltd., Wonhee LEE of Suwon-si KR for samsung electronics co., ltd., Changwoo JUNG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): F24F13/20, F24F8/10
CPC Code(s): F24F13/20
Abstract: an air purifier is provided. the air purifier includes a first air purification module including a coupling body, a second air purification module arranged on top of the first air purification module and including a coupling plate, a holder configured to be coupled to the coupling body and arranged between the first air purification module and the second air purification module, and a rotation member configured to be coupled to the coupling plate and arranged between the holder and the first air purification module, wherein the second air purification module coupled to the rotation member is rotated with respect to the first air purification module coupled to the holder.
20250093180. TEST SOCKET FOR A COMPONENT_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jee-Hoon Ka of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G01D3/036, H05B1/02
CPC Code(s): G01D3/036
Abstract: a test apparatus includes an image sensor module including a controller configured to generate a pulse width modulation signal to control a temperature of an image sensor module to be tested, and a test socket configured to emit heat to the image sensor module based on the pulse width modulation signal. the controller may control a duty ratio of the pulse width modulation signal based on a current temperature of the image sensor module, a target temperature and a criteria temperature range, and the criteria temperature range is a temperature range within a preset range from the target temperature.
Inventor(s): Unjeong KIM of Suwon-si KR for samsung electronics co., ltd., Hojung KIM of Suwon-si KR for samsung electronics co., ltd., Hyungbin SON of Seoul KR for samsung electronics co., ltd., Suyeon LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G01N21/33, G01N21/17, G01N21/27, G01N21/47
CPC Code(s): G01N21/33
Abstract: an imaging apparatus may include a light source emitting linear light, a light reflector configured to reflect the linear light incident from the light source unit, a first filter configured to filter the linear light reflected from the light reflector, a light transmission reflector configured to reflect the linear light passing through the first filter toward an object and transmit light incident from the object, a second filter configured to filter the light that has passed through the light transmission reflector after being incident from the object, and a camera configured to capture the light passing through the second filter.
Inventor(s): Donguk PARK of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G01R31/28, H01L23/00, H01L23/538, H01L25/065
CPC Code(s): G01R31/2884
Abstract: provided is a semiconductor device including a first transmission pad configured to output a data signal; a second transmission pad configured to output a clock signal; a data transmission circuit connected to the first transmission pad and comprising a data driver configured to generate the data signal; a clock transmission circuit connected to the second transmission pad and comprising a clock driver configured to generate the clock signal; a core circuit configured to control the data driver and the clock driver; and at least one buffer, wherein each buffer of the at least one buffer comprises: an input terminal connected to at least one of an output terminal of the data driver and an output terminal of the clock driver; and an output terminal connected to the core circuit.
Inventor(s): Suyeon LEE of Suwon-Si KR for samsung electronics co., ltd., Sangeun Mun of Suwon-Si KR for samsung electronics co., ltd., Hyochul Kim of Suwon-Si KR for samsung electronics co., ltd., Sookyoung Roh of Suwon-Si KR for samsung electronics co., ltd.
IPC Code(s): G02B5/26
CPC Code(s): G02B5/26
Abstract: a spectral filter includes a first resonance structure and a meta device disposed on the first resonance structure. the meta device includes a plurality of first beam steering regions, in which an incidence angle of an incident light is adjusted differently to be emitted, wherein each first beam steering region of the plurality of first beam steering regions includes a plurality of nanostructures, each nanostructure of the plurality of nanostructures having a shape dimension corresponding to a sub-wavelength of the incident light.
Inventor(s): Junghoon Kang of Suwon-si KR for samsung electronics co., ltd., Daegon Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G02B6/42, H01L23/00, H01L23/13, H01L23/48, H01L23/498, H01L23/538, H01L25/16, H01L27/144
CPC Code(s): G02B6/4231
Abstract: a semiconductor package includes a package substrate including an alignment hole extending inwardly from a side surface of the package substrate, a photonic integrated circuit chip disposed on the package substrate, the of the package substrate chip including a groove extending inwardly from a side surface of the pic chip and a photo-electron conversion unit including an edge coupler, and an optical fiber connector including a frame, an optical fiber mounted in the groove of the of the package substrate chip and passing through the frame, and an alignment pin extending from the frame to an inside of the alignment hole, wherein the edge coupler is located at one end of the photo-electron conversion unit.
Inventor(s): Bonkon KOO of Suwon-si KR for samsung electronics co., ltd., Kyookeun LEE of Suwon-si KR for samsung electronics co., ltd., Doyoun KIM of Suwon-si KR for samsung electronics co., ltd., Sunghwan SHIN of Suwon-si KR for samsung electronics co., ltd., Jongchul CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G02B27/00, G02B5/30, G02B27/28
CPC Code(s): G02B27/0093
Abstract: provided are an electronic device for eye tracking, and a method of operating the electronic device. the electronic device generates a plurality of light beams through a polarization filter and a polarization change element, or a plurality of light sources, and obtains a coded image through a metalens configured to refract the generated plurality of light beams into different paths. the electronic device obtains gaze information of a user, based on the coded image, and track the gage of the user.
Inventor(s): Jaeseung CHUNG of Suwon-si KR for samsung electronics co., ltd., Seokil MOON of Suwon-si KR for samsung electronics co., ltd., Hoon SONG of Suwon-si KR for samsung electronics co., ltd., Jungkwuen AN of Suwon-si KR for samsung electronics co., ltd., Changkun LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G02B27/01, G02B5/12, G02B27/28
CPC Code(s): G02B27/0101
Abstract: a display system is provided. the display system includes an electronic device including a plurality of projectors emitting a light for providing a three-dimensional (3d) image, and a screen including a geometric phase layer and a retroreflection layer, the geometric phase layer refracts light incident from the plurality of projectors in different directions according to a polarization of the light and the retroreflection layer reflects light incident from the geometric phase layer in an opposite direction to an incident direction, wherein, based on the polarization of the light emitted from the plurality of projectors being a first polarization from among a right-circularly polarization and a left-circularly polarization, the emitted light is refracted in a first direction by the geometric phase layer, the light refracted in the first direction is reflected in an opposite direction to the first direction by the retroreflection layer, and the reflected light is refracted in a second direction toward a predetermined location corresponding to both eyes of a user by the geometric phase layer, and wherein, based on the polarization of the light emitted from the plurality of projectors being a second polarization, the emitted light is refracted in a third direction different from the first direction by the geometric phase layer, the light refracted in the third direction is reflected in an opposite direction to the third direction by the retroreflection layer, and the reflected light is refracted in a fourth direction different from the second direction by the geometric phase layer.
20250093692. DISPLAY DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Daegun HONG of Suwon-si KR for samsung electronics co., ltd., Byoungjung Kim of Suwon-si KR for samsung electronics co., ltd., Sungdo Jo of Suwon-si KR for samsung electronics co., ltd., Byeonghwan Choi of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G02F1/1333
CPC Code(s): G02F1/13332
Abstract: a display apparatus includes a display panel displaying an image; a top chassis provided along an outer periphery of the display panel and supporting the display panel, the top chassis including a magnet fastening portion therein; a chassis cover provided on an exterior of the top chassis and covering the top chassis; a magnet provided on the magnet fastening portion and configured to allow the chassis cover to be detachably mounted to the top chassis; and an elastic bracket configured to fasten the magnet to the magnet fastening portion, the elastic bracket may include a bracket body to which the magnet is mounted and an interference portion configured to interfere with the magnet fastening portion.
20250093702. DISPLAY APPARATUS_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Ajeong KANG of Suwon-si KR for samsung electronics co., ltd., Songhyeon Kim of Suwon-si KR for samsung electronics co., ltd., Hansol Lee of Suwon-si KR for samsung electronics co., ltd., Sunghee Wi of Suwon-si KR for samsung electronics co., ltd., Dukjin Jeon of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G02F1/13357, G02F1/1335
CPC Code(s): G02F1/133608
Abstract: a display apparatus includes: a display panel; light sources configured to emit light; a plurality of board bars on which the light sources are mounted, the plurality of board bars being spaced apart from each other along a first direction and extending in a second direction; a bottom chassis; and a plurality of bar fixers configured to fix the plurality of board bars to the bottom chassis. each of the plurality of board bars includes: a central extending portion extending in a center of each board bar in the second direction; and a coupling portion located on the central extending portion of each of the plurality of board bars and located on one side in the first direction with respect to one light source among the light sources mounted on each of the plurality of board bars. each of the plurality of bar fixers are disposed on each coupling portion.
Inventor(s): Akio Misaka of Suwon-si KR for samsung electronics co., ltd., Bongkeun Kim of Suwon-si KR for samsung electronics co., ltd., Ran Lee of Suwon-si KR for samsung electronics co., ltd., Sanghwa Lee of Suwon-si KR for samsung electronics co., ltd., Wonjoo Im of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G03F1/24, G03F7/00
CPC Code(s): G03F1/24
Abstract: a photomask for a photolithography process includes a mask substrate, a reflective multilayer on the mask substrate, and a light absorber pattern on the reflective multilayer and having hole patterns, wherein the hole patterns include a main hole pattern for pattern transfer onto a wafer, first sub-resolution assist feature (sraf) hole patterns arranged at regular intervals to provide honeycomb lattices in a first region centered around the main hole pattern and having a first pitch less than or equal to a diffraction limit in the photolithography process, and second sraf hole patterns arranged at regular intervals to surround the main hole pattern and the first sraf patterns and providing honeycomb lattices in a second region centered around the main hole pattern and surrounding the first region, the second sraf hole patterns being arranged with a second pitch less than or equal to the diffraction limit in the photolithography process.
Inventor(s): Chawon Koh of Suwon-si KR for samsung electronics co., ltd., Hyo Jae Yoon of Seoul KR for samsung electronics co., ltd., Tsunehiro Nishi of Suwon-si KR for samsung electronics co., ltd., Gayeong Lim of Seoul KR for samsung electronics co., ltd.
IPC Code(s): G03F7/004, C07F7/22
CPC Code(s): G03F7/0042
Abstract: the present invention relates to photoresist compositions and methods of forming patterns using a photoresist composition. disclosed is a photoresist composition including an organometallic compound including a ring including a metal, a first heteroatom coordinated to the metal, and a second heteroatom covalently bonded to the metal, and an aromatic ring substituted or fused to the ring; and a solvent.
Inventor(s): DAIKI MINAMI of Suwon-si KR for samsung electronics co., ltd., JINJOO KIM of Suwon-si KR for samsung electronics co., ltd., HYUNJI SONG of Suwon-si KR for samsung electronics co., ltd., JI YOUNG PARK of Suwon-si KR for samsung electronics co., ltd., SEUNGYEOL BAEK of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G03F7/00, G03F7/40, G06F30/20
CPC Code(s): G03F7/705
Abstract: an apparatus includes a processor, a memory electrically connected to the processor and that stores instructions, and a storage unit that stores a photoresist molecular model, a surfactant molecular model, an additive molecular model and a solvent molecular model. the processor is configured by the instructions to perform a molecular dynamics simulation of a cell in which are placed photoresist molecules based on the photoresist molecular model, surfactant molecules based on the surfactant molecular model, additive molecules based on the additive molecular model, and solvent molecules based on the solvent molecular model, and compute a number of first surfactant molecules located in the cell in a vicinity of an interface between a photoresist pattern that includes the photoresist molecules and a solvent that includes the solvent molecules, and a number of second surfactant molecules located in the cell in a vicinity of a surface of the solvent.
Inventor(s): Jongkeun KIM of Suwon-si KR for samsung electronics co., ltd., Myungchul Ryu of Suwon-si KR for samsung electronics co., ltd., Giyun Lee of Suwon-si KR for samsung electronics co., ltd., Minsung Lee of Suwon-si KR for samsung electronics co., ltd., Iksu Jung of Suwon-si KR for samsung electronics co., ltd., Yonghwa Han of Suwon-si KR for samsung electronics co., ltd., Seunghyun Hwang of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F1/16, E05D5/14
CPC Code(s): G06F1/1681
Abstract: an hinge module configured to pivotably couple first and second housings, includes a hinge bracket, a first rotation member coupled with the first housing and disposed on the hinge bracket pivotably or rotatably around a first folding axis, a second rotation member coupled with the second housing and disposed on the hinge bracket pivotably or rotatably around a second folding axis, a cam member on the hinge bracket to be linearly movable, and an elastic member providing elastic force to the cam member in a direction in which the first rotation member and the second rotation member are brought into close contact. the cam member is configured to press at least part of the first rotation member in a direction crossing the first folding axis or at least part of the second rotation member in a direction crossing the second folding axis based on elastic force of the elastic member.
Inventor(s): Sangmin LEE of Suwon-si KR for samsung electronics co., ltd., Sungyong BANG of Suwon-si KR for samsung electronics co., ltd., Jongwoo KIM of Suwon-si KR for samsung electronics co., ltd., Hakryoul KIM of Suwon-si KR for samsung electronics co., ltd., Mooyoung KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F1/20, G05B11/42, G06F1/08, G06F11/30
CPC Code(s): G06F1/206
Abstract: an electronic device includes: one or more processors; and memory storing instructions that, when executed by the one or more processors, cause the electronic device to: measure a surface temperature of the electronic device; monitor a load of hardware and an occurrence of preset events; determine a proportional-integral-differential (pid) level of the electronic device based on the surface temperature; set each of a first minimum clock of a first limit clock of a central processing unit (cpu) and a second minimum clock of a second limit clock of a graphics processing unit (gpu), based on the pid level and the load; and determine, such that the surface temperature converges to a first target temperature corresponding to the pid level, the first limit clock to be greater than or equal to the first minimum clock and the second limit clock to be greater than or equal to the second minimum clock.
Inventor(s): Weiming LI of Beijing CN for samsung electronics co., ltd., SoonYong CHO of Suwon-si KR for samsung electronics co., ltd., Lin MA of Beijing CN for samsung electronics co., ltd., Chaoqun ZHUANG of Beijing CN for samsung electronics co., ltd., Jingrui SONG of Beijing CN for samsung electronics co., ltd., Qiang WANG of Beijing CN for samsung electronics co., ltd., Young Hun SUNG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/01, G06T7/246, G06T7/73, G06V40/18
CPC Code(s): G06F3/013
Abstract: an electronic device may operate a plurality of light sources, where each light source operates according to a light source code of a light source code set, each light source code being unique with respect to each other light source code, capture a glint signal corresponding to light emitted from the plurality of light sources through an event camera, obtain glint information from event data from the event camera, estimate a corneal sphere center position and an eye rotation center position based on the glint information, and determine three-dimensional (3d) gaze-related information based on the corneal sphere center position and the eye rotation center position.
20250093971. DISPLAY DEVICE AND METHOD THEREOF_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Hyun-Ho KIM of Seoul KR for samsung electronics co., ltd., Chang-joo Jung of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/0338, G06F3/023, G06F3/0482, G06F3/04842, G06F3/04895, H04N21/422
CPC Code(s): G06F3/0338
Abstract: a display device is provided, which includes a jog switch which performs a moving operation in a plurality of directions and a push operation, a display unit which displays a first user interface (ui) for adjusting a channel or a volume of the display device or a second ui for adjusting other functions of the display device in accordance with a first operation of the jog switch, and a control unit which adjusts a selected function of the display device in accordance with a second operation of the jog switch in which is performed in a state where the first ui or the second ui is displayed. the jog switch is formed to project for a predetermine height from a surface of the display device, and thus a user can find the jog switch easily and promptly even is the jog switch is obstructed from view.
Inventor(s): Seungik LEE of Suwon-si KR for samsung electronics co., ltd., Jaeyong KIM of Suwon-si KR for samsung electronics co., ltd., Heungsuk KANG of Suwon-si KR for samsung electronics co., ltd., Minsup KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/041, G06F3/042, H04N23/20, H04N23/56, H04N23/71, H04N23/76, H04N25/61
CPC Code(s): G06F3/0418
Abstract: a projector is provided. the projector includes: a projection part including a light source configured to project an image, an infrared emitter comprising circuitry configured to emit infrared ray to a projection area where the image is projected, an infrared camera module including an infrared camera configured to generate an image by photographing the projection area using an image sensor, a memory storing correction data including correction values for correcting brightness of the image, and at least one processor configured to: correct brightness of an image obtained through the infrared camera module using the correction data, and identify whether a touch input for the projected image is entered based on the corrected brightness, wherein the correction data is generated based on first correction data and second correction data, the first correction data includes correction values for correcting a decrease in intensity of the infrared ray according to a distance from the infrared emitter, and the second correction data includes correction values for correcting lens shading.
Inventor(s): Sangbum YOUM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/042, G06F1/16, G06F3/02
CPC Code(s): G06F3/042
Abstract: an electronic device, according to one embodiment, may receive an input for a first button from among a plurality of buttons. the electronic device may execute, in response to the input, a first function from among a plurality of functions assigned to the first button, while being in a first state in which an external object contacting at least some region of a housing is identified on the basis of a sensor. the electronic device may execute, in response to the input, a second function from among the plurality of functions assigned to a combination of the first button and a second button different from the first button from among the plurality of buttons, while being in a second state in which release of the external object is identified on the basis of the sensor, the second state being different from the first state.
Inventor(s): Doo-hwan KIM of Suwon-si KR for samsung electronics co., ltd., Kang-tae KIM of Seongnam-si KR for samsung electronics co., ltd., Chul-Joo KIM of Suwon-si KR for samsung electronics co., ltd., Tae-Soo KIM of Suwon-si KR for samsung electronics co., ltd., Young-Seok LEE of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/0483, G06F3/0482, G06F3/04842, G06F3/04845, G06F3/0486, G06F9/451
CPC Code(s): G06F3/0483
Abstract: a method and a device for managing a tab window indicating a group including heterogeneous applications. the method includes outputting a display window comprising at least one or more objects for executing one or more applications on a terminal window, receiving a user input that selects the at least one or more objects and moves the selected at least one or more objects to a region excluding the display window, generating an application group comprising at least one or more applications corresponding to the selected at least one or more objects according to the received user input, and outputting a tab window indicating the generated application group to the terminal window.
Inventor(s): Byeongju LEE of Suwon-si KR for samsung electronics co., ltd., Jangwon SEO of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/0485, G06F3/0481
CPC Code(s): G06F3/0485
Abstract: an electronic device which comprises: a display; and at least one processor which controls the display to display a user interface (ui) screen comprising a plurality of graphic user interface (gui) items and indicating a focus gui as any one gui item from among the plurality of gui items, and controls the display to move and display the plurality of gui items along one direction according to a preset navigation input. based on the preset navigation input, size information of the plurality of gui items included in a section to be scrolled is identified, a scroll speed is identified based on the size information of the plurality of gui items, and movement and display the plurality of gui items along one direction is controlled based on the scroll speed.
Inventor(s): Byeonghui KIM of Suwon-si KR for samsung electronics co., ltd., Seongho Roh of Suwon-si KR for samsung electronics co., ltd., Hyeongyu Min of Suwon-si KR for samsung electronics co., ltd., Jisoo Kim of Suwon-si KR for samsung electronics co., ltd., Hyunkyo Oh of Suwon-si KR for samsung electronics co., ltd., Han Kyoo Lee of Suwon-si KR for samsung electronics co., ltd., Kibeen Jung of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/061
Abstract: a storage device includes: at least one nonvolatile memory device configured to store or read data; and at least one controller configured to: control the at least one nonvolatile memory device, perform at least one workload of a plurality of workloads, based on at least one parameter, perform a tuning for improvement of a performance and a quality-of-service (qos) conformity with a first storage device associated with the workload, and wherein the at least one controller is further configured to individually perform the tuning for each of the plurality of workloads that are different kinds.
Inventor(s): SUK-HYUN LIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0611
Abstract: a memory device according to some embodiments includes a plurality of memory banks, a plurality of registers, a data i/o buffer configured to transmit and receive data, and a control logic configured to receive a low latency bit and an address that is preset according to a type of the data. the control logic is configured to determine a logic level of the low latency bit. based on the low latency bit, the control logic is configured to store the data in a memory bank corresponding to the address among the plurality of memory banks or a register corresponding to the address among the plurality of registers or reads the data from the memory bank corresponding to the address or the register corresponding to the address.
Inventor(s): Woohyun Kang of Suwon-si KR for samsung electronics co., ltd., Su Chang Jeon of Suwon-si KR for samsung electronics co., ltd., Suhyun Kim of Suwon-si KR for samsung electronics co., ltd., Hyuna Kim of Suwon-si KR for samsung electronics co., ltd., Youngdeok Seo of Suwon-si KR for samsung electronics co., ltd., Hyunkyo Oh of Suwon-si KR for samsung electronics co., ltd., Donghoo Lim of Suwon-si KR for samsung electronics co., ltd., Byungkwan Chun of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0619
Abstract: disclosed is a method of operating a storage controller which communicates with a non-volatile memory device. the method includes providing a read command to the non-volatile memory device, receiving first read data and first distribution information corresponding to the read command from the non-volatile memory device, determining whether an error of the first read data is uncorrectable, and updating offset information of a history table in the storage controller based on the first distribution information, in response to determining that the error of the first read data is correctable.
Inventor(s): Jaesub KIM of Suwon-si KR for samsung electronics co., ltd., Jaeyoung KWON of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0631
Abstract: a storage device includes at least one non-volatile memory device, and processing circuitry configured to control the non-volatile memory device and communicate with at least one external host device through at least one interface channel, wherein the processing circuitry is further configured to, monitor performances of a plurality of virtual functions, generate status information of the plurality of virtual functions based on the monitored performances of the plurality of virtual functions, and allocate one or more resources to the plurality of virtual functions in real time based on the status information associated with the respective virtual function of the plurality of virtual functions.
Inventor(s): Hyejung KIM of Suwon-si KR for samsung electronics co., ltd., Junho KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0652
Abstract: an electronic device is provided. the electronic device includes memory storing one or more computer programs, a display, and one or more processors, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the electronic device to: display, on the display, an execution screen of an application including state information about deletion target data of a plurality of applications installed on the electronic device, the execution screen including a first object requesting the deletion target data, transmit a command to each of the plurality of applications to delete the deletion target data of the plurality of applications based on a user input to the first object, when first deletion target data of a first application among the plurality of applications is stored in a first area accessible by the first application, display information about a deletion result of deletion of the first deletion target data, and when second deletion target data of a second application among the plurality of applications is stored in a second area requiring an access authority, display information requesting a deletion authority of the second deletion target data.
Inventor(s): Eun Chu OH of Suwon-si KR for samsung electronics co., ltd., Beomkyu SHIN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06, G06F12/02
CPC Code(s): G06F3/0655
Abstract: the present disclosure provides storage devices and methods for operating the same. in some embodiments, a storage device includes a non-volatile memory including a plurality of sub-blocks that are independently erasable, and a processor configured to control a garbage collection operation on the plurality of sub-blocks. the plurality of sub-blocks includes a plurality of first sub-blocks that have a first block size and a plurality of second sub-blocks that have a second block size. the second block size is different from the first block size. the processor is further configured to select a victim sub-block with a lowest ratio of a valid page count to an invalid page count from among the plurality of sub-blocks, and copy a valid page of the victim sub-block to a target sub-block from among the plurality of sub-blocks.
Inventor(s): Jeongjae CHO of Suwon-si KR for samsung electronics co., ltd., Youngil Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0659
Abstract: a storage device includes a plurality of memory dies, corresponding to a plurality of channels and a plurality of ways, and a storage controller connected to the plurality of memory dies. the storage controller may be configured to receive commands from a plurality of tenants; in response to a number of the received commands being equal to or greater than a predetermined threshold value, determine a first number of channels required to store first data of a first tenant in each way of the plurality of ways based on commands received from the first tenant; and store the first data in the first number of memory dies in each way of the plurality of ways. the first data may be stored in memory dies that correspond to the plurality of channels in at least a portion or an entire portion of the plurality of ways.
Inventor(s): Hyeongyu Cho of Suwon-si KR for samsung electronics co., ltd., Inhae Kang of Suwon-si KR for samsung electronics co., ltd., Sooyun Lee of Suwon-si KR for samsung electronics co., ltd., Sangwook Yoo of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0659
Abstract: a storage device includes a storage controller and a non-volatile memory including a first memory region including first memory cells having a first data retention time and a second memory region including second memory cells having a second data retention time that is shorter than the first data retention time. based on an erase request being received from a host in a first operation mode, the storage controller determines whether to switch from the first operation mode to a second operation mode. the storage controller programs program data in a memory region selected from the first memory region and the second memory region in the first operation mode, and the storage controller programs the program data in only the first memory region in the second operation mode.
Inventor(s): Yuhwan Ro of Seongnam-si KR for samsung electronics co., ltd., Shinhaeng Kang of Suwon-si KR for samsung electronics co., ltd., Seongwook Park of Ulsan KR for samsung electronics co., ltd., Seungwoo Seo of Incheon KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06, G06F7/523, G06N3/063
CPC Code(s): G06F3/0659
Abstract: a memory device includes: memory operation circuitries to perform memory processing; memory banks assigned to one of the memory operation circuitries such that a set of n memory banks is assigned to each of the memory operation circuitries; and command pads to receive a command signal from an external source, wherein, for each of the memory operation circuitries, a corresponding memory operation circuitry to access memory banks of a corresponding set of n memory banks that is assigned to the corresponding memory operation circuitry, in an order determined based on respective distances from each of the memory banks of the corresponding set of n memory banks to the command pads, and wherein, each of the memory banks of the corresponding set of n memory banks to perform an access operation of data requested by the corresponding memory operation circuitry while the memory processing is performed.
Inventor(s): Dongho LEE of Suwon-si KR for samsung electronics co., ltd., Nakwon Choi of Suwon-si KR for samsung electronics co., ltd., Bumho Chun of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/14, G06F1/16, G06F3/04845
CPC Code(s): G06F3/1446
Abstract: a display apparatus and a method for controlling thereof are provided. the display apparatus includes: at least one processor configured to: obtain a content image, obtain, based on an external display apparatus being connected to a display apparatus through a hinge device, a first content image and a remaining portion of the content image, wherein the first content image is identified based on a resolution of the display apparatus, control the display to display the first content image, provide the second content image to the external display apparatus, and adjust, based on an angle between the display apparatus and the external display apparatus changing while displaying the first content image, a size of the second content image provided to the external display apparatus according to the angle while maintaining a size of the first content image.
Inventor(s): Nakwon CHOI of Suwon-si KR for samsung electronics co., ltd., Sunyoung KIM of Suwon-si KR for samsung electronics co., ltd., Youngwook KIM of Suwon-si KR for samsung electronics co., ltd., Sooyeoun YOON of Suwon-si KR for samsung electronics co., ltd., Dongho LEE of Suwon-si KR for samsung electronics co., ltd., Yongjoo LEE of Suwon-si KR for samsung electronics co., ltd., Bumho CHUN of Suwon-si KR for samsung electronics co., ltd., Jaewon JUNG of Suwon-si KR for samsung electronics co., ltd., Suan CHOI of Suwon-si KR for samsung electronics co., ltd., Saerom HONG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/14
CPC Code(s): G06F3/1446
Abstract: a display apparatus includes a memory storing first apparatus information corresponding to the display apparatus and instructions, a sensor, a display, a communication interface, and at least one processor operatively connected to the memory and configured to execute the instructions to, based on detecting connection with an external display apparatus through the sensor, receive second apparatus information corresponding to the external display apparatus from the external display apparatus, generate integrated apparatus information based on the first apparatus information and the second apparatus information, and control the communication interface to transmit the integrated apparatus information to a source apparatus.
Inventor(s): Seungchul JUNG of Suwon-si KR for samsung electronics co., ltd., Sang Joon KIM of Hwaseong-si KR for samsung electronics co., ltd., Sungmeen MYUNG of Suwon-si KR for samsung electronics co., ltd., Seok Ju YUN of Hwaseong-si KR for samsung electronics co., ltd., Seungkeun YOON of Seoul KR for samsung electronics co., ltd.
IPC Code(s): G06F7/544, H03K3/037, H03K21/08
CPC Code(s): G06F7/5443
Abstract: a computing device for performing a digital pulse-based crossbar operation and a method of operating the computing device. the computing device includes a plurality of input lines to which a pulse is selectively input in a sequential manner based on a corresponding input signal; a plurality of output lines crossing the input lines; a plurality of elements, each element being disposed at a cross point between a corresponding input line and a corresponding output line to transfer, to the corresponding output line, a pulse input to the corresponding input line in response to a corresponding weight being a first value; and a plurality of pulse counters, each pulse counter counting a number of pulses output from a corresponding output line.
Inventor(s): Seunghan Lee of Suwon-si KR for samsung electronics co., ltd., Juhwan Lim of Suwon-si KR for samsung electronics co., ltd., Sanghun Jun of Suwon-si KR for samsung electronics co., ltd., Bumjun Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F11/10, G06F1/30, G06F13/40
CPC Code(s): G06F11/108
Abstract: a storage system includes a plurality of dram-less storage devices, a cxl memory expander, and a plp capacitor. the dram-less storage devices include nonvolatile memories as a storage medium, and a dram is omitted in the dram-less storage devices. the cxl memory expander is electrically connected to the dram-less storage devices, communicates through a cxl interface and operates as a buffer memory of the dram-less storage devices. the plp capacitor is electrically connected to the dram-less storage devices and the cxl memory expander, is disposed outside the dram-less storage devices, and supplies an auxiliary power voltage to the dram-less storage devices and the cxl memory expander in a spo condition in which an external power voltage is suddenly turned off.
Inventor(s): Jungtae LEE of Suwon-si KR for samsung electronics co., ltd., Yejin JO of Suwon-si KR for samsung electronics co., ltd., Jungyoung KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F12/02
CPC Code(s): G06F12/0246
Abstract: an operation method of a host configured to control a storage device includes receiving, from the storage device, a first response universal flash storage (ufs) protocol information unit (upiu) including first event occurrence information indicating an occurrence of a first exception event, receiving, from the storage device prior to an exception event check cycle elapsing, a second response upiu including second event occurrence information indicating an occurrence of a second exception event, and preventing processing of the second exception event, based on the second exception event occurring prior to the exception event check cycle elapsing.
Inventor(s): Wonik SEO of Suwon-si KR for samsung electronics co., ltd., Dong-uk RYU of Suwon-si KR for samsung electronics co., ltd., Sungduk CHO of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F12/08
CPC Code(s): G06F12/08
Abstract: a method and apparatus for managing a unified virtual memory (uvm) are provided. the uvm is backed by a main processor memory and a coprocessor memory, and the method includes: checking properties of data blocks of the uvm used to execute a deep learning model; based on a first of the data blocks storing weight data of the deep learning model, storing the first data block in the main processor memory among the main processor memory and the coprocessor memory; and performing an operation of the deep learning model based on the first data block using a coprocessor while directly loading at least a portion of the first data block from the main processor memory into a cache memory of the coprocessor without migration of the first data block from the main processor memory to the coprocessor memory.
Inventor(s): Seungwon YANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F12/0802
CPC Code(s): G06F12/0802
Abstract: a cache memory controller includes an internal memory configured to store a plurality of cost data sets and pieces of weight data on a plurality of internal elements included in the plurality of cost data sets, the plurality of cost data sets being related to data access, and a logic circuit configured to generate a first cost data set corresponding to data access to the first memory and a second cost data set corresponding to data access to the second memory, determine a target memory out of the first and second memory, based on a result of comparison of weighted sum of the first cost data set and a weighted sum of the second cost data set that are calculated based on the pieces of the weight data, and select a cache line to be replaced, out of cache lines in which data read from the target memory is stored.
20250094373. ADAPTIVE INTERFACE STORAGE DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Stephen G. Fischer of Mountain View CA US for samsung electronics co., ltd., Sompong Paul Olarig of Pleasanton CA US for samsung electronics co., ltd.
IPC Code(s): G06F13/28, G06F3/06, G06F13/00, G06F13/42
CPC Code(s): G06F13/287
Abstract: an adaptive interface storage device. in some embodiments, the adaptive interface storage device includes: a rear storage interface connector; an adaptable circuit connected to the rear storage interface connector; a first multiplexer, connected to the adaptable circuit; and a front storage interface connector, connected to the first multiplexer. the adaptive interface storage device may be configured to operate in a first state or in a second state. the adaptive interface storage device may be configured: in the first state, to present a device side storage interface according to a first storage protocol at the front storage interface connector, and in the second state, to present a device side storage interface according to a second storage protocol, different from the first storage protocol, at the front storage interface connector.
Inventor(s): Taekyung YEO of Seoul KR for samsung electronics co., ltd., Sangyun HWANG of Suwon-si KR for samsung electronics co., ltd., Sujeong KIM of Hwaseong-si KR for samsung electronics co., ltd., Jihun OH of Hwaseong-si KR for samsung electronics co., ltd., Joohee SHIN of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): G06F13/40, G06F13/42
CPC Code(s): G06F13/4022
Abstract: a method of training a physical interface between a first device and a second device includes performing a first training of the physical interface by communicating with the second device by using a first candidate group of lanes from among a plurality of lanes; performing a second training of the physical interface by communicating with the second device by using a second candidate group of lanes from among the plurality of lanes, the second candidate group being different from the first candidate group; determining a lane group based on a result of the first training and a result of the second training; and setting the second device so that the determined lane group is used for the physical interface.
Inventor(s): YANGWOOK CHOI of Suwon-si KR for samsung electronics co., ltd., KIROCK KWON of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F16/22, G06Q50/43
CPC Code(s): G06F16/2282
Abstract: a shared vehicle management server of a vehicle sharing system, configured to allow a plurality of users to share and use vehicles, includes an interface configured to receive biometric data from the plurality of users, a storage device configured to store the biometric data received through the interface, and a controller configured to assign a unique tag number to each user and to manage biometric data of each user using the unique number. the controller manages to store the biometric data of each user in the same storage area using the unique tag number.
Inventor(s): Hyunkyoung KIM of Suwon-si KR for samsung electronics co., ltd., Woonghee PARK of Suwon-si KR for samsung electronics co., ltd., Minjung SOHN of Suwon-si KR for samsung electronics co., ltd., Jinbong RYU of Suwon-si KR for samsung electronics co., ltd., Younghak OH of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F16/483, G06F3/0481, G06F40/279
CPC Code(s): G06F16/483
Abstract: an electronic device is provided. the electronic device includes a display, memory storing one or more computer programs, and one or more processors communicatively coupled to the display and the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the electronic device to, based on a recognition of media content stored in the electronic device, obtain information regarding the media content, identify an event providing the media content from a first software application to a second software application, identify attribute information of a text input portion in a user interface of the second software application, obtain text indicating at least a portion of the information based on the attribute information, and display, via the display, a text input portion including the text, with the media content, in the user interface of the second software application executed in response to the event.
Inventor(s): Chankyu HAN of Suwon-si KR for samsung electronics co., ltd., Jihyuk LIM of Suwon-si KR for samsung electronics co., ltd., Chiyang HWANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F21/56, G06F12/02
CPC Code(s): G06F21/566
Abstract: a method for detecting a memory safety bug and an electronic device supporting the same are provided. the electronic device supporting multiple domains includes memory storing one or more computer programs, and one or more processors communicatively coupled to the memory and operable in a first domain and a second domain, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the electronic device to detect a shared memory use request by the first domain or the second domain, allocate shared memory for communication between multiple domains including the first domain and the second domain based on a memory area designated in the memory, based on the shared memory use request, register a tag for the shared memory in a first memory area of the first domain and a second memory area of the second domain, and detect a memory safety bug for the shared memory shared between the first domain and the second domain, based on the tag.
20250094647. STORAGE DEVICE AND SYSTEM_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Soojung PARK of Suwon-si KR for samsung electronics co., ltd., Yeonwoo Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F21/79, G06F21/31, G06F21/60
CPC Code(s): G06F21/79
Abstract: a storage device includes a non-volatile memory including a plurality of namespaces, and a storage controller configured to receive, from an external host, a first namespace identifier of a first namespace from among the plurality of namespaces and a first command requesting to control exposure of the first namespace, and based on the first namespace identifier and the first command, set the first namespace as a hidden namespace, and prevent the first namespace from being exposed to at least one user from among a plurality of users.
Inventor(s): Sooyong LEE of Suwon-si KR for samsung electronics co., ltd., Jaeyong JEONG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F30/392, G06F30/398, G06F119/18
CPC Code(s): G06F30/392
Abstract: disclosed is an operating method of an electronic device which includes a processor and supports manufacture of a semiconductor device. the method includes receiving, at the processor, layout data for the manufacture of the semiconductor device, feature data of the layout data, and skew data after the semiconductor device is manufactured; inferring, at the processor, a center and a distribution of a skew of each of patterns and/or edges of the layout data based on the layout data and the feature data, by using a deep learning module; calculating, at the processor, a loss based on the center and the distribution of the skew based on the skew data, and training, at the processor, the deep learning module based on the loss, and the layout data, the feature data, and the skew data are formatted as tabular data.
Inventor(s): Shikhar TULI of Sunnyvale CA US for samsung electronics co., ltd., Chi-Heng Lin of Mountain View CA US for samsung electronics co., ltd., Yen-Chang Hsu of Fremont CA US for samsung electronics co., ltd., Yilin Shen of Mountain View CA US for samsung electronics co., ltd., Hongxia Jin of San Jose CA US for samsung electronics co., ltd.
IPC Code(s): G06F40/284
CPC Code(s): G06F40/284
Abstract: a method for performing multi-token prediction by an apparatus includes receiving, from an artificial intelligence (ai) assistance device, a request for an output token sequence that is subsequent to an input token sequence indicated by the request, predicting, by a trained machine learning model, a plurality of candidate output tokens, estimating joint probability distributions of one or more combinations of the plurality of candidate output tokens, calculating joint probabilities of the one or more combinations by masking the joint probability distributions with a co-occurrence weighted mask, determining, based on the joint probabilities, whether to reduce the number of candidate output tokens included in each combination of the one or more combinations, identifying, based on the joint probabilities, a combination of the one or more combinations as the output token sequence, and outputting, to the ai assistance device, a response to the request, the response comprising the output token sequence.
Inventor(s): Minhyuk SEO of Seoul KR for samsung electronics co., ltd., Hyunseo KOH of Sejong-si KR for samsung electronics co., ltd., Jonghyun CHOI of Seoul KR for samsung electronics co., ltd.
IPC Code(s): G06N3/084
CPC Code(s): G06N3/084
Abstract: a method and apparatus for training a neural network model are provided. the method of training a neural network model includes storing replay samples selected from among online stream samples in a replay buffer, selecting batch samples from the replay samples based on selection frequencies of the respective replay samples, determining a freeze layer group of the neural network model based on forward propagation of the neural network model using the batch samples, and training the neural network model based on backward propagation of layers not in the freeze layer group.
Inventor(s): Sudipta PAUL of Sunnyvale CA US for samsung electronics co., ltd., Lingyu ZHANG of Cupertino CA US for samsung electronics co., ltd., Yilin SHEN of Mountain View CA US for samsung electronics co., ltd., Hongxia JIN of San Jose CA US for samsung electronics co., ltd.
IPC Code(s): G06N3/096
CPC Code(s): G06N3/096
Abstract: a method for enabling an improved device control capability of a small language model (slm) transferrable to a hub device configured to be operable by a user in an environment, is disclosed. the method includes performing a fine-tuning the slm based on a data set including base plans and contrastive plans; generating computer codes corresponding to the fine-tuned slm; and transferring the generated computer codes to the hub device to be connected with a group of the electronic devices in the environment.
Inventor(s): Hyung-tak CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06Q10/1093, G06Q10/109
CPC Code(s): G06Q10/1097
Abstract: a device and a method of providing a to-do list of a user are provided. the device includes a controller configured to collect behavior information about behavior between the user and another user, the behavior being performed by using the device, generate a to-do list of the user based on the collected behavior information, and determine an unperformed task not performed by the user from among at least one task in the to-do list by using log information about an operation of the device, and an output unit configured to output notification information in a dialogue style, along with a notification reason for notifying the determined unperformed task.
Inventor(s): Hojung KIM of Suwon-si KR for samsung electronics co., ltd., Unjeong KIM of Suwon-si KR for samsung electronics co., ltd., Suyeon LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06T5/50, G06T3/4015, G06V10/25
CPC Code(s): G06T5/50
Abstract: an apparatus for acquiring images includes a multispectral sensor configured to sense light reflected from an object, one or more processors, and a memory storing instructions that, when executed by the one or more processors, cause the apparatus to generate n channel images based on signals obtained from a plurality of channels of the multispectral sensor, select at least one first channel image corresponding to a visible wavelength band from among the n channel images, generate a reference image based on the at least one first channel image, select a second channel image from remaining channel images of the n channel images corresponding to remaining channels of the plurality of channels distinct from the at least one first channel image, generate object information by analyzing the second channel image, combine the reference image and the object information to generate an output image, and display the output image to a user.
Inventor(s): Seongeun KIM of Suwon-si KR for samsung electronics co., ltd., Seohyung LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06T5/70, G06T5/60, G06V10/40
CPC Code(s): G06T5/70
Abstract: a method and apparatus with image processing based on neural diffusion are provided. the method includes: setting a randomness level for a target object; generating a noised image by performing a diffusion process of generating noise images while repeatedly performing noising based on a guide image of a guide domain including the target object and by extracting and saving, based on the randomness level, a partial preservation area from a noise image among the noise images; and obtaining a denoised output image of a target domain by performing a reverse process of repeatedly generating, based on the noised image, denoise images corresponding to the noise images and by applying the saved partial preservation area to a denoise image among the denoise images.
Inventor(s): Hyeonjin KIM of Suwon-si KR for samsung electronics co., ltd., Haemi Yoon of Suwon-si KR for samsung electronics co., ltd., Hyunwoo KIM of Suwon-si KR for samsung electronics co., ltd., Minji CHO of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06T19/00, G06F3/01
CPC Code(s): G06T19/006
Abstract: a wearable device includes: a display; and at least one processor, wherein the at least one processor is configured to: receive an input indicating selection of a first external electronic device and a second external electronic device among a plurality of external electronic devices viewable through the display; based on the input, identify third external electronic devices in a category including both the first external electronic device and the second external electronic device, and identify the first external electronic device and the second external electronic device along with the third external electronic devices; display a first visual object and a second visual object respectively indicating that the first external electronic device and the second external electronic device are selected; and display at least one third visual object guiding selection of at least one fourth external electronic device among the third external electronic devices.
Inventor(s): Biju Mathew NEYYAN of Bangalore IN for samsung electronics co., ltd., Vivek SRIDHAR of Bangalore IN for samsung electronics co., ltd., Arshed V. HAKEEM of Bangalore IN for samsung electronics co., ltd., Shubhankar BHINGARE of Bangalore IN for samsung electronics co., ltd.
IPC Code(s): G06T19/00, G06F3/01, G06T19/20, G06V10/25
CPC Code(s): G06T19/006
Abstract: provided are video-see-through (vst) device for interacting with a spatial object and an operating method the vst device. the vst device receives a user gesture of a user, wherein the user gesture is for selecting a spatial region of interest (roi) within a field of view of the user; recognizes the spatial roi and an object located within the selected spatial roi; generates a virtual bounding region enclosing the recognized object located within the selected spatial roi; determines an associated modality for enabling an interaction with the object located within the generated virtual bounding region; and generates a prompt corresponding to the associated modality.
Inventor(s): Hyungjong SHIN of Suwon-si KR for samsung electronics co., ltd., Yejin KIM of Suwon-si KR for samsung electronics co., ltd., Jungkeun KIM of Suwon-si KR for samsung electronics co., ltd., Pius LEE of Suwon-si KR for samsung electronics co., ltd., Chaebin LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06T19/20, G06T7/194, G06T15/60
CPC Code(s): G06T19/20
Abstract: a projection device includes a projection unit, a memory storing one or more instructions, and at least one processor configured to execute the one or more instructions to obtain a first image, obtain spatial information of a screen and location information of a user, generate a three-dimensional (3d) object image and a background image, based on the spatial information of the screen and the location information of the user, and control the projection unit to project a second image obtained by synthesizing the first image, the 3d object image, and the background image.
Inventor(s): Navaneeth Pantham of Bangalore IN for samsung electronics co., ltd., Aravind Kadiroo Jayaram of Bangalore IN for samsung electronics co., ltd., Sudip Roy of Bangalore IN for samsung electronics co., ltd., Swadha Jaiswal of Bangalore IN for samsung electronics co., ltd., Vishal Bhushan Jha of Bangalore IN for samsung electronics co., ltd.
IPC Code(s): G06T19/20, G06F3/01
CPC Code(s): G06T19/20
Abstract: embodiments herein disclose methods for generating an extended reality (xr) environment by an electronic device (). the method includes generating a base structure () associated with an xr floor in an xr environment for a user from a number of users based on a distance between the user from the other users from the number of users, configuring a size of the base structure and a position of the base structure based on a distance between users, identifying a landmark point from a plurality of landmark points for the users upon measuring a distance between the users with reference to the base structure, and generating the xr environment based on the size of the base structure, the position of the base structure, and the plurality of identified landmark point for the users.
Inventor(s): Chunmiao LI of Beijing CN for samsung electronics co., ltd., Zheng Xie of Beijing CN for samsung electronics co., ltd., Jianxing Zhang of Beijing CN for samsung electronics co., ltd., Zikun Liu of Beijing CN for samsung electronics co., ltd., Xiaopeng Li of Beijing CN for samsung electronics co., ltd., Jongbum Choi of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06V10/26, G06V10/24, G06V10/44, G06V10/54, G06V10/764, G06V10/80, G06V10/82
CPC Code(s): G06V10/26
Abstract: the present disclosure provides a method performed by an electronic device, an electronic device, a storage medium and a program product, relating to the field of computer vision, image processing and artificial intelligence. the method includes: extracting at least one object center area and at least one object boundary area from a first image; and aligning the extracted object center area with the object boundary area to obtain an object segmentation result of the first image.
Inventor(s): Guiwon SEO of Suwon-si KR for samsung electronics co., ltd., Minjeong Ko of Ulsan KR for samsung electronics co., ltd., Youngshin Kwak of Ulsan KR for samsung electronics co., ltd., Jonghwan Kim of Suwon-si KR for samsung electronics co., ltd., Youngsu Moon of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G09G3/20, G06T7/90
CPC Code(s): G09G3/2003
Abstract: an electronic device is disclosed. the electronic device includes a display; memory, the memory storing a first spectrum information of the display and information on a plurality of color matching functions (cmfs); and at least one processor connected with the memory, wherein the at least one processor is configured to: obtain picture spectrum information of a test image based on a second spectrum information of an external display device displaying the test image, obtain test images based on the picture spectrum information, the first spectrum information, and the information on the plurality of cmfs, wherein the test images comprise a respective test image for each of the plurality of cmfs corresponding to the test image, and control the display to display the test images.
Inventor(s): Taek Su Kwon of Suwon-si KR for samsung electronics co., ltd., In-Suk Kim of Suwon-si KR for samsung electronics co., ltd., Dongwook Suh of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G09G3/20, G11C19/28
CPC Code(s): G09G3/2096
Abstract: the present disclosure relates to a display driver integrated circuit and a display device. an example of the display driver integrated circuit includes a source driver and a timing controller. the source driver is configured to output a data voltage based on an image data to a first source line and a second source line. the timing controller is configured to receive first data and second data sequentially input to a first source channel that corresponds to the first source line, receive third data and fourth data sequentially input to a second source channel that corresponds to the second source line, perform an operation on the first data and the second data to generate a first change value, perform an operation on the third data and the fourth data to generate a second change value, and based on the first change value and the second change value, determine whether to toggle an output enable signal on an output of the second data in the first source line and an output of the fourth data in the second source line.
Inventor(s): Jaejin CHO of Mountain View CA US for samsung electronics co., ltd., Rakshith Sharma Srinivasa of Sunnyvale CA US for samsung electronics co., ltd., Chou-chang Yang of San Jose CA US for samsung electronics co., ltd., Yashas Malur Saidutta of Menlo Park CA US for samsung electronics co., ltd., Ching-Hua Lee of Mountain View CA US for samsung electronics co., ltd., Yilin Shen of Mountain View CA US for samsung electronics co., ltd., Hongxia Jin of San Jose CA US for samsung electronics co., ltd.
IPC Code(s): G10L15/06, G10L15/18, G10L15/183
CPC Code(s): G10L15/063
Abstract: a method includes: receiving one or more training text sentences; generating one or more training vectors based on inputting the one or more training sentences input into a text encoder, the one or more training vectors corresponding to one or more operations that an electronic device is configured to perform; generating one or more speech vectors based on one or more speech utterances input into a speech encoder; generating a similarity matrix that compares each of the one or more training vectors with each of the one or more speech vectors; and updating at least one of the text encoder and the speech encoder based on the similarity matrix.
Inventor(s): Jeffrey C. OLSON of Woodside CA US for samsung electronics co., ltd., Henry N. HOLTZMAN of San Francisco CA US for samsung electronics co., ltd., Jean-David Hsu of San Francisco CA US for samsung electronics co., ltd., Jeffrey A. MORGAN of Napa CA US for samsung electronics co., ltd.
IPC Code(s): G10L15/22, G10L15/08
CPC Code(s): G10L15/22
Abstract: a method comprising detecting an activation of an intelligent assistant on an electronic device, waking up the intelligent assistant from a sleep mode in response to the activation, and determining an amount of vocabulary the intelligent assistant acts upon during a listening mode based on a type of the activation.
Inventor(s): Yeonho LEE of Suwon-si KR for samsung electronics co., ltd., Sangwook Park of Suwon-si KR for samsung electronics co., ltd., Kookjin Yeo of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G10L15/26, G10L15/18, G10L15/22, G16Y20/20
CPC Code(s): G10L15/26
Abstract: a hub device, a multi-device system including the hub device, and a method of operating the same may include: converting, by the hub device, received voice input into text; identifying, by the hub device, a device capable of performing an operation corresponding to the text; identifying which device stores a function determination model corresponding to the device capable of performing the operation corresponding to the text, from among the hub device, and a plurality of other devices connected to the hub device; and based on the identified device that stores the function determination model being a device that is different from the hub device, transmitting at least part of the text to the identified device.
Inventor(s): Ching-Hua LEE of Mountain View CA US for samsung electronics co., ltd., Chouchang YANG of San Jose CA US for samsung electronics co., ltd., Rakshith Sharma SRINIVASA of Sunnyvale CA US for samsung electronics co., ltd., Yashas Malur SAIDUTTA of Menlo Park CA US for samsung electronics co., ltd., Jaejin CHO of Mountain View CA US for samsung electronics co., ltd., Yilin SHEN of Mountain View CA US for samsung electronics co., ltd., Hongxia JIN of San Jose CA US for samsung electronics co., ltd.
IPC Code(s): G10L21/0208, G10L15/06, G10L21/0216
CPC Code(s): G10L21/0208
Abstract: a method for generating a customized speech enhancement model includes obtaining noisy-clean speech data from a source domain, obtaining noisy speech data from a target domain; obtaining raw speech data, using the noisy-clean speech data, the noisy speech data, and the raw speech data, training the customized se model based on at least one of self-supervised representation-based adaptation (ssra), ensemble mapping, or self-supervised adaptation loss, generating the customized se model by denoising the noisy speech data using the trained customized se model, and providing the customized se model to a user device to use the denoised noisy speech data.
Inventor(s): KYUDONG PARK of Suwon-si KR for samsung electronics co., ltd., SEULJI SONG of Suwon-si KR for samsung electronics co., ltd., KWANG-WOO LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C13/00
CPC Code(s): G11C13/0069
Abstract: a memory device includes word lines, bit lines, memory cells, and a circuit. the circuit applies a first voltage to a first bit line of a target memory cell, applies a second voltage to a first word line of the target memory cell, and performs at least one of a first operation and a second operation. the first operation includes applying an adjustment voltage to a second bit line or second word line connected to an adjacent initialized memory cell, and the second operation includes applying a third voltage of an opposite polarity to the first voltage to a third bit line of a next target memory cell that is initialized after initialization of the target memory cell and applying a fourth voltage of an opposite polarity to the second voltage to a third word line of the next target memory cell.
Inventor(s): Jinmyeong Hong of Suwon-si KR for samsung electronics co., ltd., Suk Youn of Suwon-si KR for samsung electronics co., ltd., Taehyung Kim of Suwon-si KR for samsung electronics co., ltd., Hoyoung Tang of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C15/04
CPC Code(s): G11C15/04
Abstract: an example integrated circuit includes a ternary content-addressable memory (tcam) cell on a front side of a substrate, a backside via extending through the substrate in a vertical direction with respect to the substrate, a backside wiring layer on a back side of the substrate, and a frontside wiring layer above the tcam cell in the vertical direction. the tcam cell includes a first cell storing a first value, a second cell storing a second value, and a comparison circuit connected with the first and second cells. the backside wiring layer includes at least one backside power rail configured to transmit a supply voltage to the tcam cell through the backside via. the frontside wiring layer includes a bit line connected with the first and second cells, a complementary bit line connected with the first and second cells, and a match line connected with the comparison circuit.
Inventor(s): Tae-Hong KWON of Suwon-si KR for samsung electronics co., ltd., Gyosoo CHOO of Suwon-si KR for samsung electronics co., ltd., Myung Uk PARK of Suwon-si KR for samsung electronics co., ltd., Donggeun LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C16/10, G11C16/04, G11C16/08, G11C16/16
CPC Code(s): G11C16/102
Abstract: a flash memory includes a memory block connected to word lines, an address decoder that selects one or more of the word lines, a first pass transistor connected to the address decoder, a second pass transistor connected in series with the first pass transistor and connected to one word line among the word lines, a first driver circuit that controls a gate voltage of the first pass transistor based on a first enable signal, and a second driver circuit that controls a gate voltage of the second pass transistor based on a second enable signal. based on the memory block being an unselected memory block during an erase operation, the first driver circuit controls the first pass transistor to be in a floating state, the second driver circuit controls a power voltage to be provided to a gate of the second pass transistor.
Inventor(s): Tongsung Kim of Suwon-si KR for samsung electronics co., ltd., Seonkyoo Lee of Suwon-si KR for samsung electronics co., ltd., Younggyu Lee of Suwon-si KR for samsung electronics co., ltd., Taesung Lee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C16/32, G11C16/04, G11C16/10, G11C16/26, H03K5/156
CPC Code(s): G11C16/32
Abstract: provided is a memory device including a first pad configured to receive a read enable signal from a memory controller, a second pad configured to receive a read duty cycle correct command signal, a first duty correction circuit configured to perform a read duty cycle correct operation, based on the read duty cycle correct command received from the memory controller, when the read enable signal is received, and output a data strobe signal generated based on the read duty cycle correct operation, and a second duty correction circuit configured to receive the data strobe signal from the first duty correction circuit, generate a divided data strobe signal by dividing the received data strobe signal, and compare the received data strobe signal with the divided data strobe signal to perform a write duty cycle correct operation.
Inventor(s): Tongsung Kim of Suwon-si KR for samsung electronics co., ltd., Seonkyoo Lee of Suwon-si KR for samsung electronics co., ltd., Younggyu Lee of Suwon-si KR for samsung electronics co., ltd., Taesung Lee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C16/32, G11C16/04, G11C29/02
CPC Code(s): G11C16/32
Abstract: provided is a memory device including a first pad configured to receive a read enable signal from a memory controller, a second pad configured to receive a read duty cycle correct command signal from the memory controller, a first duty correction circuit configured to perform a read duty cycle correct operation, based on the read duty cycle correct command signal received from the memory controller, when the read enable signal is received, and output a data strobe signal generated based on the read duty cycle correct operation, and a second duty correction circuit configured to receive the data strobe signal from the first duty correction circuit, generate first to fourth clock signals having different phases from each other based on the data strobe signal, and perform a write duty cycle correct operation to correct a duty cycle for the first clock signal and the third clock signal which have a phase difference of 180� and to correct a duty cycle for the second clock signal and the fourth clock signal which have a phase difference of 180�, wherein the read duty cycle correct operation and the write duty cycle correct operation are performed simultaneously.
Inventor(s): Amit BERMAN of Binyamina IL for samsung electronics co., ltd., Elisha HALPERIN of Ramat Gan IL for samsung electronics co., ltd., Evgeny BLAICHMAN of Tel-Aviv IL for samsung electronics co., ltd., Jonathan ZEDAKA of Jerusalem IL for samsung electronics co., ltd.
IPC Code(s): G11C16/34, G11C11/54, G11C16/10
CPC Code(s): G11C16/3459
Abstract: systems, devices, and methods for decoding information bits obtained from storage, including obtaining a plurality of data symbols; providing the plurality of data symbols to a neural network; obtaining a plurality of threshold voltage targets based on an output of the neural network; and programming the plurality of data symbols to a plurality of memory cells included in a storage device based on the plurality of threshold voltage targets.
Inventor(s): Ilho Myeong of Suwon-si KR for samsung electronics co., ltd., Kwangsoo Kim of Suwon-si KR for samsung electronics co., ltd., Suseong Noh of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C16/34, G11C16/10, G11C16/32
CPC Code(s): G11C16/3459
Abstract: a method of operating a memory device, the method including: applying a program inhibition voltage to an unselected bit line in a first program loop of a plurality of program loops; applying a program permission voltage to a selected bit line in the first program loop; applying a pass voltage to an unselected word line in the first program loop; applying a program voltage to a selected word line in the first program loop; applying a pulse voltage having a polarity opposite to a polarity of the program voltage to the selected word line after applying the program voltage to the selected word line, in the first program loop; and applying a verification voltage to the selected word line after applying the pulse voltage to the selected word line, in the first program loop.
Inventor(s): Soung Hoon Sim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C17/18, G11C17/16, H03K19/0185
CPC Code(s): G11C17/18
Abstract: an electronic device comprises a one time programmable (otp) memory cell that includes a program transistor and a read transistor; and a high voltage transfer device configured to level-shift an external high voltage to an internal voltage, wherein the high voltage transfer device includes a first pmos transistor having a first end connected to an external high voltage terminal, a second pmos transistor having a first end connected to a second end of the first pmos transistor and a second end connected to a gate of the program transistor, an enable circuit configured to receive an enable signal and generate a gate voltage of the second pmos transistor, and a level shifter connected to the enable circuit by a feedback path and configured to generate a gate voltage of the first pmos transistor based upon the gate voltage of the second pmos transistor provided through the feedback path.
Inventor(s): Sang Woo SEON of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01J37/317, H01J37/08, H01L21/265
CPC Code(s): H01J37/3171
Abstract: an ion implantation apparatus includes a process chamber into which a substrate is loaded; an ion generation chamber adjacent to the process chamber in a first direction, wherein the ion generation chamber is configured to generate ions and supply the ions to the process chamber in the first direction; a plasma flood gun (pfg) adjacent to the process chamber in a second direction, wherein the pfg is configured to generate electrons and supply the electrons to the process chamber in the second direction; a pfg cage between the pfg and the process chamber and through which the electrons migrate to the process chamber; and a liner film covering at least a portion of an inner sidewall of the process chamber, wherein the liner film includes a conductive material, and wherein the first direction and the second direction are perpendicular to each other.
Inventor(s): Yongseok LEE of Suwon-si KR for samsung electronics co., ltd., Jong Min LEE of Seoul KR for samsung electronics co., ltd., Taekyoon PARK of Suwon-si KR for samsung electronics co., ltd., Chae Sun KIM of Seoul KR for samsung electronics co., ltd., Hae Rang ROH of Seoul KR for samsung electronics co., ltd.
IPC Code(s): H01J37/32, G01N21/27, H01L21/67
CPC Code(s): H01J37/32972
Abstract: a substrate processing method includes collecting a plurality of pieces of optical emission spectrometry data including a wavelength, intensity of the wavelength, and time using optical emission spectrometry on a plurality of substrates, selecting a selected wavelength band having a high correlation with an endpoint of an etching process from the plurality of pieces of optical emission spectrometry data, preprocessing the plurality of pieces of optical emission spectrometry data to generate a selected dataset, generating a principal component analysis model using the selected dataset, generating a probability distribution model capable of clustering data of the principal component analysis model, and performing the etching process on a process substrate using the principal component analysis model and the probability distribution model.
20250096001. METHOD OF PROCESSING A SUBSTRATE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Junsang KIM of Suwon-si KR for samsung electronics co., ltd., YUNHA KIM of Suwon-si KR for samsung electronics co., ltd., HYEONJUN YUN of Suwon-si KR for samsung electronics co., ltd., KWANGHYUN CHO of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L21/306, H01L21/67, H01L21/687
CPC Code(s): H01L21/30625
Abstract: a method of processing a substrate includes disposing a substrate in a substrate processing apparatus and polishing the substrate. the substrate processing apparatus includes a polishing head and a polishing part. the polishing head includes a polishing head body. the polishing head body includes a pressure member including a first zone and a second zone. the substrate includes a first substrate zone located under the first zone and a second substrate zone located under the second zone. the polishing of the substrate includes rotating the substrate while applying a (1,1)-th pressure to the first substrate zone and applying a (2,1)-th pressure to the second substrate zone, calculating a (1,1)-th polishing rate of the first substrate zone and a (2,1)-th polishing rate of the second substrate zone, determining a reference polishing rate, and resetting a pressure applied to the first substrate zone to a (1,2)-th pressure.
Inventor(s): Taegeon KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L21/673
CPC Code(s): H01L21/67363
Abstract: a module tray for a semiconductor device includes a base plate, first and second sidewalls extending in a vertical direction from opposite sides of the base plate to define an accommodation space, a dividing wall extending in the vertical direction from the base plate between the first and second sidewalls, first to fourth fastening guides with first to fourth fastening grooves, respectively, on inner surfaces of the first and second sidewalls and opposite side surfaces of the dividing wall, and first to fourth guide grooves on the inner surfaces of the first and second sidewalls and the opposite side surfaces of the dividing wall, respectively, the first to fourth guide grooves having curved concave shapes, and an upper end portion of each of the first to fourth fastening grooves gradually widening toward a top thereof.
Inventor(s): YEONGSEON KIM of SUWON-SI KR for samsung electronics co., ltd., DONGKUK LEE of SUWON-SI KR for samsung electronics co., ltd., CHAJEA JO of SUWON-SI KR for samsung electronics co., ltd.
IPC Code(s): H01L21/66, G01R31/28, H01L23/00, H01L25/065
CPC Code(s): H01L22/32
Abstract: a semiconductor package includes a substrate. a first semiconductor chip is on the substrate and includes a first semiconductor substrate and a plurality of first test pads on a top surface of the first semiconductor substrate. a second semiconductor chip is on the first semiconductor chip and includes a second semiconductor substrate and a second test pad on a bottom surface of the second semiconductor substrate. the first semiconductor chip and the second semiconductor chip are bonded to each other. the plurality of first test pads face the second test pad. the second test pad has a circular ring shape when viewed in plan. the plurality of first test pads are arranged along a circumference of the second test pad. areas that the plurality of first test pads overlap the second test pad have same sizes as each other.
Inventor(s): Taehwan Kim of Hwaseong-si KR for samsung electronics co., ltd., Kyungsuk Oh of Seongnam-si KR for samsung electronics co., ltd., Jaechoon Kim of Incheon KR for samsung electronics co., ltd.
IPC Code(s): H01L23/367, H01L23/00, H01L23/48, H01L23/522, H01L25/04
CPC Code(s): H01L23/367
Abstract: a semiconductor package includes a first semiconductor chip including first through electrodes and having a first hot zone in which the first through electrodes are disposed; a heat redistribution chip disposed on the first semiconductor chip, having a cool zone overlapping the first hot zone in a stacking direction with respect to the first semiconductor chip, and including first heat redistribution through electrodes disposed outside of an outer boundary of the cool zone and electrically connected to the first through electrodes, respectively; a second semiconductor chip disposed on the heat redistribution chip, having a second hot zone overlapping the cool zone in the stacking direction, and including second through electrodes disposed in the second hot zone and electrically connected to the first heat redistribution through electrodes, respectively; and a first thermal barrier layer disposed between the first hot zone and the cool zone, wherein the first through electrodes are electrically connected to the second through electrodes by bypassing the cool zone via the first heat redistribution through electrodes.
20250096066. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jing Cheng LIN of Suwon-si KR for samsung electronics co., ltd., Youngkun JEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/367, H01L21/48, H01L21/56, H01L23/00, H01L23/373, H01L25/18, H05K1/18, H10B80/00
CPC Code(s): H01L23/3677
Abstract: provided is a semiconductor package, including a first redistribution structure, a first chip on the first redistribution structure, a molding member on the first redistribution structure and surrounding the first chip, a conductive pillar penetrating through the molding member in a first direction, a second redistribution structure on a second surface of the molding member, a second chip on the second redistribution structure, and a heat dissipation chip at least partially overlapping the first chip in the vertical direction, wherein the second redistribution structure at least partially overlaps the heat dissipation chip in a second direction intersecting the first direction.
Inventor(s): Soyoung LIM of Suwon-si KR for samsung electronics co., ltd., Inho CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/495, H01L23/00, H01L25/065
CPC Code(s): H01L23/49572
Abstract: a chip on film (cof) package may include a base film including a first side extending in a first horizontal direction, a plurality of conductive lines on an upper surface of the base film and extending in a second horizontal direction perpendicular to the first horizontal direction, a plurality of bridge patterns respectively connected with the plurality of conductive lines and arranged along the first side of the base film, an interlayer insulation layer on the base film and covering a plurality of bridge patterns, and a plurality of input pads on the interlayer insulation layer and respectively connected with the plurality of bridge patterns.
20250096088. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Aenee Jang of Seoul KR for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L23/00, H01L23/31, H01L23/538, H01L25/18
CPC Code(s): H01L23/49816
Abstract: a semiconductor package includes a base substrate; an interposer substrate including a semiconductor substrate having a first surface facing the base substrate and a second surface, opposing the first surface, and a passivation layer on at least a portion of the first surface; a plurality of connection bumps between the base substrate and the interposer substrate; an underfill resin in a space between the base substrate and the interposer substrate; and a first semiconductor chip and a second semiconductor chip on the interposer substrate. the interposer substrate has a first region, in which the plurality of connection bumps are included, and a second region and a third region adjacent a periphery of the first region, and the passivation layer is in the second region and includes a first embossed pattern in the second region.
Inventor(s): CHOONGBIN YIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L23/00, H01L23/31, H01L23/48, H01L25/00, H01L25/18
CPC Code(s): H01L23/49838
Abstract: a semiconductor package according to an embodiment includes a first semiconductor structure, including a first substrate, and a semiconductor stacking structure including a plurality of semiconductor dies on the first substrate and including a top surface, a second semiconductor structure on the first semiconductor structure, a second substrate, and a plurality of integrated circuit chips on the second substrate, a plurality of core balls between the first substrate and the second substrate and electrically connecting the first semiconductor structure and the second semiconductor structure, and a molding material for molding the semiconductor stacking structure and the plurality of core balls between the first substrate and the second substrate.
20250096099. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): JAESUN KIM of Suwon-si KR for samsung electronics co., ltd., HEEYOUB KANG of Suwon-si KR for samsung electronics co., ltd., EUNKYEONG PARK of Suwon-si KR for samsung electronics co., ltd., YISEUL HAN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L23/00, H01L23/31, H01L23/367, H01L25/18, H10B80/00
CPC Code(s): H01L23/49838
Abstract: a semiconductor package may include a lower redistribution structure having a lower redistribution layer, a lower chip structure on the lower redistribution structure, the lower chip structure including a first semiconductor chip, a second semiconductor chip on the first semiconductor chip, a plurality of first posts on a side of the second semiconductor chip and electrically connected to the first semiconductor chip, and a first encapsulant covering the first semiconductor chip, the second semiconductor chip, and the plurality of first posts, a plurality of second posts on a side of the lower chip structure and electrically connected to the lower redistribution layer, a second encapsulant covering the lower chip structure and each of the plurality of second posts, connection vias passing through a portion of the second encapsulant, and electrically connected to the plurality of first posts, and an upper redistribution structure on the second encapsulant.
20250096103. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Sunjun KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L23/00, H01L23/31
CPC Code(s): H01L23/49838
Abstract: a semiconductor device includes a base substrate and a semiconductor chip disposed on the base substrate. the base substrate includes a core substrate, first interconnection substrates disposed on a first surface of the core substrate and a second surface opposite to the first surface, a first through-electrode penetrating the core substrate, a second through-electrode penetrating the core substrate and the first interconnection substrates, having a same central axis as the first through-electrode, and having a width narrower than a width of the first through-electrode, and a first insulating layer disposed between the first through-electrode and the second through-electrode and surrounding at least a portion of a side surface of the second through-electrode.
20250096133. INTEGRATED CIRCUIT DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Seowoo NAM of Suwon-si KR for samsung electronics co., ltd., Heonjong SHIN of Suwon-si KR for samsung electronics co., ltd., Juneyoung PARK of Suwon-si KR for samsung electronics co., ltd., Sanghee LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/528, H01L27/088, H01L29/06, H01L29/08, H01L29/417, H01L29/423, H01L29/775, H01L29/786
CPC Code(s): H01L23/5283
Abstract: an integrated circuit device includes a fin-type active region extending in a first horizontal direction on a substrate, a plurality of nanosheets facing a fin top of the fin-type active region, a gate line on the fin-type active region, the gate line surrounding each of the nanosheets and extending in a second horizontal direction, and a source/drain region on the fin-type active region. the gate line includes a main gate portion on the nanosheet stack, a first sub gate portion, a second sub gate portion, and a third sub gate portion. a width of the first sub gate portion in the first horizontal direction is greater than or equal to a width of the third sub gate portion in the first horizontal direction and the width of the first sub gate portion is less than a width of the second sub gate portion in the first horizontal direction.
20250096134. INTEGRATED CIRCUIT DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Geunwoo KIM of Suwon-si KR for samsung electronics co., ltd., Hyunwoo KANG of Suwon-si KR for samsung electronics co., ltd., Mingyu KIM of Suwon-si KR for samsung electronics co., ltd., Wandon KIM of Suwon-si KR for samsung electronics co., ltd., Wonkeun CHUNG of Suwon-si KR for samsung electronics co., ltd., Hyoseok CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/528, H01L23/522, H01L27/092, H01L29/06, H01L29/417, H01L29/423, H01L29/775, H01L29/78, H01L29/786
CPC Code(s): H01L23/5283
Abstract: an integrated circuit device may include a source/drain contact insulation layer on a lower structure, a source/drain contact via penetrating through the source/drain contact insulation layer, an interconnect wiring insulation layer on the source/drain contact insulation layer and including an interconnect wiring trench exposing a top surface of the source/drain contact via, a first interconnect wiring layer covering a lower portion of a sidewall of the interconnect wiring trench and including a first precursor, and a second interconnect wiring layer on the first interconnect wiring layer. the second interconnect wiring layer may cover an upper portion of a sidewall of the interconnect wiring trench and may include a second precursor. a crystal grain size of the second precursor may be larger than a crystal grain size of the first precursor.
Inventor(s): Sung-Hun LEE of Yongin-si KR for samsung electronics co., ltd., Seokjung YUN of Iksan-si KR for samsung electronics co., ltd., Chang-Sup LEE of Hwaseong-si KR for samsung electronics co., ltd., Seong Soon CHO of Suwon-si KR for samsung electronics co., ltd., Jeehoon HAN of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/528, H01L21/768, H01L23/522, H10B41/20, H10B41/27, H10B43/10, H10B43/20, H10B43/27, H10B43/35, H10B43/50
CPC Code(s): H01L23/5283
Abstract: a three-dimensional (3d) semiconductor device includes a stack structure including first and second stacks stacked on a substrate. each of the first and second stacks includes a first electrode and a second electrode on the first electrode. a sidewall of the second electrode of the first stack is horizontally spaced apart from a sidewall of the second electrode of the second stack by a first distance. a sidewall of the first electrode is horizontally spaced apart from the sidewall of the second electrode by a second distance in each of the first and second stacks. the second distance is smaller than a half of the first distance.
Inventor(s): Jaeha LEE of Suwon-si KR for samsung electronics co., ltd., Sukjin KIM of Suwon-si KR for samsung electronics co., ltd., Sangdo PARK of Suwon-si KR for samsung electronics co., ltd., Yongho LEE of Suwon-si KR for samsung electronics co., ltd., Hongmook CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/528, H01L27/092
CPC Code(s): H01L23/5286
Abstract: provided is an integrated circuit including a complementary field effect transistor including a first transistor and a second transistor arranged in a vertical direction on a front side of a substrate, a via structure extending in the vertical direction on the second transistor and interconnecting a source/drain of the second transistor to a source/drain of the first transistor, at least one frontside power rail disposed above the first transistor in the vertical direction and transmitting a first supply voltage to the first transistor, a backside via penetrating through the substrate in the vertical direction, and at least one backside power rail disposed on a back side of the substrate and transmitting a second supply voltage to the second transistor through the backside via, wherein the first supply voltage and the second supply voltage have different voltage levels, and the first transistor and the second transistor share a gate line.
Inventor(s): Yonghyeok SON of Seoul KR for samsung electronics co., ltd., Junwoo LEE of Bucheon-si KR for samsung electronics co., ltd., Sungdong CHO of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/535, H01L21/768, H10B12/00
CPC Code(s): H01L23/535
Abstract: a semiconductor memory device includes a substrate including a cell area and a peripheral area, a plurality of capacitors including a plurality of lower electrodes arranged in the cell area, a plurality of capacitor dielectric layers covering the plurality of lower electrodes, and an upper electrode on the plurality of capacitor dielectric layers, an etch stop layer covering the upper electrode, a filling insulation layer covering the etch stop layer and arranged in the cell area and the peripheral area, a plurality of wiring lines on the filling insulation layer, and a first wiring contact plug electrically connecting at least one of the plurality of wiring lines to the upper electrode. the upper electrode includes a first upper electrode layer covering the plurality of capacitor dielectric layers and including a semiconductor material and a second upper electrode layer covering the first upper electrode layer and including a metallic material.
Inventor(s): Kanggyune LEE of Suwon-si KR for samsung electronics co., ltd., Sangwon LEE of Suwon-si KR for samsung electronics co., ltd., Hyeon HWANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/544, H01L23/00, H01L23/31
CPC Code(s): H01L23/544
Abstract: a method of marking a semiconductor package includes preparing a semiconductor package including a semiconductor chip and a package molding layer surrounding semiconductor chip, attaching a dry film to a top surface of the package molding layer, the dry film being attached to a carrier substrate, forming an ink spot by liquefying a portion of the dry film by radiating laser light to the carrier substrate, forming an ink marking pattern by solidifying the ink spot corresponding to the liquefied portion of the dry film, and removing a remaining portion of the dry film from the top surface of the package molding layer, the remaining portion of the dry film having not been liquefied, wherein the ink marking pattern includes information about storage capacity or information for identifying a producer of a product.
20250096157. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Kangjoon Lee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/00, H01L23/498, H01L25/16
CPC Code(s): H01L23/562
Abstract: a semiconductor package includes a package substrate, a package body disposed on an upper surface of the package substrate, and a stiffener disposed at each of four sides of the package substrate, wherein the stiffener includes a horizontal part covering the upper surface of the package substrate at the four sides of the package substrate and a vertical part extending downward from the horizontal part in a vertical direction substantially perpendicular to the upper surface of the package substrate at four corners of the package substrate, and the vertical part protrudes in the vertical direction from a lower surface of the package substrate.
20250096158. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jongyoun KIM of Seoul KR for samsung electronics co., ltd.
IPC Code(s): H01L23/00, H01L21/48, H01L21/56, H01L21/683, H01L21/78, H01L23/31, H01L23/367, H01L23/538
CPC Code(s): H01L23/562
Abstract: a semiconductor package includes a semiconductor chip, a redistribution insulating layer having a first opening, and an external connection bump including a first portion filling the first opening. a lower bump pad includes a first surface and a second surface opposite the first surface. the first surface includes a contact portion that directly contacts the first portion of the external connection bump and a cover portion surrounding side surfaces of the contact portion. a first conductive barrier layer surrounds side surfaces of the lower bump pad and is disposed between the lower bump pad and the redistribution insulating layer. a redistribution pattern directly contacts the second surface of the lower bump pad and is configured to electrically connect the lower bump pad to the semiconductor chip.
Inventor(s): YISEUL HAN of Suwon-si KR for samsung electronics co., ltd., KWANG-SOO KIM of Suwon-si KR for samsung electronics co., ltd., JAESUN KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/00, H01L21/48, H01L21/56, H01L23/367, H01L23/373, H01L23/498, H01L25/065, H01L25/18, H10B80/00
CPC Code(s): H01L24/16
Abstract: a semiconductor package includes a first redistribution layer structure, a first set of semiconductor dies on the first redistribution layer structure, a plurality of connection members on the first redistribution layer structure and around the first set of semiconductor dies, a molding material on the first redistribution layer structure, the molding material covering the first set of semiconductor dies and at least partially surrounding the plurality of connection members, a second redistribution layer structure on the molding material, a second set of semiconductor dies on the second redistribution layer structure, and a dummy structure on the second redistribution layer structure and between a first semiconductor die of the second set of semiconductor dies and a second semiconductor die of the second set of semiconductor dies.
20250096179. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Wooyoung KIM of Suwon-si KR for samsung electronics co., ltd., Yeonho JANG of Suwon-si KR for samsung electronics co., ltd., Kimin CHEONG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/00, H01L23/31, H01L23/49, H01L23/498, H01L23/552, H01L25/10
CPC Code(s): H01L24/20
Abstract: a semiconductor package may include a first wiring structure including a plurality of first redistribution patterns and a plurality of first redistribution insulating layers, a second wiring structure on the first wiring structure and including a plurality of second redistribution patterns and a plurality of second redistribution insulating layers, a semiconductor chip between the first wiring structure and the second wiring structure, an expanded layer including a plurality of connection structures electrically connecting the first wiring structure and the second wiring structure to each other and an encapsulant surrounding the plurality of connection structures and the semiconductor chip, a ceramic shield layer between the expanded layer and the second wiring structure, and a plurality of via structures penetrating the ceramic shield layer and electrically connecting the plurality of connection structures and the plurality of second redistribution patterns to each other.
Inventor(s): Changbo LEE of Asan-si KR for samsung electronics co., ltd., KWANHOO SON of Yongin-si KR for samsung electronics co., ltd., JOON SEOK OH of Seoul KR for samsung electronics co., ltd.
IPC Code(s): H01L23/00, H01L21/56, H01L21/683, H01L21/768, H01L23/31, H01L23/522, H01L23/528
CPC Code(s): H01L24/20
Abstract: disclosed are semiconductor devices and methods of fabricating the same. the method comprises providing a carrier substrate that includes a conductive layer, placing a semiconductor die on the carrier substrate, forming an insulating layer to cover the semiconductor die on the carrier substrate, forming a via hole to penetrate the insulating layer at a side of the semiconductor die and to expose the conductive layer of the carrier substrate, performing a plating process in which the conductive layer of the carrier substrate is used as a seed to form a via filling the via hole, forming a first redistribution layer on a first surface of the semiconductor die and the insulating layer, removing the carrier substrate, and forming a second redistribution layer on a second surface of the semiconductor die and the insulating layer, the first surface and the second surface being located opposite each other.
Inventor(s): Jihwan KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/00, H01L23/373, H01L25/065
CPC Code(s): H01L24/29
Abstract: a chip bonding film is provided and includes an adhesive film layer that is curable by heat, and fillers that are thermally conductive and are contained in the adhesive film layer, each of the fillers including magnetic particles, wherein a heat dissipation path is formed by the fillers in a vertical direction from a lower surface to an upper surface of the adhesive film layer.
Inventor(s): Chagyu SONG of Suwon-si KR for samsung electronics co., ltd., Hoyeon Seo of Suwon-si KR for samsung electronics co., ltd., Jaeyeon Ra of Suwon-si KR for samsung electronics co., ltd., Kookjin Park of Suwon-si KR for samsung electronics co., ltd., Chulwoo Park of Suwon-si KR for samsung electronics co., ltd., Dongjun Shin of Suwon-si KR for samsung electronics co., ltd., Jongbum Lee of Suwon-si KR for samsung electronics co., ltd., Gyeongmin Jin of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/00, H01L25/18, H05K1/02, H05K1/18, H10B80/00
CPC Code(s): H01L24/32
Abstract: an electronic device may be provided and include: a printed circuit board includes a first side and a second side perpendicular to the first side; a plurality of solder balls on a surface of the printed circuit board and spaced apart from the first side and the second side; an electronic component including at least one circuit, the electronic component on at least some of the plurality of solder balls; a resin along the first side and filling a portion of a space between the surface of the printed circuit board and the electronic component; and a blocking structure in or on the surface of the printed circuit board, the blocking structure being between the plurality of solder balls and the first side, and extending along the first side such as to separate the at least some of the plurality of solder balls from the resin.
20250096201. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Gyujin CHOI of Suwon-si KR for samsung electronics co., ltd., Dahee KIM of Suwon-si KR for samsung electronics co., ltd., Hwan Pil PARK of Suwon-si KR for samsung electronics co., ltd., Taehoon LEE of Suwon-si KR for samsung electronics co., ltd., Younjeong CHOE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L25/065, H01L21/56, H01L23/00, H01L23/31, H01L25/16
CPC Code(s): H01L25/0657
Abstract: the present disclosure relates to a semiconductor package which includes a wiring structure including insulating layers, wiring layers, and vias, a chip stack structure including a plurality of semiconductor chips and being oblique on the wiring structure such that the plurality of semiconductor chips are inclined with respect to the wiring structure, and a sealing material encapsulating the chip stack structure, wherein each of the plurality of semiconductor chips includes connection pads on one surface of the semiconductor chip, and the plurality of semiconductor chips are being offset with each other such that the connection pads are exposed, and each of the connection pads of each of the plurality of semiconductor chips is in contact with one of the vias and connected to the wiring layers.
Inventor(s): Jeongoh HA of Suwon-si KR for samsung electronics co., ltd., Juhyeon Kim of Suwon-si KR for samsung electronics co., ltd., Chajea Jo of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L25/10, H01L23/00, H01L23/31, H01L23/48, H01L23/498
CPC Code(s): H01L25/105
Abstract: a semiconductor package includes a first semiconductor chip having first and second surfaces opposing each other; first lower electrode pads on the first surface; a first insulating layer surrounding a side surface of each of the first lower electrode pads on the first surface; through-electrodes penetrating through at least a portion of the first semiconductor chip; first upper electrode pads on the through-electrodes; a first dielectric layer covering at least a portion of each of the first insulating layer, the first semiconductor chip, the through-electrodes, and the first upper electrode pads on the through-electrodes; where the first dielectric layer comprises a first portion and a second portion on the first portion of the first dielectric layer, and a first outer surface of the first portion is located on an inner side closer to the first semiconductor chip than a second outer surface of the second portion.
Inventor(s): Sangnam JEONG of Hwaseong-si KR for samsung electronics co., ltd., Yunhee LEE of Seongnam-si KR for samsung electronics co., ltd.
IPC Code(s): H01L25/16, H01L23/00, H01L23/498, H01L25/065
CPC Code(s): H01L25/16
Abstract: provided are an integrated voltage regulator (ivr) package with a minimized size including one or more inductors and one or more capacitors together with an ivr chip and improving characteristics of a voltage regulator (vr), and an ivr system package including the ivr package. the ivr package includes a package substrate, a stacked structure mounted on the package substrate and having a stack structure in which a passive device chip including one or more capacitors and an ivr chip including a voltage regulator are stacked, and an intermediate substrate disposed on the package substrate in a structure surrounding the stacked structure, the intermediate substrate including vias therein. the one or more inductors are included in the stacked structure or the intermediate substrate.
Inventor(s): HYUNSOO CHUNG of Suwon-si KR for samsung electronics co., ltd., YOUNG LYONG KIM of Suwon-si KR for samsung electronics co., ltd., CHI WOO LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L25/16, H01L21/48, H01L21/56, H01L23/00, H01L23/31, H01L23/498, H10B80/00
CPC Code(s): H01L25/167
Abstract: an embodiment provides a semiconductor package including: a redistribution structure; an interconnection structure on the redistribution structure; a memory stacking structure disposed on the redistribution structure and including a buffer die and core dies stacked on the buffer die; a semiconductor die disposed on the buffer die and on the interconnection structure; and an optical engine disposed on the interconnection structure.
Inventor(s): HYUNSOO CHUNG of Suwon-si KR for samsung electronics co., ltd., KWANG-SOO KIM of Suwon-si KR for samsung electronics co., ltd., CHI WOO LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L25/16, H01L21/56, H01L23/00, H01L23/31, H01L23/373, H01L23/498
CPC Code(s): H01L25/167
Abstract: a semiconductor package includes a redistribution structure, a semiconductor die on the redistribution structure, one or more memory stacking structures disposed on the redistribution structure, wherein the one or more memory stacking structures and the semiconductor die are arranged side by side on the redistribution structure, an optical engine disposed on the redistribution structure, wherein the optical engine and the semiconductor die are arranged side by side on the redistribution structure, and a heat dissipation structure on the semiconductor die, the one or more memory stacking structures, and the optical engine, wherein levels of upper surfaces of the semiconductor die, the one or more memory stacking structures, and the optical engine are the same.
Inventor(s): Haseob SEONG of Suwon-si KR for samsung electronics co., ltd., Aenee JANG of Suwon-si KR for samsung electronics co., ltd., Dawoon JUNG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L25/18, H01L23/00, H01L23/48, H01L23/528
CPC Code(s): H01L25/18
Abstract: a semiconductor package including: a base structure including upper and lower surfaces with upper and lower connection pads, the upper connection pad being connected to the lower connection pad; a plurality of first semiconductor chips stacked on the base structure, wherein the plurality of first semiconductor chips includes uppermost and lowermost chips, and wherein each of the plurality of first semiconductor chips includes a first lower and upper pads, and a silicon via connecting the first lower and upper pads; a cover chip, on the uppermost semiconductor chip, including an upper surface with a flat region and an edge region; and an upper dummy chip on the flat region and including an area smaller than an area of the cover chip and a thickness greater than a thickness of the cover chip, wherein the first lower pad of the lowermost chip is connected to the upper connection pad, and wherein the first upper pad of each of the plurality of first semiconductor chips, except for the uppermost chip, is connected to the first lower pad of another first semiconductor chip.
Inventor(s): Victor Roev of Suwon-si KR for samsung electronics co., ltd., Sewon Kim of Suwon-si KR for samsung electronics co., ltd., Jusik Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01M4/62, H01M4/02, H01M4/36, H01M10/058
CPC Code(s): H01M4/628
Abstract: an anode sub-assembly includes an anode current collector, a middle layer, and a solid electrolyte layer are arranged in this stated order, wherein in an initial state or fully discharged state thereof, the middle layer includes a first porous carbon material-containing middle layer contacting the solid electrolyte layer and including a porous carbon material having pores partially or fully filled with lithium, a second porous carbon material-containing middle layer on the first middle layer and having lithium-free pores, and a third metal-containing middle layer that is in contact with the anode current collector and is on the second porous carbon material-containing middle layer, wherein the third metal-containing middle layer includes a metal.
Inventor(s): Elena Aleksandrovna SHEPELEVA of Moscow RU for samsung electronics co., ltd., Artem Rudolfovich VILENSKIY of Moscow RU for samsung electronics co., ltd., Gennadiy Alexandrovich EVTYUSHKIN of Moscow RU for samsung electronics co., ltd., Anton Sergeevich LUKYANOV of Moscow RU for samsung electronics co., ltd.
IPC Code(s): H01Q21/06, H01Q15/00
CPC Code(s): H01Q21/065
Abstract: the disclosure relates to radio engineering, and more specifically, to a wide scan angle antenna array. technical result consists in expanding the scanning range, increasing the efficiency of the antenna array and reducing losses. antenna array is provided. the antenna array includes a plurality of antenna array elements, and a metasurface disposed above the antenna array, wherein the metasurface is a dielectric layer having, on a first side thereof, conductive elements configured to reflect part of radiation of the antenna array; the distance between the antenna array and the metasurface is based on an integer number of half wavelengths, an operating wavelength of the antenna array in a medium in the space between the antenna array and the metasurface, and a predetermined scanning angle of the antenna array.
Inventor(s): Sanghoon PARK of Suwon-si KR for samsung electronics co., ltd., Jungho PARK of Suwon-si KR for samsung electronics co., ltd., Kwanghyun BAEK of Suwon-si KR for samsung electronics co., ltd., Youngju LEE of Suwon-si KR for samsung electronics co., ltd., Jungyub LEE of Suwon-si KR for samsung electronics co., ltd., Juneseok LEE of Suwon-si KR for samsung electronics co., ltd., Dohyuk HA of Suwon-si KR for samsung electronics co., ltd., Jinsu HEO of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01Q21/30, H01Q1/24
CPC Code(s): H01Q21/30
Abstract: an antenna assembly is provided. the antenna assembly includes a first flexible printed circuit board (fpcb) for multiple first antennas, a second flexible printed circuit board (fpcb) for multiple second antennas, a metal plate including multiple holes, a first adhesive material layer for bonding between the metal plate and the first fpcb, and a second adhesive material layer for bonding between the metal plate and the second fpcb, wherein the metal plate is disposed such that the multiple first antennas are located in the multiple holes, respectively and the multiple second antennas to be located in the multiple holes, respectively.
Inventor(s): Hyungwook CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H02J7/00, H01M10/44, H01M10/46
CPC Code(s): H02J7/00302
Abstract: this electronic device may comprise: a first battery cell and a second battery cell connected in series to the first battery cell; a charging circuit configured to supply power of a first specified voltage from the outside to the first battery cell and the second battery cell; and at least one processor, comprising processing circuitry, individually and/or collectively, configured to control an overcharging protection operation voltage of the first battery cell and the second battery cell to a second specified voltage, wherein at least one processor, individually and/or collectively, is configured to; identify the voltage of the first battery cell and the voltage of the second battery cell while the first battery cell and the second battery cell are charged using the power of the first specified voltage; accumulate the number of times of overcharging protection operation for a battery cell having a voltage higher than the second specified voltage, based on at least one voltage among the voltage of the first battery cell and the voltage of the second battery cell being greater than the second specified voltage; and set an overcharging protection operation voltage for a battery cell having a voltage greater than the second specified voltage as a third specified voltage less than the second specified voltage, based on the number of times of the overcharging protection operation for the battery cell having a voltage greater than the second specified voltage reaches a specified number of times.
Inventor(s): Taehwang KONG of Suwon-si KR for samsung electronics co., ltd., Yeunhee HUH of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H03K17/0412, H02M1/08, H02M3/158, H03K17/16
CPC Code(s): H03K17/04123
Abstract: provided is an auxiliary circuit configured to estimate a miller plateau of a power transistor in a power conversion system, the auxiliary circuit including a filtering circuit electrically connected to a switching node of the power conversion system and configured to filter a voltage of the switching node, and a sensing circuit electrically connected to an output node of the filtering circuit and configured to detect whether the voltage of the switching node reaches a predetermined voltage level based on a voltage of the output node of the filtering circuit.
Inventor(s): Hyungdong ROH of Suwon-si KR for samsung electronics co., ltd., Kyunghoon Lee of Suwon-si KR for samsung electronics co., ltd., Woongtaek Lim of Suwon-si KR for samsung electronics co., ltd., Youngjae Cho of Suwon-si KR for samsung electronics co., ltd., Michael Choi of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H03K17/687, H01L27/02
CPC Code(s): H03K17/6871
Abstract: a sample and hold circuit may include: a first transistor connected between a first input terminal configured to receive a first input signal and a first output terminal configured to output a first sampled signal; a second transistor connected between a second input terminal configured to receive a second input signal and a second output terminal configured to output a second sampled signal; a first dummy transistor provided between the first input terminal and the second output terminal; and a second dummy transistor provided between the second input terminal and the first output terminal. a source region and a drain region of the first dummy transistor and a source region and a drain region of the second dummy transistor may not be electrically connected to a metal line connecting the first transistor with the second transistor.
Inventor(s): SEUNGHWAN HONG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H03L7/097, H03L7/081, H03L7/093
CPC Code(s): H03L7/097
Abstract: an error detector includes a first pulse generator configured to generate first and second interval signals in response to a plurality of phase signals, a first low-pass filter configured to convert the first and second interval signals into respective first and second voltages, and a first comparator configured to determine an error in a first phase signal among the plurality of phase signals, in response to the first and second voltages. the first pulse generator may be configured to generate the first interval signal in response to the first phase signal and a second phase signal among the plurality of phase signals, and generate the second interval signal in response to the first phase signal and a third phase signal among the plurality of phase signals.
20250096811. ANALOG-TO-DIGITAL CONVERTER_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Hyung Dong ROH of Suwon-si KR for samsung electronics co., ltd., Kyung Hoon LEE of Suwon-si KR for samsung electronics co., ltd., Woong Taek LIM of Suwon-si KR for samsung electronics co., ltd., Young Jae CHO of Suwon-si KR for samsung electronics co., ltd., Michael CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H03M1/12
CPC Code(s): H03M1/121
Abstract: an analog-to-digital converter is provided. an analog-to-digital converter comprises an interleaver receiving and processing an input signal that is an analog signal and a plurality of sub-adcs, wherein the interleaver includes a reference circuit outputting a second voltage based on a first voltage, a high-pass filter receiving the second voltage and outputting a first signal obtained by changing a common mode voltage of the input signal to the second voltage, a sampling circuit generating a second signal obtained by sampling an alternate current component of the first signal, and a buffer outputting a third signal obtained by buffering the second signal by using a buffering circuit, and the sub-adc converts the third signal into a digital signal by using the first voltage.
Inventor(s): Daechul Jeong of Suwon-si KR for samsung electronics co., ltd., Seonkyoo Lee of Suwon-si KR for samsung electronics co., ltd., Taesung Lee of Suwon-si KR for samsung electronics co., ltd., Tongsung Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04B1/04, H03K19/0185
CPC Code(s): H04B1/04
Abstract: a data signal transmitter includes a standby voltage generator, which is configured to selectively output: (i) a data signal during an active operation mode, and (ii) first and second different standby voltages during a standby operation mode, and a repeater block. the repeater block includes: a first cmos inverter configured to receive the first standby voltage during the standby operation mode, and a second cmos inverter configured to receive the second standby voltage during the standby operation mode.
Inventor(s): Changwon JANG of Suwon-si KR for samsung electronics co., ltd., Seungjin YU of Suwon-si KR for samsung electronics co., ltd., Woong LEE of Suwon-si KR for samsung electronics co., ltd., Yuseon LEE of Suwon-si KR for samsung electronics co., ltd., Jaewoong LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04B7/0408, G01S13/42, H04W76/00
CPC Code(s): H04B7/0408
Abstract: a method of establishing a communication link is provided. the method includes monitoring a heading direction of a vehicle, in case that the heading direction of the vehicle is changed by at least as much as a preset angle, determining a search order between a plurality of antenna modules in consideration of the changed heading direction of the vehicle and mounting positions of the plurality of antenna modules mounted on the vehicle, evaluating the plurality of antenna modules according to the search order, and communicating with a base station via a new antenna module selected based on a result of the evaluating, rather than via an old antenna module used for communication with the base station.
20250096880. BEAM MEASUREMENT AND REPORTING_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Dalin Zhu of Allen TX US for samsung electronics co., ltd., Emad Nader Farag of Flanders NJ US for samsung electronics co., ltd., Eko Onggosanusi of Coppell TX US for samsung electronics co., ltd.
IPC Code(s): H04B7/06, H04L5/00, H04W24/10, H04W72/044
CPC Code(s): H04B7/06966
Abstract: methods and apparatuses for beam measurement and reporting. a method performed by a user equipment (ue) is provided. the method includes receiving first information related to inclusion in a report of at least one first report quantity associated with a first reference signal (rs) resource and receiving second information related to at least one second rs resource. the method further includes determining, based on the first rs resource, the at least one first report quantity and determining, based on the at least one second rs resource, at least one second report quantity. the method further includes determining, based on (i) the first information and (ii) the at least one second report quantity, the report and transmitting the report.
Inventor(s): Min JANG of Suwon-si KR for samsung electronics co., ltd., Seho MYUNG of Suwon-si KR for samsung electronics co., ltd., Youngwoo KIM of Suwon-si KR for samsung electronics co., ltd., Joohyun LEE of Suwon-si KR for samsung electronics co., ltd., Hyuntack LIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04L1/1607, H04L1/00, H04L5/00
CPC Code(s): H04L1/1607
Abstract: a decoding method performed by a receiver of a communication system, according to an embodiment, comprises: receiving a signal transmitted from a transmitter; identifying a parity check matrix for decoding the signal; identifying a first layer scheduling sequence corresponding to the parity check matrix; and performing layered decoding on the basis of at least a part of the parity check matrix and at least a part of the first layer scheduling sequence.
Inventor(s): Hoda Shahmohammadian of San Diego CA US for samsung electronics co., ltd., Jung Hyun Bae of San Diego CA US for samsung electronics co., ltd.
IPC Code(s): H04L5/00, H04W72/231, H04W72/51
CPC Code(s): H04L5/0053
Abstract: a system and a method are disclosed for joint transmission in a utci framework, the method includes sending, by a user equipment (ue), a first transmission including information indicating a capability of per resource set for a first feature associated with a unified transmission-configuration-indicator (utci) scheme, the capability of per resource set indicating that the ue is capable of associating channel-state-information reference-signal (csi-rs) resources with transmission-configuration-indicator (tci) states at a resource-set level, wherein the ue is configured to support a joint transmission, and wherein the first feature indicates that the ue is capable of supporting per aperiodic csi-rs resource configuration for tci selection, or per aperiodic csi-rs resource-set configuration for tci selection.
Inventor(s): Sa ZHANG of Beijing CN for samsung electronics co., ltd., Yi WANG of Beijing CN for samsung electronics co., ltd., Jingxing FU of Beijing CN for samsung electronics co., ltd., Feifei SUN of Beijing CN for samsung electronics co., ltd.
IPC Code(s): H04L5/00, H04L1/1812
CPC Code(s): H04L5/0055
Abstract: the disclosure relates to a 5generation (5g) or 6generation (6g) communication system for supporting a higher data transmission rate. a method performed by a terminal is provided. the method includes receiving, from a base station, a radio resource control (rrc) message including first configuration information for a hybrid automatic repeat request (harq)-acknowledgement (ack) feedback mode related to a multicast physical downlink shared channel (pdsch) and second configuration information for a physical uplink control channel (pucch) resource set related to the harq-ack feedback mode, receiving, from the base station, the multicast pdsch, and transmitting, to the base station, harq-ack information for the multicast pdsch based on the first configuration information and the second configuration information.
Inventor(s): Taeseop LEE of Gyeonggi-do KR for samsung electronics co., ltd., Anil AGIWAL of Gyeonggi-do KR for samsung electronics co., ltd., Sangyeob JUNG of Gyeonggi-do KR for samsung electronics co., ltd.
IPC Code(s): H04L5/00, H04W72/1263
CPC Code(s): H04L5/0092
Abstract: the present disclosure relates to a 5th generation (5g) or pre-5g communication system for supporting a higher data transmission rate than a 4th generation (4g) communication system such as long term evolution (lte). according to various embodiments of the present disclosure, provided is a method for operation of user equipment in a wireless communication, the method comprising the steps of: receiving uecapabilityenquiry from a base station; transmitting uecapabilityinformation to the base station; receiving rrcreconfiguration from the base station; transmitting rrcreconfigurationcomplete to the base station; transmitting ueassistanceinformation to the base station; receiving rrcreconfiguration from the base station; and transmitting rrcreconfigurationcomplete to the base station.
Inventor(s): Hyunyoung NAM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04L41/082, H04L41/342, H04L41/40
CPC Code(s): H04L41/082
Abstract: a method performed by a virtual network function manager (vnfm) of management and orchestration (mano), according to various embodiments, may comprise: receiving an upgrade request of a virtual network function (vnf) from an operator via a network function virtualization orchestrator (nfvo); transmitting a request message for upgrading software (sw) to the vnf; receiving, from the vnf, a response message for upgrading the sw; transmitting, to the vnf, a task inquiry message for requesting a task type for upgrading the sw; receiving, from the vnf, a task response message including information on the task type; and performing a task according to the task type for upgrading the sw, based on the task response message.
Inventor(s): Jongmoon PARK of Suwon-si KR for samsung electronics co., ltd., Youngoh KIM of Suwon-si KR for samsung electronics co., ltd., Junghan KIM of Suwon-si KR for samsung electronics co., ltd., Hyungki PARK of Suwon-si KR for samsung electronics co., ltd., Kidoc SON of Suwon-si KR for samsung electronics co., ltd., Hyunsuk CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04M1/02
CPC Code(s): H04M1/0283
Abstract: according to various embodiments of the present disclosure, an anodized aluminum plate may be provided, the anodized aluminum plate including a first region and a second region connected to the first region, wherein the first region includes at least one first pore having a first diameter, the second region includes a first second region connected to the first region and a second second region extending from the first second region, and the first second region includes at least one second pore having a second diameter less than the first diameter.
Inventor(s): Wanju SHIN of Suwon-si KR for samsung electronics co., ltd., Gijae PARK of Suwon-si KR for samsung electronics co., ltd., Jongmun CHOI of Suwon-si KR for samsung electronics co., ltd., Hyunsuk CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04M1/02
CPC Code(s): H04M1/0283
Abstract: an electronic device is provided. the electronic device includes a housing at least one processor disposed in the housing and including processing circuitry, wherein the housing includes a glass including a first glass surface visually exposed to an outside of the housing and an irregular pattern formed on the first glass surface, and a reflective layer disposed on the irregular pattern and formed to correspond to a shape of the irregular pattern and a second surface facing the outside of the housing and spaced apart from the first surface by a designated distance.
Inventor(s): Alexander ALSHIN of Seoul KR for samsung electronics co., ltd., Elena ALSHINA of Seoul KR for samsung electronics co., ltd.
IPC Code(s): H04N19/513, H04N19/105, H04N19/139, H04N19/159, H04N19/176
CPC Code(s): H04N19/513
Abstract: provided is a video decoding method including determining a displacement vector per unit time of pixels of a current block in a horizontal direction or a vertical direction, the pixels including a pixel adjacent to an inside of a boundary of the current block, by using values about reference pixels included in a first reference block and a second reference block, without using a stored value about a pixel located outside boundaries of the first reference block and the second reference block; and obtaining a prediction block of the current block by performing block-unit motion compensation and pixel group unit motion compensation on the current block by using a gradient value in the horizontal direction or the vertical direction of a first corresponding reference pixel in the first reference block which corresponds to a current pixel included in a current pixel group in the current block, a gradient value in the horizontal direction or the vertical direction of a second corresponding reference pixel in the second reference block which corresponds to the current pixel, a pixel value of the first corresponding reference pixel, a pixel value of the second corresponding reference pixel, and a displacement vector per unit time of the current pixel in the horizontal direction or the vertical direction. in this regard, the current pixel group may include at least one pixel.
Inventor(s): Xianghu CHEN of Jiangsu CN for samsung electronics co., ltd., Yong Zhang of Jiangsu CN for samsung electronics co., ltd., Zuolong Wang of Jiangsu CN for samsung electronics co., ltd.
IPC Code(s): H04N21/422, H04N21/41
CPC Code(s): H04N21/42204
Abstract: a multi-view resource allocation method includes based on determining that an application (app) of a terminal device is started, determining, by the terminal device, a resource type allocated for the app on the basis of a current view mode that is a single-view mode or a multi-view mode, and the resource type being a main resource or a sub-resource; and acquiring, by the app, a corresponding resource according to the allocated resource type.
20250097594. IMAGE SENSOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jaekyu LEE of Seongnam-si KR for samsung electronics co., ltd., Heesung SHIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04N25/531, H01L27/146, H04N25/533, H04N25/75
CPC Code(s): H04N25/531
Abstract: an image sensor is disclosed. the image sensor includes a plurality of pixels arranged in a plurality of rows and a plurality of columns, each of the pixels including: a photodiode; a floating diffusion node configured to accumulate photocharges generated from the photodiode; a first capacitor configured to store charges according to a voltage of the floating diffusion node which is reset; a second capacitor configured to store charges according to a voltage of the floating diffusion node in which the photocharges are accumulated; a first sampling transistor connected to a first output node and configured to sample charges to the first capacitor; a second sampling transistor connected to the first output node and configured to sample charges to the second capacitor; and at least one precharge select transistor connected to the first output node and configured to reset the first output node.
Inventor(s): Joosung Moon of Suwon-si KR for samsung electronics co., ltd., Hyukbin Kwon of Suwon-si KR for samsung electronics co., ltd., Sungjae Byun of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04N25/532, H04N25/766
CPC Code(s): H04N25/532
Abstract: an image sensor and an image processing system. the image sensor includes a pixel array comprising a plurality of pixels, a row driver configured to generate control signals for controlling the plurality of pixels, the row driver configured to use an external voltage received from a source outside the image sensor and an internal voltage generated within the image sensor, and a voltage generator configured to generate the internal voltage, wherein the external voltage includes a first external voltage and a second external voltage, the internal voltage includes a first internal voltage and a second internal voltage, a level of the first internal voltage is higher than a level of the second internal voltage, and a level of the first external voltage is between the level of the first internal voltage and the level of the second internal voltage.
Inventor(s): Jungwook LIM of Hwaseong-si KR for samsung electronics co., ltd., Jihun KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04N25/704, H04N25/11, H04N25/77
CPC Code(s): H04N25/704
Abstract: an image sensor including: a pixel array including first and second pixel groups, each of the first and second pixel groups includes of pixels arranged in rows and columns; and a row driver configured to provide transmission control signals to the pixel array, the first pixel group includes a first auto-focus (af) pixel including photodiodes arranged in a first direction, the pixels of the first pixel group output a pixel signal through a first column line, and the second pixel group includes a second af pixel including photodiodes arranged in a second direction perpendicular to the first direction, the pixels of the second pixel group output a pixel signal through a second column line, and the first af pixel of the first pixel group and the second af pixel of the second pixel group receive same transmission control signals.
20250097599. SOLID-STATE IMAGING DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Shiono Masumi of Yokohama JP for samsung electronics co., ltd., Oshima Itaru of Yokohama JP for samsung electronics co., ltd.
IPC Code(s): H04N25/76, H01L27/146, H04N25/707, H04N25/77
CPC Code(s): H04N25/76
Abstract: a solid-state imaging device with increased integration is provided. a pixel of the solid-state imaging device includes a photoelectric converter and a counter that counts a pulse signal output based on the amount of light incident on the photoelectric converter, wherein the counter may be divided into a lower bit group and an upper bit group, a first integrated circuit is provided between the lower bit group and the upper bit group, and the first integrated circuit may connect the lower bit group and the upper bit group of a plurality of pixels to each other.
Inventor(s): Jungyeol AN of Suwon-si KR for samsung electronics co., ltd., Gangyoul KIM of Suwon-si KR for samsung electronics co., ltd., Choonho KIM of Suwon-si KR for samsung electronics co., ltd., Youngbae PARK of Suwon-si KR for samsung electronics co., ltd., Myungcheol LEE of Suwon-si KR for samsung electronics co., ltd., Joonrae CHO of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04R3/00, H04R1/02, H04R1/40, H04R3/02
CPC Code(s): H04R3/005
Abstract: an electronic device according to the disclosure may include: a display disposed around an eye of a user when being worn on a body part of the user, a plurality of microphones configured to receive an external signal, a camera, a speaker configured to reproduce a signal, at least one processor, comprising processing circuitry, and a memory. at least one processor, individually and/or collectively, may be configured to execute the instructions stored in the memory and to operate any one of a first mode or a second mode according to a designated condition, the first mode displaying a virtual space on the display and the second mode displaying a real space captured via the camera on the display. based on the operation of one of the first mode or the second mode, at least one processor, individually and/or collectively may be configured to control the electronic device to: differently determine a location of a microphone to be activated for inputting an external signal among the plurality of microphones disposed in the electronic device, may differently determine a number of microphones to be activated for inputting an external signal among the plurality of microphones disposed in the electronic device, may differently determine whether to activate functions related to amplifying or blocking an external sound, and may differently determine a direction of beamforming generation for receiving a voice signal via the microphone.
20250097670. METHOD AND DEVICE FOR FLOW CONTROL_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Hong WANG of Beijing CN for samsung electronics co., ltd., Weiwei WANG of Beijing CN for samsung electronics co., ltd., Lixiang XU of Beijing CN for samsung electronics co., ltd.
IPC Code(s): H04W4/06, H04W28/02
CPC Code(s): H04W4/06
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. a method performed by a first node in a wireless communication system, including receiving, from a second node, downlink user data through a first radio bearer, the downlink user data including multicast service data; transmitting, to at least one ue, the downlink user data through a second radio bearer; and transmitting, to the second node, a downlink data delivery status including pdcp sequence number information, wherein the pdcp sequence number information includes a higher pdcp sequence number between a highest pdcp sequence number successfully delivered in sequence associated with a first transmission mode and a highest pdcp sequence number transmitted to lower layers associated with a second transmission mode.
Inventor(s): Seongil HAHM of Suwon-si KR for samsung electronics co., ltd., Jeik KIM of Suwon-si KR for samsung electronics co., ltd., Kwanjoo MYOUNG of Suwon-si KR for samsung electronics co., ltd., Miyoung YOO of Suwon-si KR for samsung electronics co., ltd., Daesung AN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04W8/00, H04L12/28, H04W4/80, H04W76/14
CPC Code(s): H04W8/005
Abstract: a method of controlling a home appliance, the method including, by a home appliance: outputting, via bluetooth low energy (ble) advertising, a ble advertising packet including service set identifier (ssid)-related information related to an ssid of a software enabled access point (soft ap) of the home appliance in a new product state in which the home appliance has not been registered in a server; outputting a wi-fi beacon of the soft ap; in response to a connection request for the soft ap received from a mobile device after outputting the wi-fi beacon, establishing a wi-fi communication connection between the mobile device and the soft ap; receiving, from the mobile device via the wi-fi communication connection, a control signal related to an initial setting operation of registering the home appliance in the server; and performing the initial setting operation, based on the received control signal.
Inventor(s): Sujung KANG of Suwon-si KR for samsung electronics co., ltd., Kangjin YOON of Suwon-si KR for samsung electronics co., ltd., Duckey LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04W8/18, H04W12/40, H04W48/00, H04W60/00
CPC Code(s): H04W8/183
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data rate than a 4g communication system such as lte. an embodiment of the disclosure provides a method and an apparatus for determining a scheme of accessing an isd-r corresponding a profile management module in an euicc in a terminal (a modem or an lpa) during terminal-card initialization. in addition, an embodiment of the disclosure provides a method for determining, by an lpa, a scheme of access an isd-r to be used by the lpa, with reference to a scheme determined during terminal-card initialization or a pre-configured scheme, and transferring a message to an euicc. in addition, an embodiment of the disclosure provides a method and an apparatus for configuring, by an lpa, different profile management messages according to determined isd-r access schemes, and perform transferring through a selected isd-r access scheme.
Inventor(s): Samir Kumar MISHRA of Bangalore IN for samsung electronics co., ltd., Sarvesha Anegundi GANAPATHI of Bangalore IN for samsung electronics co., ltd.
IPC Code(s): H04W8/18, H03M13/11, H03M13/39, H04W8/20, H04W88/06
CPC Code(s): H04W8/183
Abstract: methods and systems for managing decoding of control channel on a multi-sim ue. a method includes receiving, by the ue, the plurality of control channels from at least one base station (bs), the plurality of control channels corresponding to a plurality of subscriber identity modules (sims), selecting, by the ue, a respective decoder for each of the plurality of sims, and decoding, by the ue, each respective control channel among the plurality of control channels using the respective decoder for a respective sim among the plurality of sims, the respective sim corresponding to the respective control channel.
Inventor(s): Rohini RAJENDRAN of Bangalore IN for samsung electronics co., ltd., Rajavelsamy RAJADURAI of Bangalore IN for samsung electronics co., ltd., Kiran Gurudev KAPALE of Bangalore IN for samsung electronics co., ltd., Nivedya Parambath SASI of Bangalore IN for samsung electronics co., ltd.
IPC Code(s): H04W12/06, H04L67/02
CPC Code(s): H04W12/06
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. disclosed herein is method and system for authorizing a mcx server. an authorization server is configured to receive a validation request from a mcdata message store in response to a user account access request received by mcdata message store from mcx server. further, authorization server is configured to validate identification information of mcx server. further, authorization server is configured to transmit a validation response to mcdata message store indicating authorization of mcx server to access user account in mcdata message store, upon successful validation of identification information of tmcx server. an authorization server is introduced to provide additional layer of security to user account with mc data.
Inventor(s): Keonyoung LEE of Suwon-si KR for samsung electronics co., ltd., Minwoong CHO of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04W36/00, H04W36/08, H04W76/30
CPC Code(s): H04W36/0058
Abstract: in an electronic device and an electronic device operating method, according to various embodiments, the electronic device comprises: a communication circuit for supporting first cellular communication and/or second cellular communication; an application processor; and a communication processor, wherein the application processor can be configured to: check whether the electronic device satisfies conditions related to the disconnection of the first cellular communication in a state in which the electronic device is connected through the first cellular communication; and transmit, on the basis of the electronic device satisfying the conditions related to the disconnection of the first cellular communication, to the communication processor, a signal indicating satisfaction of the conditions related to the disconnection of the first cellular communication, and the communication processor can be configured to: check, on the basis of the reception of the signal indicating satisfaction of the conditions related to the disconnection of the first cellular communication, whether system information including information, received from a node connected through the first cellular communication, about nodes adjacent to the node is received and/or whether a measure object satisfies designated conditions; disconnect the first cellular communication on the basis of whether the system information is received and/or whether the measure object satisfies the designated conditions; and connect the second cellular communication on the basis of the system information and/or the measure object. various other embodiments are possible.
Inventor(s): Kisuk KWEON of Gyeonggi-do KR for samsung electronics co., ltd.
IPC Code(s): H04W40/02, H04W40/24, H04W48/16, H04W60/04
CPC Code(s): H04W40/02
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. disclosed is a by a policy control function (pcf) entity in a wireless communication system, including receiving, from a user equipment (ue), a registration request including radio capability information about the ue through an access and mobility management function (amf) entity, updating ue route selection policy (ursp) rule information based on the radio capability information about the ue, and transmitting, to the ue, the updated ursp rule information through the amf entity.
Inventor(s): Vishnu Vardhan Ratnam of Frisco TX US for samsung electronics co., ltd., Abhishek Sehgal of Frisco TX US for samsung electronics co., ltd., Boon Loong Ng of Plano TX US for samsung electronics co., ltd., Yuming Zhu of Plano TX US for samsung electronics co., ltd.
IPC Code(s): H04W48/16, H04L45/302
CPC Code(s): H04W48/16
Abstract: techniques for using contextual information from a host stas in the context of a wireless network having at least one non-ap station (sta) are disclosed. the host sta uses transmitted fields from the ap to determine a make of the ap. the host sta sends a request message to control one or more ap parameters to the ap. the host sta, if the ap accepts the message, sends another message identifying the stas in its network. the host sta also acquires, via a message from the ap, details about the stas associated with the ap. when receiving contextual information from itself or otherwise, the host sta determines an appropriate action, and transmits an action request message for the ap to take the action. the ap confirms once the action is taken.
Inventor(s): Buseop JUNG of Gyeonggi-do KR for samsung electronics co., ltd., Soonho LEE of Gyeonggi-do KR for samsung electronics co., ltd., Doosuk KANG of Gyeonggi-do KR for samsung electronics co., ltd.
IPC Code(s): H04W48/16, H04W4/80, H04W56/00, H04W84/18
CPC Code(s): H04W48/16
Abstract: according to an embodiment, an electronic device may include: a wireless communication circuit for performing short-range wireless communication with at least one external electronic device; a memory; and a processor operatively connected to the wireless communication circuit and the memory. the processor may perform the short-range wireless communication with the at least one external electronic device via the wireless communication circuit, form a first neighbor awareness networking (nan) cluster with the at least one external electronic device, on the basis of the short-range wireless communication, transmit a short-range wireless signal to the at least one external electronic device included in the first nan cluster, and inactivate an nan cluster merging function of the at least one external electronic device, using the short-range wireless signal. various other embodiments may be possible.
Inventor(s): Sharan Naribole of San Jose CA US for samsung electronics co., ltd., Srinivas Kandala of Morgan Hill CA US for samsung electronics co., ltd., Wook Bong Lee of San Jose CA US for samsung electronics co., ltd., Ashok Ranganath of Los Gatos CA US for samsung electronics co., ltd.
IPC Code(s): H04W52/02
CPC Code(s): H04W52/0222
Abstract: systems and methods for managing use of power of a wireless communication device configured to communicate over a plurality of radio links. a criterion is detected, and one of the plurality of radio links is selected as a selected radio link based on detecting the criterion. operation of the selected radio link is switched from a first operating mode to a second operating mode, and operation of one or more remaining radio links of the plurality of radio links is disabled. in response to switching operation of the selected radio link to the second operating mode, the selected radio link oscillates between an awake state and an asleep state. radio traffic information for the plurality of radio links is received, via the selected radio link, during the awake state.
Inventor(s): Jeongho Jeon of San Jose CA US for samsung electronics co., ltd.
IPC Code(s): H04W52/02
CPC Code(s): H04W52/0229
Abstract: methods and apparatuses for a user equipment (ue)-initiated cell operation adaptation in wireless communication systems. a method for a user equipment (ue) includes receiving information related to transmission of a wake-up signal (wus). the information includes at least a resource configuration and a triggering condition. the method further includes transmitting, based on (i) the resource configuration and (ii) whether the triggering condition is met, the wus; receiving an on-demand synchronization signal block (ssb) or an on-demand system information block (sib) on a cell; and determining synchronization or system information on the cell.
Inventor(s): Jungsik MIN of Suwon-si KR for samsung electronics co., ltd., Wonhyung HEO of Suwon-si KR for samsung electronics co., ltd., Yelim KIM of Suwon-si KR for samsung electronics co., ltd., Jinseong PARK of Suwon-si KR for samsung electronics co., ltd., Dongil SON of Suwon-si KR for samsung electronics co., ltd., Seunghee SON of Suwon-si KR for samsung electronics co., ltd., Kyoungsik YOON of Suwon-si KR for samsung electronics co., ltd., Sanghyun HAN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04W52/28, H04B17/27, H04W4/30
CPC Code(s): H04W52/285
Abstract: an electronic device is provided. the electronic device outputs a designated wireless signal through a first antenna on the basis that the designated wireless signal is output at a designated strength or higher through a second antenna, while a first wireless signal of a first frequency band and a second wireless signal of a second frequency band are output through the first antenna and/or the second antenna. the electronic device identifies, through a proximity sensor, whether an external object is in proximity thereto, and adjusts, based on the identified proximity, the strength of the designated wireless signal that is output through the first antenna.
Inventor(s): Carmela Cozzo of San Diego CA US for samsung electronics co., ltd., Emad Nader Farag of Flanders V for samsung electronics co., ltd., Hongbo Si of Allen TX US for samsung electronics co., ltd.
IPC Code(s): H04W52/34, H04W52/24, H04W52/36, H04W72/25
CPC Code(s): H04W52/34
Abstract: methods and apparatuses for transmit power control of sidelink (sl) channels on multiple carriers in a wireless communication system. a method of a user equipment (ue) includes receiving information related to sl operation on multiple sl carriers and simultaneous transmissions of a physical sl feedback channel (psfch) and a physical sl control or shared channel (pscch or pssch) and determining first and second powers for simultaneous transmissions of the psfch on first carriers and the pscch or pssch on second carriers. the first powers are based on values of a power control parameter associated with the first carriers. a sum of the second powers does not exceed a power difference between a maximum power and a sum of the first powers. the method further includes simultaneously transmitting the psfch on the first carriers using the first powers and the pscch or pssch on the second carriers using the second powers.
Inventor(s): Jia ZHU of Suzhou CN for samsung electronics co., ltd.
IPC Code(s): H04W56/00, H04W24/10, H04W64/00
CPC Code(s): H04W56/0015
Abstract: a measurement method and a measurement device based on synchronization signal and pbch block (ssb) indexes are provided. the measurement method includes adding a first ssb index corresponding to a first ssb into a first measurement candidate set based on the first ssb having a first measured signal quality value greater than a threshold, and measuring a signal quality value for each ssb corresponding to a respective ssb index in the first measurement candidate set in a first ssb measurement period.
Inventor(s): Jeongho Jeon of San Jose CA US for samsung electronics co., ltd.
IPC Code(s): H04W56/00, H04W76/28
CPC Code(s): H04W56/0015
Abstract: methods and apparatuses for flexible synchronization signal and system information transmission in wireless communication systems are provided. a method for a user equipment (ue) includes receiving information related to: a synchronization signal block (ssb) with an adaptation of periodicity or availability, an on-demand ssb, or an on-demand system information block (sib). the method further includes receiving, on a cell, the ssb with the adaptation of periodicity or availability, the on-demand ssb, or the on-demand sib and determining synchronization or system information on the cell.
Inventor(s): Taeseop LEE of Suwon-si KR for samsung electronics co., ltd., Beomsik BAE of Suwon-si KR for samsung electronics co., ltd., Seungri JIN of Suwon-si KR for samsung electronics co., ltd., June HWANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04W64/00, H04L5/00
CPC Code(s): H04W64/00
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. a method of a ue in a wireless communication system is provided. the method of the ue comprises: receiving, from a network entity including a location management function (lmf), pre-defined positioning reference signal (prs) configuration information; transmitting, to the network entity, a request for an on-demand prs, wherein the request for the on-demand prs includes periodicity information associated with a subcarrier spacing (scs) of a synchronization signal block (ssb); and in response to transmitting the request for the on-demand prs, receiving, from the network entity, prs configuration information.
Inventor(s): Junyung YI of Suwon-si KR for samsung electronics co., ltd., Youngbum KIM of Suwon-si KR for samsung electronics co., ltd., Jeongho YEO of Suwon-si KR for samsung electronics co., ltd., Sungjin PARK of Suwon-si KR for samsung electronics co., ltd., Cheolkyu SHIN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04W72/0446
CPC Code(s): H04W72/0446
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. a method performed by a terminal in a wireless communication system comprises determining multiple slots for a pusch transmission; identifying a redundancy version for the pusch transmission; and transmitting a transport block (tb) across the multiple slots determined for the pusch transmission, wherein a single value of the redundancy version is applied on the tb across the multiple slots.
Inventor(s): Sungjin PARK of Suwon-si KR for samsung electronics co., ltd., Youngbum KIM of Suwon-si KR for samsung electronics co., ltd., Hyunseok RYU of Suwon-si KR for samsung electronics co., ltd., Jeongho YEO of Suwon-si KR for samsung electronics co., ltd., Seunghoon CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04W72/1273, H04L1/00, H04L1/1812, H04L5/00, H04W4/06, H04W72/0446, H04W72/20
CPC Code(s): H04W72/1273
Abstract: disclosed are a communication scheme and a system thereof for converging iot technology and a 5g communication system for supporting a higher data transmission rate beyond that of a 4g system. the disclosure can be applied to intelligent services (for example, services related to smart homes, smart buildings, smart cities, smart cars, connected cars, health care, digital education, retail business, security, and safety) based on the 5g communication technology and the iot-related technology. further, disclosed is a 5g or 6g communication system for supporting a higher data transmission rate than a post-4g communication system such as lte.
Inventor(s): Hongbo Si of Allen TX US for samsung electronics co., ltd., Kyeongin Jeong of Allen TX US for samsung electronics co., ltd.
IPC Code(s): H04W72/25, H04W72/0446
CPC Code(s): H04W72/25
Abstract: apparatuses and methods for sidelink synchronization signals and physical sidelink broadcast channel block (s-ssb) transmission in resource block (rb) sets. a method of a user equipment (ue) includes receiving a set of configurations and determining, based on the set of configurations, a sidelink (sl) bandwidth part (bwp), a resource pool in the sl bwp, a number of rb sets in the sl bwp, and a slot for a transmission of a s-ssb. the number of rb sets include one anchor rb set and one or more non-anchor rb sets. the method further includes attempting to transmit the s-ssb in the slot and at least in the anchor rb set, wherein a channel access procedure is performed on a channel that includes the anchor rb set; and attempting to transmit the s-ssb in the slot and in the one or more non-anchor rb sets only when the channel access procedure fails.
Inventor(s): Sangkyu BAEK of Suwon-si KR for samsung electronics co., ltd., Anil AGIWAL of Mountain View CA US for samsung electronics co., ltd.
IPC Code(s): H04W72/30, H04L1/1812, H04W76/27
CPC Code(s): H04W72/30
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. specifically, the disclosure provides a method and an apparatus for managing a discontinuous reception (drx) active time such that multicast and broadcast service (mbs) reception is performed efficiently in an radio resource control (rrc) inactive state.
Inventor(s): Anil Agiwal of Allen TX US for samsung electronics co., ltd.
IPC Code(s): H04W74/0833, H04W72/231
CPC Code(s): H04W74/0833
Abstract: a ue includes a transceiver configured to receive a radio resource control (rrc) reconfiguration message including a configuration for at least one lower layer triggered mobility (ltm) candidate cell, and receive an ltm switch command media access control (mac) control element (ce) indicating to perform an ltm cell switch to an ltm candidate cell of the at least one ltm candidate cell. the transceiver is also configured to transmit, a repetition number n of times, a random access (ra) preamble to the ltm candidate cell indicated by the mac ce. the ue also includes a processor operatively coupled to the transceiver. the processor is configured to, after the ra preamble has been transmitted the n times, monitor a physical downlink control channel (pdcch) for a random access response.
Inventor(s): Mahmoud WATFA of Staines, Middlesex GB for samsung electronics co., ltd., Lalith KUMAR of Bangalore IN for samsung electronics co., ltd.
IPC Code(s): H04W76/10, H04W24/02, H04W60/04
CPC Code(s): H04W76/10
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. disclosed is a method of operating a user equipment (ue) in communication with a telecommunication network, wherein the ue is provided with a first set of information and a second set of information, the first and second sets relating to the availability of one or more certain services for the ue defined in terms of tracking area identities (tais), wherein the ue determines if there is an overlapping tai present in the first and the second set of information and, if it is so determined, then a rule associated with whichever of the first and second set has been assigned a higher priority applies to the overlapping tai.
Inventor(s): Liang HU of San Diego CA US for samsung electronics co., ltd., Jung Hyun BAE of San Diego CA US for samsung electronics co., ltd., Jungmin PARK of Seoul KR for samsung electronics co., ltd., Hsien-Ping Lin of San Diego CA US for samsung electronics co., ltd.
IPC Code(s): H04W76/11, H04L1/00, H04W72/23
CPC Code(s): H04W76/11
Abstract: a system and bandwidth-limited ue for accommodating reduced capability user equipment in a mobile network. the bandwidth-limited ue may include monitoring, by a bandwidth-limited user equipment (ue), a subset of a core resource set (coreset), the use of a special synchronization signal for bandwidth-limited ues, or the use of bandwidth part (bwp) switching.
Inventor(s): Chadi KHIRALLAH of Staines GB for samsung electronics co., ltd., Mahmoud WATFA of Staines GB for samsung electronics co., ltd.
IPC Code(s): H04W76/20, H04W76/30, H04W84/06
CPC Code(s): H04W76/20
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. the present invention relates to user equipment, ue, location information and more particular to improvements in sending said ue location information to a network, particularly in a secure manner.
Inventor(s): Younghoon WOO of Suwon-si KR for samsung electronics co., ltd., Kyounghwan KIM of Suwon-si KR for samsung electronics co., ltd., Kyunghoon JUNG of Suwon-si KR for samsung electronics co., ltd., Jonghun HA of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H05B6/06, H05B6/12
CPC Code(s): H05B6/062
Abstract: an induction heating apparatus with patterned heating coils includes a heating coil board including a vessel sensing coil configured to detect a cooking vessel, a plurality of heating coil pattern layers in which heating coils are printed and patterned, and at least two pre-impregnated material (prepreg) insulation layers positioned between two adjacent heating coil pattern layers to insulate and bond the plurality of heating coil pattern layers.
Inventor(s): Seungtaek OH of Suwon-si KR for samsung electronics co., ltd., Sunghwan Lim of Suwon-si KR for samsung electronics co., ltd., Hyunmoon Cho of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H05K5/03
CPC Code(s): H05K5/03
Abstract: according to an embodiment of the disclosure, an electronic device may comprise a first housing, a second housing configured to provide a motion relative to the first housing, a flexible display configured to transform in response to the motion of the second housing relative to the first housing, and a display protection layer disposed on one surface of the flexible display facing in a first direction. the display protection layer may include a glass layer including a first flat area having a first thickness and disposed on the first housing, a second flat area disposed on the second housing, and a folding area connecting the first flat area and the second flat area, and a coating layer disposed between the glass layer and the flexible display. the folding area of the glass layer may include a first area having a second thickness different from the first thickness and a second area connecting the first area and the flat area and having a third thickness smaller than the second thickness. the first area may protrude in a second direction opposite to the first direction as compared with the second area.
Inventor(s): Sangmin YE of Suwon-si KR for samsung electronics co., ltd., Byunggun CHOI of Suwon-si KR for samsung electronics co., ltd., Kwanhee HAN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H05K9/00, H04R1/02, H04R9/06
CPC Code(s): H05K9/0075
Abstract: a speaker module includes a speaker housing including a first speaker housing defining at least one first surface of the speaker module and a second speaker housing defining at least one second surface of the speaker module that is opposite to the least one first surface, a speaker assembly including a voice coil and a vibration member, the speaker assembly being accommodated in an interior of the speaker housing, a back volume in an interior of the speaker housing and defined by the first speaker housing and the second speaker housing, and a side surface shield member between an inner surface of the speaker assembly and the back volume, the side surface shield member including a ferrite-based magnetic substance, where at least one vent hole communicating the speaker assembly and the back volume is in the side surface shield member.
Inventor(s): Hyeonsong CHA of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/315
Abstract: a semiconductor device includes a lower structure including a conductive region. a capacitor is electrically connected to the conductive region of the lower structure. the capacitor includes first electrode structures, at least one support layer between the first electrode structures, a dielectric layer covering the first electrode structures and the at least one support layer, and a second electrode structure on the dielectric layer. a plate layer covers the capacitor. a polishing stop layer covers a side surface of the plate layer. a lower interlayer insulating layer covers the polishing stop layer. an upper interlayer insulating layer is on the lower interlayer insulating layer and the plate layer. the plate layer is disposed on the second electrode structure. an upper surface of the plate layer is in direct contact with the upper interlayer insulating layer.
20250098146. SEMICONDUCTOR DEVICES_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Hongjun Lee of Suwon-si KR for samsung electronics co., ltd., Kiseok Lee of Suwon-si KR for samsung electronics co., ltd., Huijung Kim of Suwon-si KR for samsung electronics co., ltd., Younggeun Song of Suwon-si KR for samsung electronics co., ltd., Yongjin Lee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/315
Abstract: a semiconductor device includes bit lines, channels, a first capping pattern, a gate insulation pattern, a gate electrode and capacitors. the bit lines are on a substrate, and each of the bit lines extends in a first direction. the bit lines are spaced apart from each other in a second direction. the channels are spaced apart from each other in the first direction. the first capping pattern is on a sidewall of each of the channels. the gate insulation pattern is on a sidewall of the first capping pattern. the gate electrode is on a sidewall of the gate insulation pattern. the capacitors are electrically connected to respective ones of the channels.
20250098147. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Sunghwan JANG of Suwon-si KR for samsung electronics co., ltd., Wonhee CHOI of Suwon-si KR for samsung electronics co., ltd., Jinbum KIM of Suwon-si KR for samsung electronics co., ltd., Daejin NAM of Suwon-si KR for samsung electronics co., ltd., Hyojin PARK of Suwon-si KR for samsung electronics co., ltd., Sunguk JANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/315
Abstract: a semiconductor device includes a substrate, a bit line extending in a first direction on the substrate, a first vertical channel pattern and a second vertical channel pattern on the bit line, a back gate electrode between the first vertical channel pattern and the second vertical channel pattern and extending in a second direction perpendicular to the first direction across the bit line, a first word line extending in the second direction from one side of the first vertical channel pattern, a second word line extending in the second direction from other side of the second vertical channel pattern, and a contact pattern connected to each of the first vertical channel pattern and the second vertical channel pattern. when viewed from a cross-sectional view, each of the first vertical channel pattern and the second vertical channel pattern have a trapezoidal shape with the long sides facing each other.
20250098153. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Taegyu Kang of Suwon-si KR for samsung electronics co., ltd., Joongchan Shin of Suwon-si KR for samsung electronics co., ltd., Keunui Kim of Suwon-si KR for samsung electronics co., ltd., Myeongseon Kim of Suwon-si KR for samsung electronics co., ltd., Eunsuk Jang of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/482
Abstract: a semiconductor device includes: a bit line on a substrate and extending in a first direction; a first word line on the bit line extending in a second direction crossing the first direction; a second word line extending in the second direction on the bit line and spaced from the first word line; first activating patterns on the bit line between the first and second word lines; second activating patterns on the bit line between the first and second word lines; a back gate electrode crossing the bit line and extending in the second direction between the first and second activating patterns; and first and second back gate capping patterns overlapping the back gate electrode. the first back gate capping pattern defines a gap region on the back gate electrode not overlapping the first and second activating patterns, and the second back gate capping pattern is in the gap region.
Inventor(s): Sanghyun SUNG of Suwon-si KR for samsung electronics co., ltd., Seokhan PARK of Suwon-si KR for samsung electronics co., ltd., Gyuhwan OH of Suwon-si KR for samsung electronics co., ltd., Bowon YOO of Suwon-si KR for samsung electronics co., ltd., Jinwoo HAN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/482
Abstract: a semiconductor device includes bit lines, which are apart from each other in a first direction and extend in a second direction that crosses the first direction, above a top surface of a substrate, comb-type insulating patterns arranged among the bit lines in the first direction and apart from each other in the second direction, line insulating layers apart from each other in the first direction, extending in the second direction, and covering the bit lines and portions of the comb-type insulating patterns from below, and a conductive line shield layer covering the line insulating layers and the other portions of the comb-type insulating patterns from below.
20250098155. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Minsung Kang of Suwon-si KR for samsung electronics co., ltd., Hyoungyol Mun of Suwon-si KR for samsung electronics co., ltd., Youngmin Lee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/50
Abstract: a semiconductor device includes lower electrodes on a substrate, a support pattern between the lower electrodes, an upper electrode on the lower electrodes and the support pattern, and a dielectric layer between the lower electrodes and the upper electrode, and between the support pattern and the upper electrode. the upper electrode includes a first portion on upper surfaces of the lower electrodes and a second portion on a sidewall of the support pattern. the first portion is thicker than the second portion.
Inventor(s): Kangmin Kim of Hwaseong-si KR for samsung electronics co., ltd., Kyeong Jin Park of Yongin-si KR for samsung electronics co., ltd., Seulji Lee of Seoul KR for samsung electronics co., ltd., Hyejin Lee of Yongin-si KR for samsung electronics co., ltd.
IPC Code(s): H10B43/27, G11C7/18, H01L23/522, H10B41/10, H10B41/27, H10B41/35, H10B41/41, H10B43/10, H10B43/35, H10B43/40
CPC Code(s): H10B43/27
Abstract: a method of fabricating a semiconductor device is provided. the method includes: forming a mold structure, in which sacrificial layers and insulating layers are alternately stacked, on a substrate; forming trenches to penetrate the mold structure; forming first sacrificial patterns in the trenches; forming a first supporting layer on the mold structure and the first sacrificial patterns; forming vertical structures to penetrate the first supporting layer and the mold structure; forming a second supporting layer on the first supporting layer and on the vertical structures; forming openings to penetrate the first and second supporting layers and to expose the first sacrificial patterns; removing the first sacrificial patterns through the openings; and replacing the sacrificial layers with electrodes.
Inventor(s): Kyunghun KIM of Suwon-si KR for samsung electronics co., ltd., Hoseok HEO of Suwon-si KR for samsung electronics co., ltd., Sunho KIM of Suwon-si KR for samsung electronics co., ltd., Seungyeul YANG of Suwon-si KR for samsung electronics co., ltd., Minhyun LEE of Suwon-si KR for samsung electronics co., ltd., Seokhoon CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B43/30, H10B43/27
CPC Code(s): H10B43/30
Abstract: a memory device includes: a channel layer; a gate electrode spaced apart from the channel layer; and a multilayer charge trap layer disposed between the channel layer and the gate electrode, wherein the multilayer charge trap layer includes silicon oxynitride, the silicon oxynitride including gallium or silicon nitride including gallium.
Inventor(s): Hak Seon KIM of Suwon-si KR for samsung electronics co., ltd., Kang Oh YUN of Suwon-si KR for samsung electronics co., ltd., Dong Jin LEE of Suwon-si KR for samsung electronics co., ltd., Jae Duk LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B43/40, H01L23/00, H01L25/065, H01L25/18, H10B43/27, H10B80/00
CPC Code(s): H10B43/40
Abstract: a semiconductor memory device includes a peripheral circuit structure; and a cell structure including a cell substrate and a gate electrode, on the peripheral circuit structure. the peripheral circuit structure includes a peripheral circuit board including a first surface facing the cell structure and a second surface opposite to the first surface, a first circuit element on the first surface of the peripheral circuit board, a first wiring line electrically connected to the first circuit element in a first interlayer insulating layer, a capacitor dielectric layer covering the second surface of the peripheral circuit board, a first capacitor electrode in the capacitor dielectric layer, a second capacitor electrode spaced apart from the first capacitor electrode in the capacitor dielectric layer, and a first connection via electrically connecting the first capacitor electrode with the first wiring line by passing through the peripheral circuit board.
20250098176. MAGNETIC MEMORY DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): KILHO LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B61/00
CPC Code(s): H10B61/00
Abstract: a magnetic memory device may include conductive lines provided in cell region and peripheral region, a first insulating layer provided in the cell region and the peripheral region, and surrounding the conductive lines, a second insulating layer provided on the first insulating layer in the cell region and the peripheral region, and on top surfaces of the conductive lines, and data storage patterns provided on the second insulating layer in the cell region and electrically connected to corresponding conductive lines of the conductive lines. the second insulating layer in the peripheral region may include first portions on the top surfaces of the conductive lines, and second portions disposed between the first portions. top surfaces of the first portions may be disposed at a level higher than top surfaces of the second portions.
Inventor(s): Ki Nam KIM of Suwon-si KR for samsung electronics co., ltd., Dae Won HA of Suwon-si KR for samsung electronics co., ltd., Dong Guk CHO of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B80/00, H01L23/00, H01L25/00, H01L25/065, H01L25/18
CPC Code(s): H10B80/00
Abstract: there is provided a semiconductor device manufactured using a method that reduces a manufacturing time and cost of the semiconductor device. the semiconductor device includes a first semiconductor device module including: a first lower bonding pad; a second lower bonding pad; first upper bonding pads; and a memory cell disposed at a height level higher than a height level of each of the first and second lower bonding pads and lower than a height level of the first upper bonding pads. the semiconductor device further comprises a second semiconductor device module including second bonding pads and a transistor electrically connected to at least one of the second bonding pads; and a third semiconductor device module including third bonding pads. the third pads are spaced apart from the first and second lower bonding pads in a first direction. the first lower bonding pad contacts at least one of the second bonding pads. at least one of the third bonding pads contacts at least one of the first upper bonding pads. the first semiconductor device module includes a bonding pad connection plug directly electrically connecting the first lower bonding pad and at least one of the first upper bonding pads to each other.
Inventor(s): Jinho Lee of Hwaseong-si KR for samsung electronics co., ltd., Younsoo Kim of Yongin-si KR for samsung electronics co., ltd., Haeryong Kim of Seongnam-si KR for samsung electronics co., ltd., Sunghyun Kim of Pyeongtaek-si KR for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10D1/692
Abstract: an integrated circuit (ic) device includes a lower electrode including a first metal, a dielectric film on the lower electrode, and a conductive interface layer between the lower electrode and the dielectric film. the conductive interface layer includes a metal oxide film including at least one metal element. an upper electrode including a second metal is opposite the lower electrode, with the conductive interface layer and the dielectric film therebetween. to manufacture an ic device, an electrode including a metal is formed adjacent to an insulating pattern on a substrate. a conductive interface layer including a metal oxide film including at least one metal element is selectively formed on a surface of the electrode. a dielectric film is formed to be in contact with the conductive interface layer and the insulating pattern.
Inventor(s): Junhyuk PARK of Pohang-si KR for samsung electronics co., ltd., Sunkyu HWANG of Seoul KR for samsung electronics co., ltd., Jongseob KIM of Seoul KR for samsung electronics co., ltd., Joonyong KIM of Seoul KR for samsung electronics co., ltd., Woochul JEON of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L29/778, H01L21/02, H01L23/29, H01L23/31, H01L29/20, H01L29/205, H01L29/66
CPC Code(s): H10D30/475
Abstract: the present disclosure provides a high electron mobility transistor including a channel layer; a barrier layer on the channel layer and configured to induce formation of a 2-dimensional electron gas (2deg) to the channel layer; a p-type semiconductor layer on the barrier layer; a first passivation layer on the barrier layer and including a quaternary material of al, ga, o, and n; a gate electrode on the p-type semiconductor layer; and a source electrode and a drain electrode provided on both sides of the barrier layer and separated from the gate electrode.
20250098224. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Yonghee Park of Hwaseong-si KR for samsung electronics co., ltd., Munhyeon Kim of Hwaseong-si KR for samsung electronics co., ltd., Uihui Kwon of Hwaseong-si KR for samsung electronics co., ltd., Joohyung You of Seoul KR for samsung electronics co., ltd., Daewon Ha of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L29/423, H01L27/088, H01L29/417, H01L29/786
CPC Code(s): H10D30/6735
Abstract: a semiconductor device includes active regions extending on a substrate in a first direction, gate structures intersecting the active regions and extending on the substrate in a second direction, source/drain regions in recess regions in which the active regions are recessed, on both sides of each of the gate structures, and contact plugs connected to the source/drain regions, wherein each of the source/drain regions include first and second epitaxial layers sequentially stacked on the active regions in the recess regions in a third direction perpendicular to an upper surface of the substrate, respectively, and wherein ratios of the first epitaxial layer thickness in the third direction to the second epitaxial layer thickness in the third direction are different in different ones of the source/drain regions.
20250098264. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Sangcheol NA of Suwon-si KR for samsung electronics co., ltd., Beomjin KIM of Suwon-si KR for samsung electronics co., ltd., Yoolim AHN of Suwon-si KR for samsung electronics co., ltd., Kyoungwoo LEE of Suwon-si KR for samsung electronics co., ltd., Minseung LEE of Suwon-si KR for samsung electronics co., ltd., Hyeryeong LEE of Suwon-si KR for samsung electronics co., ltd., Keun Hwi CHO of Suwon-si KR for samsung electronics co., ltd., Seungseok HA of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L29/417, H01L27/088, H01L29/06, H01L29/423, H01L29/775, H01L29/786
CPC Code(s): H10D64/254
Abstract: a semiconductor device includes an insulating layer including a first surface, a second surface, and an element isolation trench, an insulating pattern on the first surface of the insulating layer, an active pattern on the insulating pattern and including channel patterns, a source/drain pattern on at least one side of the active pattern, a lower wiring structure on the second surface of the insulating layer, and a through-via that extending in the insulating layer and connecting the source/drain pattern and the lower wiring structure, where the insulating pattern may include a first portion between the insulating layer and the active pattern, a second portion surrounding at least a portion of the through-via, and a third portion on a bottom surface of the element isolation trench.
20250098265. SEMICONDUCTOR DEVICES_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Dong Hoon Kwon of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L29/417, H01L23/528, H01L27/088, H01L29/06, H01L29/423, H01L29/775, H01L29/786
CPC Code(s): H10D64/254
Abstract: a semiconductor device may include a first substrate, a lower pattern on a first side of the first substrate, a plurality of sheet patterns on the lower pattern and spaced apart from each other in a first direction, a gate electrode which surrounds portions the plurality of sheet patterns, a source/drain pattern which is on one side of the gate electrode and connected to the plurality of sheet patterns, a power rail which is on a second side of the first substrate, a via pattern which extends through the first substrate in the first direction, and is connected to both the power rail and the source/drain pattern, a first dummy pattern on the via pattern, a second substrate on the first dummy pattern, and a second dummy pattern on a third side of the second substrate that faces the first side of the first substrate.
20250098269. INTEGRATED CIRCUIT DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jaehyun CHOI of Suwon-si KR for samsung electronics co., ltd., Dongsik KONG of Suwon-si KR for samsung electronics co., ltd., Jihye KWON of Suwon-si KR for samsung electronics co., ltd., Junsoo KIM of Suwon-si KR for samsung electronics co., ltd., Junbum LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L29/423, H01L29/78, H10B12/00
CPC Code(s): H10D64/513
Abstract: an integrated circuit device includes a substrate having formed therein a word line trench extending long in a first horizontal direction, a gate dielectric film covering an inner surface of the word line trench, a word line on the gate dielectric film, the word line filling a lower space of the word line trench and extending long in the first horizontal direction, an insulating capping pattern on the word line, the insulating capping pattern filling an upper space of the word line trench and extending long in the first horizontal direction, and at least one ferroelectric layer arranged at a top portion of the word line and including a first sidewall in contact with the gate dielectric film.
20250098278. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Byungho Moon of Suwon-si KR for samsung electronics co., ltd., Donghoon Hwang of Suwon-si KR for samsung electronics co., ltd., Hyojin Kim of Suwon-si KR for samsung electronics co., ltd., Kyunghee Cho of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L21/8238, H01L27/092, H01L29/06, H01L29/08, H01L29/423, H01L29/66, H01L29/775, H01L29/786
CPC Code(s): H10D84/038
Abstract: a semiconductor device includes a substrate, lower channel layers spaced apart from each other in a vertical direction perpendicular to an upper surface of the substrate and extending in the first direction, upper channel layers on the lower channel layers, respectively, and spaced apart from each other in the vertical direction, a middle dielectric isolation structure between an uppermost lower channel layer among the lower channel layers and a lowermost upper channel layer among the upper channel layers, a lower gate structure on the lower channel layers; an upper gate structure on the upper channel layers on the lower gate structure and extending in a second direction perpendicular to the first direction. a gate isolation insulating layer between the lower gate structure and the upper gate structure, in contact with a side surface of the middle dielectric isolation structure, and extending around the lower gate structure.
20250098291. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Ho-Jun KIM of Suwon-si KR for samsung electronics co., ltd., Hyungjin PARK of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L27/088, H01L21/8234
CPC Code(s): H10D84/834
Abstract: a semiconductor device including a substrate; gate structures spaced apart from each other on the substrate, each gate structure including a gate electrode and a gate capping pattern; source/drain patterns on opposite sides of the gate structures; first isolation patterns that respectively penetrate adjacent gate structures; and a second isolation pattern that extends between adjacent source/drain patterns, and penetrates at least one gate structure, wherein each first isolation pattern separates the gate structures such that the gate structures are spaced apart from each other, the first isolation patterns are aligned with each other, and top surfaces of the first and second isolation patterns are each located at a level the same as or higher than a level of a top surface of the gate capping pattern.
Inventor(s): Seung Seok HA of Suwon-si KR for samsung electronics co., ltd., Hyun Seung SONG of Suwon-si KR for samsung electronics co., ltd., Hyo Jin KIM of Suwon-si KR for samsung electronics co., ltd., Kyoung Mi PARK of Suwon-si KR for samsung electronics co., ltd., Guk Il AN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L27/088, H01L21/308, H01L21/8234, H01L29/66, H01L29/78
CPC Code(s): H10D84/834
Abstract: a semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.
Inventor(s): Kibum Nam of Suwon-si KR for samsung electronics co., ltd., Bonghyun Lee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L27/092, H01L27/02, H01L29/06, H01L29/423, H01L29/775, H01L29/78, H01L29/786
CPC Code(s): H10D84/856
Abstract: an integrated circuit comprising: a plurality of first gate electrodes extending in a second direction perpendicular to a first direction, wherein the plurality of first gate electrodes is in a first row that extends in the first direction; a first active pattern group comprising a plurality of first active patterns that extend in the first row in the first direction and intersecting the plurality of first gate electrodes; a plurality of second gate electrodes extending in the second direction in a second row that extends in the first direction; and a second active pattern group comprising a plurality of second active patterns extending in the second row in the first direction and intersecting the plurality of second gate electrodes, wherein ones of the plurality of first active patterns have different widths in the second direction, and the plurality of second active patterns have a first width in the second direction.
Inventor(s): Seungchan YUN of Waterford NY US for samsung electronics co., ltd., Myunghoon Jung of Clifton Park NM US for samsung electronics co., ltd., Kang-ill Seo of Springfield VA US for samsung electronics co., ltd.
IPC Code(s): H01L27/06, H01L21/8238, H01L23/528, H01L27/092, H01L29/06, H01L29/08, H01L29/423, H01L29/66, H01L29/775, H01L29/786
CPC Code(s): H10D88/00
Abstract: provided is a semiconductor device which includes: 1source/drain regions connected through a 1channel structure which is controlled by a 1gate structure; and a 2source/drain regions, respectively above the 1source/drain regions, connected through a 2channel structure which is controlled by a 2gate structure, wherein the 1channel structure and the 2channel structure comprise different materials.
Inventor(s): Hankyung Kim of Suwon-si KR for samsung electronics co., ltd., Hana Kim of Suwon-si KR for samsung electronics co., ltd., Seungkwon Lee of Suwon-si KR for samsung electronics co., ltd., Jiye Lee of Suwon-si KR for samsung electronics co., ltd., Yeonil Jung of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L27/02, H01L29/06, H01L29/423, H01L29/775, H01L29/78, H01L29/786
CPC Code(s): H10D89/10
Abstract: an integrated circuit includes devices arranged in a grid configuration and a first metal layer on the devices, wherein the grid includes first grid lines arranged in a first direction based on a first pitch and extending in a second direction, and second grid lines arranged in the second direction based on a second pitch and extending in the first direction. at least one of the plurality of devices includes gate lines extending in the second direction and having the first pitch, and the first metal layer includes first metal lines extending in the first direction and having the second pitch.
20250098345. IMAGE SENSOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Young Woo CHUNG of Suwon-si KR for samsung electronics co., ltd., Do Hoon KIM of Suwon-si KR for samsung electronics co., ltd., Sung-Jun KIM of Suwon-si KR for samsung electronics co., ltd., Han Seok KIM of Suwon-si KR for samsung electronics co., ltd., Jin Hyung ROH of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H10F39/80373
Abstract: an image sensor includes a substrate; a plurality of unit pixel regions in the substrate, each unit pixel region o including a floating diffusion region and a transfer gate electrode; and a microlens on the substrate. the transfer gate electrode includes a first connection part on a first surface of the substrate and a first extending part connected to the first connection part and extending from the first surface into the substrate. a third surface of the first extending part has a first angle with respect to the first surface of the substrate and a fourth surface of the first extending part has a second angle with respect to the first surface of the substrate. the fourth surface, the third surface, and the floating diffusion region are sequentially disposed in a direction parallel to the first surface of the substrate, and the first angle is greater than the second angle.
20250098349. IMAGE SENSORS HAVING GRID STRUCTURE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Wonchun YANG of Suwon-si KR for samsung electronics co., ltd., Jaekwan Seo of Suwon-si KR for samsung electronics co., ltd., Kwonseok Kim of Suwon-si KR for samsung electronics co., ltd., Ryunhwa Lee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H10F39/8053
Abstract: an image sensor may include photoelectric conversion elements within a substrate, a separation structure within the substrate and between the photoelectric conversion elements, an insulating structure on the substrate and the separation structure, a plurality of color filters on the insulating structure, a grid structure including a lower horizontal structure disposed on the insulating structure and a vertical structure connected to the lower horizontal structure and covering a side surface of one of the plurality of color filters, upper horizontal structures covering upper surfaces of the plurality of color filters, and a capping layer covering the upper horizontal structures and the grid structure. the grid structure may further include an air gap surrounded by the vertical structure, the lower horizontal structure, and the capping layer.
Inventor(s): Sang-Su PARK of Seoul KR for samsung electronics co., ltd., Kwansik KIM of Seoul KR for samsung electronics co., ltd., Changhwa KIM of Hwaseong-si KR for samsung electronics co., ltd., Taemin KIM of Hwaseong-si KR for samsung electronics co., ltd., Gyuhyun LIM of Suwon-s KR for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H10F39/807
Abstract: an image sensor includes a substrate including a first surface and a second surface which is opposite to the first portion, and a pixel isolation portion provided in the substrate and configured to isolate unit pixels from each other. the pixel isolation portion includes a first filling insulation pattern extending from the first surface toward the second surface and having an air gap region, the first filling insulation pattern including a first sidewall and a second sidewall which is opposite to the first sidewall, a conductive structure including a first portion on the first sidewall, a second portion on the second sidewall, and a connection portion connecting the first portion and the second portion, and an insulating liner provided between the first portion and the substrate and between the second portion and the substrate.
Inventor(s): Weizhong ZHOU of Suzhou CN for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H10F39/811
Abstract: a chip package structure and a method of manufacturing the same are provided. the chip package structure includes a substrate; a chip spaced from the substrate and having a first surface, a second surface and a side surface, the first surface of the chip including a photosensitive area and a non-photosensitive area surrounding the photosensitive area; a molding layer having a first surface and a second surface, the molding layer provided on the non-photosensitive area of the chip and the side surface of the chip.
Inventor(s): Kihyung KANG of Suwon-si KR for samsung electronics co., ltd., Kimura SHUNSUKE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L33/50, H01L25/075, H01L33/60, H01L33/62
CPC Code(s): H10H20/8512
Abstract: a display module may include a substrate and an inorganic light emitting diode on the substrate. the inorganic light emitting diode includes: an active layer configured to generate light having a first color; a light emitting surface spaced apart from the active layer; a groove part including grooves recessed in the light emitting surface; and a quantum dot (qd) layer in the groove part and configured to convert the light having the first color generated in the active layer into a second color. the display module may further include a color filter corresponding to the inorganic light emitting diode and configured to absorb the light having the first color emitted from the inorganic light emitting diode.
Inventor(s): Joonseok KIM of Suwon-si KR for samsung electronics co., ltd., Joonyun KIM of Suwon-si KR for samsung electronics co., ltd., Huije RYU of Suwon-si KR for samsung electronics co., ltd., Chang Seok LEE of Suwon-si KR for samsung electronics co., ltd., Luhing HU of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L27/15, H01L25/075, H01L25/16, H01L27/12, H01L33/62
CPC Code(s): H10H29/142
Abstract: a panel includes: a substrate, unit pixels arranged repeatedly on the substrate, and unit pixel circuits including a unit pixel circuit repeatedly arranged on the substrate and electrically connected to a unit pixel. each unit pixel includes a red sub-pixel including a red optoelectronic element configured to display red color or detect red light, a green sub-pixel including a green optoelectronic element configured to display green color or detect green light, and a blue sub-pixel including a blue optoelectronic element configured to display blue color or detect blue light. each unit pixel circuit includes a red pixel circuit electrically connected to the red optoelectronic element, a green pixel circuit electrically connected to the green optoelectronic element, and a blue pixel circuit electrically connected to the blue optoelectronic element. the red pixel circuit, the green pixel circuit, and the blue pixel circuit are stacked along a thickness direction of the substrate.
Inventor(s): Hajun SUNG of Suwon-si KR for samsung electronics co., ltd., Minwoo CHOI of Suwon-si KR for samsung electronics co., ltd., Youngjae KANG of Suwon-si KR for samsung electronics co., ltd., Kiyeon YANG of Suwon-si KR for samsung electronics co., ltd., Changseung LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10N70/00, G11C13/00, H10B63/00
CPC Code(s): H10N70/8828
Abstract: a chalcogenide-based memory material may include a ternary semiconductor compound having a composition represented by xy′se, wherein the chalcogenide-based memory material may have an ovonic threshold-switching (ots) characteristic, and a threshold voltage of the chalcogenide-based memory material may change according to a polarity and an intensity of an applied voltage. in xy′se, x≠y, a+b+c=1, a>0.12, b>0.18, c≥0.4, and x and y′ independently may be different ones of in, sb, ga, sn, al, ge, si, and p. a memory device may include the chalcogenide-based memory material. an electronic apparatus may include the memory device.
Samsung Electronics Co., Ltd. patent applications on March 20th, 2025
- Samsung Electronics Co., Ltd.
- A44C9/00
- CPC A44C9/0053
- Samsung electronics co., ltd.
- A47J27/21
- H05B6/06
- H05B6/12
- CPC A47J27/21158
- A47L15/42
- B01D29/03
- B01D29/31
- B01D29/56
- CPC A47L15/4206
- A61B5/021
- A61B5/00
- A61B5/024
- A61B5/318
- CPC A61B5/02125
- A61M21/02
- A61M21/00
- G16H40/63
- CPC A61M21/02
- B08B1/30
- B08B1/10
- B24D11/00
- H01L23/00
- CPC B08B1/30
- B08B7/00
- H01L21/67
- CPC B08B7/0021
- B25J9/16
- B25J11/00
- B25J19/02
- CPC B25J9/163
- B25J13/08
- G06F3/041
- G06F3/043
- CPC B25J13/084
- C09D11/50
- B82Y20/00
- B82Y40/00
- C09D11/037
- C09D11/107
- C09D11/52
- C09K11/02
- C09K11/62
- G02F1/13357
- H01L33/50
- H10K59/38
- CPC C09D11/50
- C23C16/46
- C23C16/44
- C23C16/455
- C23C16/48
- C23C16/52
- H01L21/02
- CPC C23C16/46
- D06F29/00
- D06F33/32
- D06F34/26
- CPC D06F29/005
- D06F33/40
- D06F103/46
- D06F105/46
- CPC D06F33/40
- D06F34/10
- D06F34/05
- D06F34/08
- D06F34/28
- H02P3/14
- CPC D06F34/10
- F04B39/02
- F04B35/04
- CPC F04B39/0246
- F24C7/08
- F24C3/12
- CPC F24C7/082
- F24F1/24
- F24F13/02
- F24F13/20
- CPC F24F1/24
- F24F8/22
- A61L9/20
- CPC F24F8/22
- F24F8/10
- CPC F24F13/20
- G01D3/036
- H05B1/02
- CPC G01D3/036
- G01N21/33
- G01N21/17
- G01N21/27
- G01N21/47
- CPC G01N21/33
- G01R31/28
- H01L23/538
- H01L25/065
- CPC G01R31/2884
- G02B5/26
- CPC G02B5/26
- G02B6/42
- H01L23/13
- H01L23/48
- H01L23/498
- H01L25/16
- H01L27/144
- CPC G02B6/4231
- G02B27/00
- G02B5/30
- G02B27/28
- CPC G02B27/0093
- G02B27/01
- G02B5/12
- CPC G02B27/0101
- G02F1/1333
- CPC G02F1/13332
- G02F1/1335
- CPC G02F1/133608
- G03F1/24
- G03F7/00
- CPC G03F1/24
- G03F7/004
- C07F7/22
- CPC G03F7/0042
- G03F7/40
- G06F30/20
- CPC G03F7/705
- G06F1/16
- E05D5/14
- CPC G06F1/1681
- G06F1/20
- G05B11/42
- G06F1/08
- G06F11/30
- CPC G06F1/206
- G06F3/01
- G06T7/246
- G06T7/73
- G06V40/18
- CPC G06F3/013
- G06F3/0338
- G06F3/023
- G06F3/0482
- G06F3/04842
- G06F3/04895
- H04N21/422
- CPC G06F3/0338
- G06F3/042
- H04N23/20
- H04N23/56
- H04N23/71
- H04N23/76
- H04N25/61
- CPC G06F3/0418
- G06F3/02
- CPC G06F3/042
- G06F3/0483
- G06F3/04845
- G06F3/0486
- G06F9/451
- CPC G06F3/0483
- G06F3/0485
- G06F3/0481
- CPC G06F3/0485
- G06F3/06
- CPC G06F3/061
- CPC G06F3/0611
- CPC G06F3/0619
- CPC G06F3/0631
- CPC G06F3/0652
- G06F12/02
- CPC G06F3/0655
- CPC G06F3/0659
- G06F7/523
- G06N3/063
- G06F3/14
- CPC G06F3/1446
- G06F7/544
- H03K3/037
- H03K21/08
- CPC G06F7/5443
- G06F11/10
- G06F1/30
- G06F13/40
- CPC G06F11/108
- CPC G06F12/0246
- G06F12/08
- CPC G06F12/08
- G06F12/0802
- CPC G06F12/0802
- G06F13/28
- G06F13/00
- G06F13/42
- CPC G06F13/287
- CPC G06F13/4022
- G06F16/22
- G06Q50/43
- CPC G06F16/2282
- G06F16/483
- G06F40/279
- CPC G06F16/483
- G06F21/56
- CPC G06F21/566
- G06F21/79
- G06F21/31
- G06F21/60
- CPC G06F21/79
- G06F30/392
- G06F30/398
- G06F119/18
- CPC G06F30/392
- G06F40/284
- CPC G06F40/284
- G06N3/084
- CPC G06N3/084
- G06N3/096
- CPC G06N3/096
- G06Q10/1093
- G06Q10/109
- CPC G06Q10/1097
- G06T5/50
- G06T3/4015
- G06V10/25
- CPC G06T5/50
- G06T5/70
- G06T5/60
- G06V10/40
- CPC G06T5/70
- G06T19/00
- CPC G06T19/006
- G06T19/20
- G06T7/194
- G06T15/60
- CPC G06T19/20
- G06V10/26
- G06V10/24
- G06V10/44
- G06V10/54
- G06V10/764
- G06V10/80
- G06V10/82
- CPC G06V10/26
- G09G3/20
- G06T7/90
- CPC G09G3/2003
- G11C19/28
- CPC G09G3/2096
- G10L15/06
- G10L15/18
- G10L15/183
- CPC G10L15/063
- G10L15/22
- G10L15/08
- CPC G10L15/22
- G10L15/26
- G16Y20/20
- CPC G10L15/26
- G10L21/0208
- G10L21/0216
- CPC G10L21/0208
- G11C13/00
- CPC G11C13/0069
- G11C15/04
- CPC G11C15/04
- G11C16/10
- G11C16/04
- G11C16/08
- G11C16/16
- CPC G11C16/102
- G11C16/32
- G11C16/26
- H03K5/156
- CPC G11C16/32
- G11C29/02
- G11C16/34
- G11C11/54
- CPC G11C16/3459
- G11C17/18
- G11C17/16
- H03K19/0185
- CPC G11C17/18
- H01J37/317
- H01J37/08
- H01L21/265
- CPC H01J37/3171
- H01J37/32
- CPC H01J37/32972
- H01L21/306
- H01L21/687
- CPC H01L21/30625
- H01L21/673
- CPC H01L21/67363
- H01L21/66
- CPC H01L22/32
- H01L23/367
- H01L23/522
- H01L25/04
- CPC H01L23/367
- H01L21/48
- H01L21/56
- H01L23/373
- H01L25/18
- H05K1/18
- H10B80/00
- CPC H01L23/3677
- H01L23/495
- CPC H01L23/49572
- H01L23/31
- CPC H01L23/49816
- H01L25/00
- CPC H01L23/49838
- H01L23/528
- H01L27/088
- H01L29/06
- H01L29/08
- H01L29/417
- H01L29/423
- H01L29/775
- H01L29/786
- CPC H01L23/5283
- H01L27/092
- H01L29/78
- H01L21/768
- H10B41/20
- H10B41/27
- H10B43/10
- H10B43/20
- H10B43/27
- H10B43/35
- H10B43/50
- CPC H01L23/5286
- H01L23/535
- H10B12/00
- CPC H01L23/535
- H01L23/544
- CPC H01L23/544
- CPC H01L23/562
- H01L21/683
- H01L21/78
- CPC H01L24/16
- H01L23/49
- H01L23/552
- H01L25/10
- CPC H01L24/20
- CPC H01L24/29
- H05K1/02
- CPC H01L24/32
- CPC H01L25/0657
- CPC H01L25/105
- CPC H01L25/16
- CPC H01L25/167
- CPC H01L25/18
- H01M4/62
- H01M4/02
- H01M4/36
- H01M10/058
- CPC H01M4/628
- H01Q21/06
- H01Q15/00
- CPC H01Q21/065
- H01Q21/30
- H01Q1/24
- CPC H01Q21/30
- H02J7/00
- H01M10/44
- H01M10/46
- CPC H02J7/00302
- H03K17/0412
- H02M1/08
- H02M3/158
- H03K17/16
- CPC H03K17/04123
- H03K17/687
- H01L27/02
- CPC H03K17/6871
- H03L7/097
- H03L7/081
- H03L7/093
- CPC H03L7/097
- H03M1/12
- CPC H03M1/121
- H04B1/04
- CPC H04B1/04
- H04B7/0408
- G01S13/42
- H04W76/00
- CPC H04B7/0408
- H04B7/06
- H04L5/00
- H04W24/10
- H04W72/044
- CPC H04B7/06966
- H04L1/1607
- H04L1/00
- CPC H04L1/1607
- H04W72/231
- H04W72/51
- CPC H04L5/0053
- H04L1/1812
- CPC H04L5/0055
- H04W72/1263
- CPC H04L5/0092
- H04L41/082
- H04L41/342
- H04L41/40
- CPC H04L41/082
- H04M1/02
- CPC H04M1/0283
- H04N19/513
- H04N19/105
- H04N19/139
- H04N19/159
- H04N19/176
- CPC H04N19/513
- H04N21/41
- CPC H04N21/42204
- H04N25/531
- H01L27/146
- H04N25/533
- H04N25/75
- CPC H04N25/531
- H04N25/532
- H04N25/766
- CPC H04N25/532
- H04N25/704
- H04N25/11
- H04N25/77
- CPC H04N25/704
- H04N25/76
- H04N25/707
- CPC H04N25/76
- H04R3/00
- H04R1/02
- H04R1/40
- H04R3/02
- CPC H04R3/005
- H04W4/06
- H04W28/02
- CPC H04W4/06
- H04W8/00
- H04L12/28
- H04W4/80
- H04W76/14
- CPC H04W8/005
- H04W8/18
- H04W12/40
- H04W48/00
- H04W60/00
- CPC H04W8/183
- H03M13/11
- H03M13/39
- H04W8/20
- H04W88/06
- H04W12/06
- H04L67/02
- CPC H04W12/06
- H04W36/00
- H04W36/08
- H04W76/30
- CPC H04W36/0058
- H04W40/02
- H04W40/24
- H04W48/16
- H04W60/04
- CPC H04W40/02
- H04L45/302
- CPC H04W48/16
- H04W56/00
- H04W84/18
- H04W52/02
- CPC H04W52/0222
- CPC H04W52/0229
- H04W52/28
- H04B17/27
- H04W4/30
- CPC H04W52/285
- H04W52/34
- H04W52/24
- H04W52/36
- H04W72/25
- CPC H04W52/34
- H04W64/00
- CPC H04W56/0015
- H04W76/28
- CPC H04W64/00
- H04W72/0446
- CPC H04W72/0446
- H04W72/1273
- H04W72/20
- CPC H04W72/1273
- CPC H04W72/25
- H04W72/30
- H04W76/27
- CPC H04W72/30
- H04W74/0833
- CPC H04W74/0833
- H04W76/10
- H04W24/02
- CPC H04W76/10
- H04W76/11
- H04W72/23
- CPC H04W76/11
- H04W76/20
- H04W84/06
- CPC H04W76/20
- CPC H05B6/062
- H05K5/03
- CPC H05K5/03
- H05K9/00
- H04R9/06
- CPC H05K9/0075
- CPC H10B12/315
- CPC H10B12/482
- CPC H10B12/50
- G11C7/18
- H10B41/10
- H10B41/35
- H10B41/41
- H10B43/40
- CPC H10B43/27
- H10B43/30
- CPC H10B43/30
- CPC H10B43/40
- H10B61/00
- CPC H10B61/00
- CPC H10B80/00
- CPC H10D1/692
- H01L29/778
- H01L23/29
- H01L29/20
- H01L29/205
- H01L29/66
- CPC H10D30/475
- CPC H10D30/6735
- CPC H10D64/254
- CPC H10D64/513
- H01L21/8238
- CPC H10D84/038
- H01L21/8234
- CPC H10D84/834
- H01L21/308
- CPC H10D84/856
- H01L27/06
- CPC H10D88/00
- CPC H10D89/10
- CPC H10F39/80373
- CPC H10F39/8053
- CPC H10F39/807
- CPC H10F39/811
- H01L25/075
- H01L33/60
- H01L33/62
- CPC H10H20/8512
- H01L27/15
- H01L27/12
- CPC H10H29/142
- H10N70/00
- H10B63/00
- CPC H10N70/8828
