Samsung Electronics Co., Ltd. patent applications on December 19th, 2024
Patent Applications by Samsung Electronics Co., Ltd. on December 19th, 2024
Samsung Electronics Co., Ltd.: 176 patent applications
Samsung Electronics Co., Ltd. has applied for patents in the areas of H01L23/00 (19), H01L25/065 (16), H01L29/06 (12), H01L23/31 (11), H01L23/498 (10) H01L23/49822 (3), H01L23/5283 (3), H01L29/0673 (3), H05K5/0217 (3), H01L25/0655 (2)
With keywords such as: device, layer, structure, semiconductor, substrate, including, pattern, direction, configured, and based in patent application abstracts.
Patent Applications by Samsung Electronics Co., Ltd.
Inventor(s): Hyeongjun KIM of Suwon-si (KR) for samsung electronics co., ltd., Minji KIM of Suwon-si (KR) for samsung electronics co., ltd., Seungjoon HWANG of Suwon-si (KR) for samsung electronics co., ltd., Daehyung KIM of Suwon-si (KR) for samsung electronics co., ltd., Yongseok KIM of Suwon-si (KR) for samsung electronics co., ltd., Kyungjin OH of Suwon-si (KR) for samsung electronics co., ltd., Jaeshik JEONG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): A47L9/28, A47L9/00, G01K7/22, G01R15/04, G01R19/165, G01R19/22, H02H5/04
CPC Code(s): A47L9/2889
Abstract: a cordless vacuum cleaner includes a cleaner main body and a station. the cleaner main body includes a battery and a first processor controlling performing a cleaning function using power of the battery. the station includes a power conversion device to generate a voltage to charge the battery of the cleaner main body, a second charge terminal to charge the battery of the cleaner main body with the voltage generated by the power conversion device, a temperature sensor installed within a distance from the second charge terminal and to detect a temperature of the second charge terminal, a divider resistor to provide a voltage by dividing of an input voltage with the temperature sensor, and a second processor controlling performing an overheating prevention operation based on a voltage level of the voltage provided by the divider resistor and the temperature sensor being greater than a threshold voltage level.
Inventor(s): Minho PARK of Suwon-si (KR) for samsung electronics co., ltd., Younghyun KIM of Suwon-si (KR) for samsung electronics co., ltd., Joongwoo AHN of Suwon-si (KR) for samsung electronics co., ltd., Jeahyuck LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): A61B5/1455, A61B5/00, A61B5/145, G04G21/02, H01S5/00, H01S5/125
CPC Code(s): A61B5/1455
Abstract: an electronic device is provided. the electronic device includes a transmission circuit, a reception circuit, memory storing one or more computer programs, and one or more processors communicatively coupled to the transmission circuit, the reception circuit, and the memory, wherein the transmission circuit includes a laser gain circuit configured to output or generate a plurality of laser lights in a broadband under control of the one or more processors, a fixed array distributed bragg reflector (dbr) grating configured to change wavelengths of the plurality of laser lights and output a plurality of laser lights having specified wavelengths, a modulator configured to modulate the plurality of laser lights having the specified wavelengths, a monitoring circuit configured to identify whether or not the plurality of modulated laser lights is output in a specified intensity and specified wavelength, and an output coupler configured to adjust output directions and/or angles of the plurality of modulated laser lights and output the plurality of modulated laser lights to an outside of the electronic device.
Inventor(s): Kazuo UDAGAWA of Yokohama-shi (JP) for samsung electronics co., ltd., Atsushi SATO of Yokohama-shi (JP) for samsung electronics co., ltd., Injo JEONG of Suwon-si (KR) for samsung electronics co., ltd., Jongseok YOON of Suwon-si (KR) for samsung electronics co., ltd., Taehoon LEE of Suwon-si (KR) for samsung electronics co., ltd., Yoshihiro YOKOTE of Yokohama-shi (JP) for samsung electronics co., ltd.
IPC Code(s): A61B5/263, A61B5/256, H01B5/14
CPC Code(s): A61B5/263
Abstract: a transparent electrode disposed on the insulating substrate, the conductive layer including at least one of a metal layer or a metal oxide layer, a transparent electrode layer including sno2 as a main component; and a current collector on at least a portion of a side surface of the transparent electrode layer, the current collector being electrically connected to the transparent electrode layer and the conductive layer.
Inventor(s): Kijung KIM of Suwon-si (KR) for samsung electronics co., ltd., Junghyun KANG of Suwon-si (KR) for samsung electronics co., ltd., Hyuksu KIM of Suwon-si (KR) for samsung electronics co., ltd., Minho PARK of Suwon-si (KR) for samsung electronics co., ltd., June LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): A61B5/00, A61B5/0205, A61B5/145, A61B5/1455
CPC Code(s): A61B5/681
Abstract: a wearable electronic device including a plurality of biosensors is disclosed. the wearable electronic device according to various embodiments disclosed in the disclosure may include: a first biosensor configured to measure a first bio signal of a user; a first substrate including a second biosensor configured to measure a second bio signal of the user; and a second substrate disposed in a second direction being opposite to the first direction with respect to the first substrate, wherein the first biosensor includes: a light transmitter disposed on the second substrate and configured to transmit a first optical signal with respect to the user's body; a light receiver disposed on the first substrate and configured to receive a second optical signal generated through an interaction of the first optical signal with the user's body; and a controller configured to calculate the first bio signal of the user from the second optical signal received by the light receiver. other various embodiments may be possible.
Inventor(s): Seungil HAN of Suwon-si (KR) for samsung electronics co., ltd., Seokjae LEE of Suwon-si (KR) for samsung electronics co., ltd., Kyunghun JANG of Suwon-si (KR) for samsung electronics co., ltd., Sungcheol KIM of Suwon-si (KR) for samsung electronics co., ltd., Sukhoon SONG of Suwon-si (KR) for samsung electronics co., ltd., Sangsik YOON of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): A61H3/00
CPC Code(s): A61H3/00
Abstract: a wearable device, to be worn on a body of a user, may include a driving module configured to generate a torque, an angle sensor configured to obtain at least one angular acceleration value by sensing a motion of a joint of the user, and a processor(s) configured to control the driving module to generate the torque, receive the obtained at least one angular acceleration value from the angle sensor, determine whether a degradation of the driving module occurs at a predetermined level or higher based on the received at least one angular acceleration value, and control to provide a notification about the degradation to the user in response to the determination that the degradation occurs at the predetermined level or higher.
Inventor(s): Joonyoung JUNG of Suwon-si (KR) for samsung electronics co., ltd., Chiyul YOON of Suwon-si (KR) for samsung electronics co., ltd., Sanghun KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): A63B24/00
CPC Code(s): A63B24/0021
Abstract: a method of determining an arm posture of a user may include determining a distance from a first part of a body of the user to a second part of a lower arm of the user based on length information of a cable generated by a first sensor arranged on at least a part of the body of the user, determining a first rotation angle of the lower arm in a three-dimensional space based on rotation information generated by a second sensor attached to the second part, determining a second rotation angle of an upper arm in the three-dimensional space based on the distance from the first part to the second part and the first rotation angle of the lower arm, determining a position of the upper arm and a position of the lower arm in the three-dimensional space based on the first rotation angle of the lower arm and the second rotation angle of the upper arm; and determining the arm posture based on the position of the upper arm and the position of the lower arm.
20240416529. ROBOT BLADE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Kyunghoon Joo of Suwon-si (KR) for samsung electronics co., ltd., Sunghyup Kim of Suwon-si (KR) for samsung electronics co., ltd., Kiho Lee of Suwon-si (KR) for samsung electronics co., ltd., Sanghoon Lee of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): B25J15/00, H01L21/687
CPC Code(s): B25J15/0019
Abstract: a robot blade may include a blade body and a frequency variator. the blade body may include a frequency variation groove. the frequency variator may be detachably arranged in the frequency variation groove to vary a frequency of the blade body. thus, the robot blade may have a changed shape by removing at least one frequency variation block included in the frequency variator. therefore, the robot blade having the changed shape may have a frequency different from a frequency of a part in semiconductor fabrication equipment to prevent a resonance. as a result, a vibration of the robot blade may be suppressed to prevent damage to a semiconductor substrate.
Inventor(s): Jongha YUN of Suwon-si (KR) for samsung electronics co., ltd., Seyoon KIM of Hwaseong-si (KR) for samsung electronics co., ltd., Juhui PARK of Hwaseong-si (KR) for samsung electronics co., ltd., Jiyeon LEE of Hwaseong-si (KR) for samsung electronics co., ltd., Cheolmin SHIN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): C02F9/00, B01D15/36, B01D61/02, B01D61/08, B01D61/14, B01D63/02, B08B3/02, B08B3/14, B08B13/00, C02F1/28, C02F1/42, C02F1/44, C02F103/04, C02F103/34, H01L21/67
CPC Code(s): C02F9/00
Abstract: ultrapure water supply apparatuses, substrate processing systems, and substrate processing methods are provided. an ultrapure water supply apparatus includes: a first supply device that produces first ultrapure water; a second supply device that produces second ultrapure water; a first reserved supply device that provides the second supply device with a portion of fluid in the first supply device; and a second reserved supply device that provides the first supply device with a portion of fluid in the second supply device. the first supply device includes a first front-side filtering part, a first rear-side filtering part, and a first connection part. the second supply device includes a second front-side filtering part, a second rear-side filtering part, and a second connection part. each of the first and second reserved supply devices connects the first connection part and the second connection part to each other.
Inventor(s): Woosung Jeon of Suwon-si (KR) for samsung electronics co., ltd., Yongtae Park of Suwon-si (KR) for samsung electronics co., ltd., Doyoon Kim of Suwon-si (KR) for samsung electronics co., ltd., Jaehoon Ryu of Suwon-si (KR) for samsung electronics co., ltd., Sunjae Jang of Suwon-si (KR) for samsung electronics co., ltd., Sungsik Jo of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): C09G1/02
CPC Code(s): C09G1/02
Abstract: provided is a slurry composition for chemical mechanical polishing (cmp) including an organic abrasive material that includes a supramolecular compound (e.g., supramolecular assembly), an analog thereof, or a derivative thereof. the slurry composition for chemical mechanical polishing may reduce or prevent cmp-induced defects, thereby reducing or suppressing product defects with a higher polishing selectivity.
20240417905. DRYER AND OPERATION METHOD THEREOF_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Hyungseon SONG of Suwon-si (KR) for samsung electronics co., ltd., Kyungjae KIM of Suwon-si (KR) for samsung electronics co., ltd., Jooyoo KIM of Suwon-si (KR) for samsung electronics co., ltd., Jongyoub RYU of Suwon-si, (KR) for samsung electronics co., ltd., Dongjun SHIN of Suwon-si, (KR) for samsung electronics co., ltd., Yoonhee CHOI of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): D06F34/18, D06F34/04, D06F58/38, D06F58/46
CPC Code(s): D06F34/18
Abstract: provided are an operation method of a dryer, and a dryer performing the operation method. the operation method includes detecting, by using one or more sensors, first laundry that is loaded into the dryer; obtaining data related to a washing process with respect to second laundry that was loaded into the washing machine before the first laundry is loaded into the dryer; determining whether the first laundry corresponds to the second laundry, based on data related to the washing process with respect to the second laundry; based on determining that the first laundry corresponds to the second laundry, determining a weight of the second laundry before washing as a first target dry weight; and outputting information about a drying state of the first laundry, based on at least one of a drying time period set in the dryer and whether the weight of the first laundry reaches the first target dry weight.
20240417911. CLOTHES TREATING APPARATUS_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jaewan HONG of Suwon-si (KR) for samsung electronics co., ltd., Dongpil SEO of Suwon-si (KR) for samsung electronics co., ltd., Taehyun SUNG of Suwon-si (KR) for samsung electronics co., ltd., Kanghyun LEE of Suwon-si (KR) for samsung electronics co., ltd., Jaebok LEE of Suwon-si (KR) for samsung electronics co., ltd., Youngjin CHO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): D06F39/10, D06F37/20, D06F39/08, D06F39/12
CPC Code(s): D06F39/10
Abstract: a clothes treating apparatus includes a housing, a tub inside the housing, a drainage device configured to discharge water from the tub to an outside of the housing; a filter device configured to be disposed outside the housing and connected to the drainage device to receive water discharged by the drainage device and filter out foreign substances from the received water, the filter device including a coupler on a bottom of the filter device; and an installation device configured to mount the filter device to a surface, the installation device including a supporter, and the supporter including a supporter mounting portion, wherein the installation device is configured so that the supporter is seatable to the surface, and the supporter mounting portion is couplable to the coupler so that, while the supporter is seated to the surface and the supporter mounting portion is coupled to the coupler, the filter device is mounted to the surface.
Inventor(s): Jejin LEE of Suwon-si (KR) for samsung electronics co., ltd., Kwangsik HAN of Suwon-si (KR) for samsung electronics co., ltd., Yubi KANG of Suwon-si (KR) for samsung electronics co., ltd., Sangho YOO of Suwon-si (KR) for samsung electronics co., ltd., Yonghee JANG of Suwon-si (KR) for samsung electronics co., ltd., Dongil JUNG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): F24F11/42
CPC Code(s): F24F11/42
Abstract: the present disclosure relates to an air conditioner including an outdoor unit and an indoor unit connected to the outdoor unit, wherein the outdoor unit includes: a compressor configured to compress a refrigerant, an outdoor heat exchanger configured to perform heat exchange between outdoor air and the refrigerant, a humidity sensor provided inside the outdoor unit and configured to measure a relative humidity inside the outdoor unit, an outdoor temperature sensor configured to measure an outdoor temperature, and a controller, comprising circuitry, configured to: determine an absolute humidity based on output of the humidity sensor, determine an outdoor relative humidity based on the absolute humidity and the outdoor temperature, determine a dew point temperature of the outdoor air based on the outdoor relative humidity and the outdoor temperature, and determine whether to perform a defrosting operation by comparing the dew point temperature and a temperature of the outdoor heat exchanger.
Inventor(s): Boeun JANG of Suwon-si (KR) for samsung electronics co., ltd., Daesung KANG of Suwon-si (KR) for samsung electronics co., ltd., Sooam KIM of Suwon-si (KR) for samsung electronics co., ltd., Sangho PARK of Suwon-si (KR) for samsung electronics co., ltd., Buyeong KWAK of Suwon-si (KR) for samsung electronics co., ltd., Seunggu JI of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G01D5/24, E05B65/00, E05F15/611
CPC Code(s): G01D5/24
Abstract: an electronic device including a main body having an opening, a door configured to open and close at least a part of the opening of the main body, and a door sensor, provided relative to an open-side edge of the door, to detect a touch input by using a capacitive method. the door sensor includes a touch key configured to receive the touch input, a sensor substrate comprising a conductive land; a connection member including a sensing surface contacting the touch key, and a connection surface contacting the conductive land so that the touch key is electrically connected with the conductive land through the connection member. surfaces of the connection member along a thickness direction including the sensing surface and the connection surface and surfaces of the connection member along a longitudinal direction are electrically conductive surfaces. surfaces of the connection member along a width direction are electrically non-conductive surfaces.
20240418645. SEMICONDUCTOR MEASUREMENT APPARATUS_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Hojun Lee of Suwon-si (KR) for samsung electronics co., ltd., Jangwoon Sung of Suwon-si (KR) for samsung electronics co., ltd., Wookrae Kim of Suwon-si (KR) for samsung electronics co., ltd., Hyungjin Kim of Suwon-si (KR) for samsung electronics co., ltd., Seungbeom Park of Suwon-si (KR) for samsung electronics co., ltd., Junho Shin of Suwon-si (KR) for samsung electronics co., ltd., Myungjun Lee of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G01N21/47, H01L21/66, G01N21/17
CPC Code(s): G01N21/4788
Abstract: an example semiconductor measurement apparatus includes a light source, a pattern generator, a stage, an image sensor, and a controller. the light source is configured to output light in a predetermined wavelength band. the pattern generator is configured to generate light including a speckle pattern by scattering the light output from the light source. the stage is disposed on a movement path of the light including the speckle pattern, and a sample reflecting the light including the speckle pattern is seated on the stage. the image sensor is configured to receive light reflected from the sample and generate an original image representing a diffractive pattern of light reflected from the sample. the controller is configured to generate a prediction image for estimating diffractive characteristics of light incident on the image sensor.
Inventor(s): Sangwoo HA of Suwon-si (KR) for samsung electronics co., ltd., Jongpil WON of Suwon-si (KR) for samsung electronics co., ltd., Jaesun LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): F21V8/00, G02B1/04, G02B27/01
CPC Code(s): G02B6/0055
Abstract: an exit pupil expansion (epe) optical device is provided. the epe includes a first beam expander including first mirrors and configured to expand a beam width of incident light in a first direction to output expanded light, a second beam expander including second mirrors and configured to expand a beam width of light incident from the first beam expander in a second direction different from the first direction to output in a third direction different from the first direction and the second direction, and a waveguide which includes an exit surface through which light having passed through the first beam expander and the second beam expander is output and in which the first beam expander and the second beam expander are embedded, wherein each of the first mirrors and the second mirrors may form an angle equal to or greater than 20 degrees with respect to a normal of the exit surface.
Inventor(s): Younghyun KIM of Suwon-si (KR) for samsung electronics co., ltd., Minho PARK of Suwon-si (KR) for samsung electronics co., ltd., Joongwoo AHN of Suwon-si (KR) for samsung electronics co., ltd., Inho YUN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G02B6/124, A61B5/00, G02B6/12, G02B6/293, G02B6/42, G02B6/43
CPC Code(s): G02B6/124
Abstract: an electronic device includes: a light-emitting unit disposed on a substrate, where the light-emitting unit includes light sources configured to emit light in different wavebands; first optical waveguides configured to transfer light emitted through the light-emitting unit in a first direction parallel to a surface of the substrate; and a light concentration change member configured to change an angle of light such that light transferred from the first optical waveguides is discharged in a second direction substantially perpendicular to the first direction by the light concentration change member, where the light concentration change member has a structure configured to concentrate, at one point, light rays transferred from the first optical waveguides in different positions.
Inventor(s): Youngjae HWANG of Suwon-si (KR) for samsung electronics co., ltd., Jooyoung OH of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G02B27/64, G03B5/00, G03B30/00, H02K41/035, H04N23/68
CPC Code(s): G02B27/646
Abstract: an electronic device, according to one embodiment, comprises: a housing which forms the exterior of the electronic device, and a camera module which has at least a portion thereof disposed inside the housing. the camera module comprises: a fixed part which is fixedly disposed in the electronic device, a movable part which is connected to a lens or an image sensor and is movable with respect to the fixed part, and an actuator which comprises a magnet unit and a coil unit disposed so as to face each other, and which moves the movable part relative to the fixed part. the coil unit may comprise a first coil layer which comprises a coil having a first coil turn cross-sectional area, and a second coil layer which is positioned relatively farther from the magnet unit than the first coil layer, and comprises a coil having a second coil turn cross-sectional area greater than the first coil turn cross-sectional area. other various embodiments are possible.
Inventor(s): Junghyun PARK of Suwon-si (KR) for samsung electronics co., ltd., Sunil KIM of Suwon-si (KR) for samsung electronics co., ltd., Minkyung LEE of Suwon-si (KR) for samsung electronics co., ltd., Byunggil JEONG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G02F1/29, H01S5/042, H01S5/125
CPC Code(s): G02F1/292
Abstract: a phase modulation device includes an upper reflective layer onto which incident light is incident; a lower reflective layer provided on a lower portion of the upper reflective layer; an active layer provided between the upper reflective layer and the lower reflective layer; a first electrode connected to an upper surface of the active layer; and a second electrode connected to a lower surface of the active layer, wherein the lower reflective layer may include a first distributed bragg reflector (dbr) layer including at least one first low refractive material layer and at least one first high refractive material layer that are alternately stacked, and the at least one first low refractive material layer has a first refractive index and the at least one first high refractive material layer has a second refractive index that is greater than the first refractive index.
Inventor(s): Hyunyoung LEE of Suwon-si (KR) for samsung electronics co., ltd., Pyungkang KIM of Suwon-si (KR) for samsung electronics co., ltd., Donghyun KIM of Suwon si (KR) for samsung electronics co., ltd., Jungjoon PARK of Suwon-si (KR) for samsung electronics co., ltd., BEOMSOO HWANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G03F7/16, B65D41/04, B65D47/06
CPC Code(s): G03F7/16
Abstract: a container stopper may include a first gear having a first axis extended in a first direction, a second gear spaced apart from the first axis in a horizontal direction crossing the first direction, a tube coupler coupled to the first gear, and an insertion tube extended from the tube coupler in a downward direction. the tube coupler may include a coupler body coupled to the first gear to be rotatable to the first gear and a first tube fastener, which is placed on and coupled to the coupler body and is connected to the insertion tube. the first gear may have a female thread structure formed on an inner side surface of the first gear, and the second gear may have a rotary coupling structure formed on a top or bottom surface of the second gear.
Inventor(s): HEUNGSUK OH of Suwon-si (KR) for samsung electronics co., ltd., SANGWOOK KIM of Suwon-si (KR) for samsung electronics co., ltd., HEE-JUN LEE of Suwon-si (KR) for samsung electronics co., ltd., JEEEUN JUNG of Suwon-si (KR) for samsung electronics co., ltd., WOO-YONG CHO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G03F7/00, G03F1/36
CPC Code(s): G03F7/70441
Abstract: a method of fabricating a semiconductor device is disclosed. the method includes performing an optical proximity correction (opc) on a design pattern of a layout and forming a photoresist pattern on a substrate using a photomask manufacture based the corrected layout. the performing of the opc includes analyzing a cell hierarchy to choose a representative cell in the layout, dividing the design pattern in the representative cell into a plurality of segments including first segments, choosing a first unique segment, which represents the first segments, from the plurality of segments, generating a first correction bias of the first unique segment, applying the first correction bias to all of the first segments to generate a correction pattern, and applying a correction result of the representative cell to other cells that are included in the layout and are of a same type as the representative cell.
Inventor(s): Hansol KIM of Suwon-si (KR) for samsung electronics co., ltd., Hyungbin NOH of Suwon-si (KR) for samsung electronics co., ltd., Heeyoung YUN of Suwon-si (KR) for samsung electronics co., ltd., Jooho LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G04C10/04, G04G17/04, H01Q1/27
CPC Code(s): G04C10/04
Abstract: according to an embodiment, an electronic device may include: a battery, a retaining member comprising a support disposed on one surface of the battery and configured to function as an antenna corresponding to a first frequency band, and a printed circuit board disposed on an other surface of the battery, the printed circuit board including a communication circuit electrically connected to the retaining member. the electronic device may include a switch configured to electrically connect at least one passive element among multiple passive elements and the retaining member, a memory, and at least one processor, comprising processing circuitry, operatively connected to the communication circuit, the switch, and the memory. according to an embodiment, at least one processor, individually and/or collectively, may be configured to: identify a remaining capacity of the battery; identify information regarding a passive element to be connected to the retaining member, based on the identified remaining capacity of the battery and the first frequency band; select at least one passive element among the multiple passive elements, based on the identified information regarding a passive element; and control the switch such that the at least one selected passive element and the retaining member are electrically connected.
Inventor(s): Moonchul SHIN of Suwon-si (KR) for samsung electronics co., ltd., Youngmin KANG of Suwon-si (KR) for samsung electronics co., ltd., Yeonggyu YOON of Suwon-si (KR) for samsung electronics co., ltd., Joongyeon CHO of Suwon-si (KR) for samsung electronics co., ltd., Junyoung CHOI of Suwon-si (KR) for samsung electronics co., ltd., Byounguk YOON of Suwon-si (KR) for samsung electronics co., ltd., Junghyeob LEE of Suwon-si (KR) for samsung electronics co., ltd., Sunggun CHO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F1/16, H05K5/02, H05K7/16
CPC Code(s): G06F1/1624
Abstract: according to various embodiments of the disclosure, an electronic device may comprise a housing including a first housing and a second housing for guiding a slide of the first housing; a display including a first display area disposed on the first housing and a second display area extending from the first display area and configured to move at least a portion of the second display area based on the slide of the first housing; a supporting structure configured to support at least a portion of the first display area or at least a portion of the second display area and including a plurality of bars; and a blocking member for blocking influx of an external foreign object through a gap between the housing and the display. when the first housing slides, at least one of the plurality of bars may be configured to pressurize and push out the blocking member to space the display and the blocking member apart from each other. other various embodiments are possible.
Inventor(s): Eunsung LEE of Suwon-si (KR) for samsung electronics co., ltd., Kiho KONG of Suwon-si (KR) for samsung electronics co., ltd., Junhee CHOI of Suwon-si (KR) for samsung electronics co., ltd., Nakhyun KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F1/16, H01L25/16, H01L33/14, H01L33/50
CPC Code(s): G06F1/1652
Abstract: provided are a display apparatus and a method of manufacturing the display apparatus. the display apparatus includes a pixel electrode configured to supply power to a subpixel; a common electrode; an organic transparent substrate; a driving layer provided on the organic transparent substrate and electrically connected to the pixel electrode, the driving layer including a driving device configured to control power on-off of the subpixel; and a light emitting unit provided on the driving layer and including an inorganic material, the light emitting unit including a first semiconductor layer, an active layer, and a second semiconductor layer.
Inventor(s): Hanseok PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F3/0488
CPC Code(s): G06F3/0488
Abstract: an electronic device is provided and includes a housing, a memory storing instructions, a display insertable into the housing or extractable out from the housing; and at least one processor, wherein the instructions, when executed by the at least one processor, cause the at least one processor to: identify a touch input on a display region of the display exposed outside the housing; and based on identifying that a size of the display region changes while the touch input is maintained on the display region, display an object corresponding to a contact point of the touch input based on the size of the display region after the size changes.
Inventor(s): Ramdas P. Kachare of Pleasanton CA (US) for samsung electronics co., ltd., Amir Beygi of San Jose CA (US) for samsung electronics co., ltd., Mostafa Aghaee of San Jose CA (US) for samsung electronics co., ltd., Jingchi Yang of Sunnyvale CA (US) for samsung electronics co., ltd., Tinh Tri Lac of Manteca CA (US) for samsung electronics co., ltd., Sonny Pham of Ramon CA (US) for samsung electronics co., ltd., Nayankumar Patel of Fremont CA (US) for samsung electronics co., ltd.
IPC Code(s): G06F3/06, G06F13/38
CPC Code(s): G06F3/0655
Abstract: systems and methods for executing a data processing function are disclosed. a first processing device of a storage accelerator loads a first instruction set associated with a first application of a host computing device. a second processing device of the storage accelerator loads a second instruction set associated with the first application. a command is received from the host computing device. the command may be associated with data associated with the first application. the first processing device identifies at least a first criterion or a second criterion associated with the data. the first processing device processes the data according to the first instruction set in response to identifying the first criterion. the first processing device writes the data to a buffer of the second processing device in response to identifying the second criterion. the second processing device processes the data in the buffer according to the second instruction set.
Inventor(s): Peiwei LI of SUWON-SI (KR) for samsung electronics co., ltd., Ruyi ZHANG of SUWON-SI (KR) for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0685
Abstract: a method of data storage based on a redundant array of independent disks (raid), where the raid includes a plurality of solid state drives (ssd), each ssd including a persistent memory region (pmr) and a nand, includes writing first data into the nand, and writing first check data into the pmr. the first check data is check data related to the first data.
Inventor(s): Nammin JO of Suwon-si (KR) for samsung electronics co., ltd., Seungnyun KIM of Suwon-si (KR) for samsung electronics co., ltd., Jihyun KIM of Suwon-si (KR) for samsung electronics co., ltd., Jongmin YOON of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F3/16, G06F3/01
CPC Code(s): G06F3/165
Abstract: an electronic device according to various embodiments of the present disclosure comprises: one or more input modules comprising input circuitry; one or more speakers; a display; and at least one processor comprising processing circuitry, and memory storing instructions that, when executed by at least one processor individually or collectively, cause the electronic device to: obtain an input through the one or more input modules; identify the type of input; determine whether to output, through the one or more speakers, information corresponding to the input; and control the one or more speakers so that the information corresponding to the input is output through the one or more speakers according to the type of input based on determining that the information corresponding to the input is to be output through the one or more speaker.
Inventor(s): Imkyeong YOU of Suwon-si (KR) for samsung electronics co., ltd., Chanwoong PARK of Suwon-si (KR) for samsung electronics co., ltd., Jungkun LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F3/16
CPC Code(s): G06F3/165
Abstract: a method for adjusting the volume of an electronic device, according to an embodiment, may comprise: adjusting, based on a user's voice being input into a first electronic device, the output volume of a second electronic device based on a second volume adjustment amount, determined based on the relative difference between the volume of the user's voice and the volume of the second electronic device measured in the first electronic device, and/or a third volume adjustment amount, input through a volume adjustment interface; adjusting, based on a conversation partner's voice being output from the first electronic device, the output volume of the first electronic device based on a first volume adjustment amount, determined based on the volume of the second electronic device measured in the first electronic device, and/or the third volume adjustment amount; and adjusting, based on the user and the conversation partner speaking simultaneously, the output volume of the second electronic device based on the first volume adjustment amount and/or the third volume adjustment amount, and determining the output volume of the first electronic device based on the volume of the user's voice.
Inventor(s): Hyungtak CHOI of Suwon-si (KR) for samsung electronics co., ltd., Hyeonmok KO of Suwon-si (KR) for samsung electronics co., ltd., Jihie KIM of Suwon-si (KR) for samsung electronics co., ltd., Hongchul KIM of Suwon-si (KR) for samsung electronics co., ltd., Inchul HWANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F3/16, G06F3/00, G06F3/01, G06F18/20, G06V40/16, G10L17/18, G10L17/22
CPC Code(s): G06F3/167
Abstract: disclosed is an electronic device. the electronic device comprises: a microphone comprising circuitry; a speaker comprising circuitry; and a processor electrically connected to the microphone and speaker, wherein the processor, when a first user's voice is input through the microphone, identifies a user who uttered the first user's voice and provides a first response sound, which is obtained by inputting the first user's voice to an artificial intelligence model learned through an artificial intelligence algorithm, through the speaker, and when a second user's voice is input through the microphone, identifies a user who uttered the second user's voice, and if the user who uttered the first user's voice is the same as the user who uttered the second user's voice, provides a second response sound, which is obtained by inputting the second user's voice and utterance history information to the artificial intelligence model, through the speaker. in particular, at least some of the methods of providing a response sound to a user's voice may use an artificial intelligence model learned in accordance with at least one of a machine learning, neural network, or deep learning algorithm.
Inventor(s): Yuhwan RO of Seongnam-si (KR) for samsung electronics co., ltd., Shinhaeng KANG of Hwaseong-si (KR) for samsung electronics co., ltd., Seongil O of Hwaseong-si (KR) for samsung electronics co., ltd., Seungwoo SEO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F9/30, G06F9/50, G06F12/06, G06F13/16, G06F15/78, H03K19/173
CPC Code(s): G06F9/3001
Abstract: a memory device configured to perform in-memory processing includes a plurality of in-memory arithmetic units each configured to perform in-memory processing of a pipelined arithmetic operation, and a plurality of memory banks allocated to the in-memory arithmetic units such that a set of n memory banks is allocated to each of the in-memory operation units, each memory bank configured to perform an access operation of data requested from the in-memory arithmetic units while the pipelined arithmetic operation is performed. each of the in-memory arithmetic units is configured to operate at a first operating frequency that is less than or equal to a product of n and a second operating frequency of each of the memory banks.
Inventor(s): Mohammadreza SOLTANIYEH of Sunnyvale CA (US) for samsung electronics co., ltd., Xuebin YAO of Mountain View CA (US) for samsung electronics co., ltd., Ramdas KACHARE of Pleasanton CA (US) for samsung electronics co., ltd.
IPC Code(s): G06F9/38, G06F9/30, G06F13/42
CPC Code(s): G06F9/3842
Abstract: systems and methods for parallel data processing. in some embodiments, the system includes: a first processing chain; and a second processing chain, the first processing chain including: a first core; a second core; and a first inter-core bus connecting the second core of the first processing chain to the first core of the first processing chain the system being configured to forward an output of a calculation of the first processing chain to the second processing chain.
Inventor(s): Jongwook Park of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F11/07, G06F12/10
CPC Code(s): G06F11/0793
Abstract: a memory device includes at least one swap circuit swapping a plurality of decoded row addresses with one repair address using repair data, at least one register storing the repair data, a wordline activation signal driver receiving the repair address and outputting a wordline activation signal, and a sub-wordline driver activating corresponding sub-wordlines in response to the wordline activation signal.
Inventor(s): Ramdas Kachare of Pleasanton CA (US) for samsung electronics co., ltd., Hingkwan Huen of Daly City CA (US) for samsung electronics co., ltd., Luis Vitorio Cargnini of San Jose CA (US) for samsung electronics co., ltd., Hrishikesh Sathawane of San Jose CA (US) for samsung electronics co., ltd.
IPC Code(s): G06F12/02, G06F21/44
CPC Code(s): G06F12/0246
Abstract: systems and methods for demand-based storage are disclosed. a first storage device is coupled to a first computing device over a first link. the first storage device includes a storage medium and a processing circuit connected to the storage medium. the processing circuit may be configured to: receive a first request for a first storage capacity; transmit a second request for allocating at least a portion of the first storage capacity on a second storage device configured to communicate with the first storage device over a second link; receive a first storage command from the first computing device; generate a second storage command based on the first storage command; and transmit the second storage command to the second storage device for execution of the second storage command by the second storage device.
Inventor(s): DAECHEOL YOU of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F12/084
CPC Code(s): G06F12/084
Abstract: a system on chip including: a plurality of processors; a system level cache memory that is shared by the plurality of processors; and a cache controller that transmits first data to another chip if an atomic operation has been performed on the first data, when the system level cache memory receives the first data from at least one of the plurality of processors.
Inventor(s): Hak-soo YU of HANAM-SI (KR) for samsung electronics co., ltd., Shinhaeng KANG of SUWON-SI (KR) for samsung electronics co., ltd., Yuhwan RO of SEONGNAM-SI (KR) for samsung electronics co., ltd.
IPC Code(s): G06F13/16, G06F9/30
CPC Code(s): G06F13/1668
Abstract: a memory device includes a processor in memory (pim) circuit including an internal processor configured to perform an internal processing operation, and an interface circuit connected to the pim circuit, wherein the interface circuit includes a command address decoder configured to decode a command and an address received through first pins to generate an internal command, a second pin configured to receive a voltage signal relating to a control of a pim operation mode, and a command mode decoder configured to generate at least one command mode bit (cmb) based on the internal command and the voltage signal, and the interface circuit outputs internal control signals to the pim circuit based on the at least one cmb to control the internal processing operation of the pim circuit.
Inventor(s): Hyungwoo LEE of Suwon-si (KR) for samsung electronics co., ltd., Soon-Wan KWON of Suwon-si (KR) for samsung electronics co., ltd., Seok Ju YUN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F15/80, G06F9/38
CPC Code(s): G06F15/8061
Abstract: provided are a digital signal processor (dsp) and an electronic device using the same. the dsp includes: a first function unit (fu) having a non-imc (in-memory computing) operation architecture using an operation unit; a second fu having an imc architecture using a memory cell array; and a register file used by the first fu and the second fu.
Inventor(s): Yeon Il JUNG of Suwon-si (KR) for samsung electronics co., ltd., Han-Kyung KIM of Suwon-si (KR) for samsung electronics co., ltd., Seung Kwon LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F30/3953
CPC Code(s): G06F30/3953
Abstract: an integrated circuit design system using a computing system comprises a processor, and memory configured to store an instruction, which allows the processor to perform a method of designing an integrated circuit, the integrated circuit includes a substrate, a front end of line (feol) in at least a portion of the substrate and on the substrate, and a back end of line (beol) formed on the feol, and the method of designing the integrated circuit includes selecting a first metal layer included in the beol and disposed at a first level from the substrate, generating a first blockage layer disposed at the first level, surrounding the first metal layer, generating at least one first upper blockage layer disposed at a level higher than the first level from the substrate, and generating at least one first lower blockage layer disposed at a level lower than the first level from the substrate.
20240419932. STORAGE DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Youngwoo PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06K19/077, G06F13/38
CPC Code(s): G06K19/07732
Abstract: a storage device includes a storage controller and a printed circuit board. the printed circuit board includes a host interface connector including first pins coupled to an external host device, a controller socket in which the storage controller is mounted, and a first slot that may receive a first secure digital (sd) express device, the first slot including second pins to be coupled to the first sd express device. a first receive pin among the first pins is connected to a first receive pin among the second pins, a second receive pin among the first pins is connected to a second receive pin among the second pins, a first transmit pin among the first pins is connected to a first transmit pin among the second pins, and a second transmit pin among the first pins is connected to a second transmit pin among the second pins.
Inventor(s): Byung-Gook Park of Seoul (KR) for samsung electronics co., ltd., Sungmin Hwang of Seoul (KR) for samsung electronics co., ltd.
IPC Code(s): G06N3/08, G06N3/049, G06N3/06, G06N5/04
CPC Code(s): G06N3/08
Abstract: embodiments relate to an inference method and device using a spiking neural network including parameters determined using an analog-valued neural network (ann). the spiking neural network used in the inference method and device includes an artificial neuron that may have a negative membrane potential or have a pre-charged membrane potential. additionally, an inference operation by the inference method and device is performed after a predetermined time from an operating time point of the spiking neural network.
Inventor(s): Yeshwanth VENKATESHA of Bangalore (IN) for samsung electronics co., ltd., Sundeep KRISHNADASAN of Bangalore (IN) for samsung electronics co., ltd., Ankur DESHWAL of Bangalore (IN) for samsung electronics co., ltd.
IPC Code(s): G06N3/082, G06N3/04
CPC Code(s): G06N3/082
Abstract: provided is a method and system with deep learning model generation. the method includes identifying a plurality of connections in a neural network that is pre-associated with a deep learning model, generating a plurality of pruned neural networks by pruning different sets of one or more of the plurality of connections to respectively generate each of the plurality of pruned neural networks, generating a plurality of intermediate deep learning models by generating a respective intermediate deep learning model corresponding to each of the plurality of pruned neural networks, and selecting one of the plurality of intermediate deep learning models, having a determined greatest accuracy among the plurality of intermediate deep learning models, to be an optimized deep learning model.
Inventor(s): Ritesh SINGH of Uttar Pradesh (IN) for samsung electronics co., ltd., Kalgesh SINGH of Uttar Pradesh (IN) for samsung electronics co., ltd., Mohd Amir ANSARI of Uttar Pradesh (IN) for samsung electronics co., ltd.
IPC Code(s): G06N20/00
CPC Code(s): G06N20/00
Abstract: a system and method for predicting a set of probable classes for test data is described. the method comprises retrieving, from a memory a training dataset, a plurality of classes, and a plurality of corresponding training feature vectors for each of the plurality of classes. the method comprises receiving an input indicative of a target probability required for the test data. the method comprises determining a set of membership probabilities for the test data that include a corresponding membership probability associated with each of the plurality of classes, the corresponding membership probability being indicative of a probability of the test data belonging to a corresponding class of the plurality of classes. the method comprises determining, based on the input and the set of membership probabilities, the set of probable classes, from the plurality of classes, for the test data.
Inventor(s): Wonwoo LEE of Suwon-si (KR) for samsung electronics co., ltd., Injung LEE of Suwon-si (KR) for samsung electronics co., ltd., Jeongpyo LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06Q20/40, G06Q20/32, H04N23/69
CPC Code(s): G06Q20/40145
Abstract: provided are an augmented reality device for performing a payment by recognizing a payment code and a method of operating the same. the method may include obtaining, based on gaze information of both eyes of the user, a gaze point where gaze directions of the both eyes of the user converge, wherein the gaze information is obtained using at least one gaze tracking sensor; determine a region of interest corresponding to the gaze point on an image obtained through the camera; enlarge the region of interest; recognize a payment code included in the enlarged region of interest; and perform a payment by using the payment code.
Inventor(s): Korosh Vatanparvar of San Jose CA (US) for samsung electronics co., ltd., Jeremy Speth of South Bend IN (US) for samsung electronics co., ltd., Jicheng Li of Mountain View CA (US) for samsung electronics co., ltd., Li Zhu of Saratoga CA (US) for samsung electronics co., ltd., Nafiul Rashid of San Jose CA (US) for samsung electronics co., ltd., Migyeong Gwak of Santa Clara CA (US) for samsung electronics co., ltd., Jilong Kuang of San Jose CA (US) for samsung electronics co., ltd., Jun Gao of Menlo Park CA (US) for samsung electronics co., ltd.
IPC Code(s): G06T5/70, A61B5/00, A61B5/0205, A61B5/024, A61B5/11, G06T5/20, G06T5/60, G06T7/00, G06T7/246, G06T7/73, G06V10/776, G06V40/16
CPC Code(s): G06T5/70
Abstract: in one embodiment, a method includes accessing a video of a user's face. the method further includes accessing, for each image frame in the video, (1) one or more facial landmarks determined by a facial landmark detection (fld) model and (2) a corresponding determined position in the image for each facial landmark. the method further includes determining, based on the one or more facial landmarks and corresponding positions, a motion of the user's face in the captured video; extracting, from the determined motion of the user's face, a corrected motion signal of the user's face; adjusting, based on the extracted corrected motion signal of the user's face, the positions of one or more facial landmarks in the image frames; and determining, based at least in part on the adjusted positions of the facial landmarks in the sequential images of the video, one or more vital signs of the user.
Inventor(s): Yahang Li of Champaign IL (US) for samsung electronics co., ltd., Nguyen Thang Long Le of Garland TX (US) for samsung electronics co., ltd., Hamid R. Sheikh of Allen TX (US) for samsung electronics co., ltd.
IPC Code(s): G06T7/246, G06T7/11, G06T7/90, G06T17/00, G06V10/44
CPC Code(s): G06T7/246
Abstract: a method includes obtaining multiple training image frames of a scene, where the training image frames are captured at multiple viewpoints and multiple viewing angles relative to the scene. the method also includes generating multiple initial motion maps using the training image frames and identifying three-dimensional (3d) feature points associated with the scene using the training image frames. the method further includes generating tuned motion masks using the initial motion maps and projections of the 3d feature points onto the initial motion maps. in addition, the method includes training a machine learning model using the training image frames and the tuned motion masks, where the machine learning model is trained to generate 3d information about the scene from viewpoints and viewing angles not captured in the training image frames.
Inventor(s): Anna Ilyinichna Sokolova of Moscow (RU) for samsung electronics co., ltd., Alexander Georgievich Limonov of Moscow (RU) for samsung electronics co., ltd., Filipp Alexandrovich Nikitin of Moscow (RU) for samsung electronics co., ltd., Anton Sergeevich Konushin of Moscow (RU) for samsung electronics co., ltd.
IPC Code(s): G06T7/70
CPC Code(s): G06T7/70
Abstract: a method includes receiving a floorplan of a three-dimensional (3d) structure of a scene; receiving one or more imaging scans of the scene; identifying a gravity direction for the one or more imaging scans; generating, based on the gravity direction, a boundary scan by filtering out one or more points in the one or more imaging scans having horizontal projections that deviate from other points in the one or more imaging scans by a predetermined amount; aligning the boundary scan with the floorplan; extracting one or more structural elements in the one or more imaging scans; and optimizing a three-term cost function comprising a geometric term, a floor term and, a walls term by correlating points in the one or more imaging scans corresponding to the structural elements to respective points in the floorplan.
Inventor(s): Mehmet Kerim YUCEL of Chertsey (GB) for samsung electronics co., ltd., Albert SAA-GARRIGA of Chertsey (GB) for samsung electronics co., ltd., Bruno MANGANELLI of Chertsey (GB) for samsung electronics co., ltd.
IPC Code(s): G06T11/60, G06T7/70
CPC Code(s): G06T11/60
Abstract: according to an embodiment of the disclosure, a method performed by an apparatus may include obtaining a plurality of images, each of the plurality of images comprising a view of a scene. the method may include computing respective scores for each of the plurality of images. the method may include estimating respective camera poses of each of the plurality of images. the method may include using the computed scores and the estimated camera poses to determine a new camera pose useable for generating a new image comprising a view of the scene and having a score greater than a first threshold score. the method may include generating the new image using the new camera pose.
Inventor(s): Jooyoung KIM of Suwon-si (KR) for samsung electronics co., ltd., Eunsol PARK of Suwon-si (KR) for samsung electronics co., ltd., Donghyun YEOM of Suwon-si (KR) for samsung electronics co., ltd., Sunpil HWANG of Suwon-si (KR) for samsung electronics co., ltd., Sungoh KIM of Suwon-si (KR) for samsung electronics co., ltd., Hyungsok YEO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06T15/20, G06T7/62, G06T19/00
CPC Code(s): G06T15/20
Abstract: a wearable device comprises a first display, a second display, a camera, a processor, and memory storing instructions. the instructions, when executed by the processor, may cause the wearable device to display a content having a first displaying size on the first display and the second display such that the content is perceived in a 3d virtual environment as being positioned at a first depth, and in a case that the content is displayed for a time period greater than or equal to a reference time, display the content as a second displaying size on the first display and the second display, which is substantially same as the first displaying size, such that the content is perceived in the 3d virtual environment as being positioned at a second depth greater than the first depth.
Inventor(s): Sangil JUNG of Yongin-si (KR) for samsung electronics co., ltd., Dongwook LEE of Suwon-si (KR) for samsung electronics co., ltd., Jinwoo SON of Seoul (KR) for samsung electronics co., ltd., Changyong SON of Anyang-si (KR) for samsung electronics co., ltd., Jaehyoung YOO of Seongnam-si (KR) for samsung electronics co., ltd., Seohyung LEE of Seoul (KR) for samsung electronics co., ltd., Changin CHOI of Suwon-si (KR) for samsung electronics co., ltd., Jaejoon HAN of Seoul (KR) for samsung electronics co., ltd.
IPC Code(s): G06V10/28, G06F18/214, G06F18/24, G06T3/4046, G06V20/10
CPC Code(s): G06V10/28
Abstract: a system includes: an image sensor configured to acquire an image; an image processor configured to generate a quantized image based on the acquired image using a trained quantization filter; and an output interface configured to output the quantized image.
Inventor(s): Seungwon Jung of Seoul (KR) for samsung electronics co., ltd., Hongjae Lee of Seoul (KR) for samsung electronics co., ltd., Junsang Yoo of Seoul (KR) for samsung electronics co., ltd.
IPC Code(s): G06V10/762, G06T3/18, G06T7/11, G06V10/28, G06V10/764, G06V10/771
CPC Code(s): G06V10/762
Abstract: an image processing device is trained to cluster a plurality of patch images into a plurality of clusters, select a first patch image from each of the plurality of clusters as a reference patch image and select a second patch image from each of the plurality of clusters as a query patch image, and perform quantization on the reference patch image and the query patch image using different numbers of bits.
Inventor(s): Wookhyung KIM of Suwon-si (KR) for samsung electronics co., ltd., Cheulhee HAHM of Suwon-si (KR) for samsung electronics co., ltd., Namuk KIM of Suwon-si (KR) for samsung electronics co., ltd., Anant BAIJAL of Suwon-si (KR) for samsung electronics co., ltd., Jayoon KOO of Suwon-si (KR) for samsung electronics co., ltd., IIhyun CHO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06V10/98, G06V10/82
CPC Code(s): G06V10/993
Abstract: an electronic device includes a memory configured to store a trained neural network model and a processor configured to, by inputting an input image to the trained neural network model, obtain a quality score of the input image, a pixel quality score for each pixel included in the input image and a region of interest (roi) score for the each pixel. the trained neural network obtains feature information for each pixel in the input image, a quality score of each pixel, and an roi score for the each pixel. a computation module obtains an image quality score for the input image based on pixel quality score and the roi score for the each pixel.
Inventor(s): Jaemyun KIM of Suwon-si (KR) for samsung electronics co., ltd., Eunkyung Kim of Suwon-si (KR) for samsung electronics co., ltd., Dayun Kang of Suwon-si (KR) for samsung electronics co., ltd., Byeongjoon Noh of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06V20/52, G06T3/40, G06T7/00, G06V40/16
CPC Code(s): G06V20/52
Abstract: an image analysis device includes: an image converter configured to generate target image frames based on video image frames captured by a terminal device; a plurality of image analyzers respectively comprising a plurality of image analysis models, the plurality of image analyzers being configured to: generate a plurality of analysis results by analyzing the target image frames respectively using the plurality of image analysis models different from each other, and perform a respective independent analysis scheduling regardless of analysis execution states of other image analyzers; and a security state determiner configured to determine a security mode of the terminal device based on the plurality of analysis results.
Inventor(s): Yangsoo CHOI of Suwon-si (KR) for samsung electronics co., ltd., Youngrog KIM of Suwon-si (KR) for samsung electronics co., ltd., Taeyang SONG of Suwon-si (KR) for samsung electronics co., ltd., Changhan LEE of Suwon-si (KR) for samsung electronics co., ltd., Donghyun JO of Suwon-si (KR) for samsung electronics co., ltd., Sukdong KIM of Suwon-si (KR) for samsung electronics co., ltd., Jihea PARK of Suwon-si (KR) for samsung electronics co., ltd., Junghyeob LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G09G3/00, G06F3/0482, G06F3/0484, G06V30/19
CPC Code(s): G09G3/035
Abstract: a portable electronic device may include: a first housing; a second housing disposed to be slidable with respect to the first housing; a flexible display in which a display area of the display is contracted or extended on the basis of slide-in or slide-out driving of the second housing; a motor for generating driving force to slide the second housing; a driving circuit for driving the motor; and a processor(s). the processor(s) may: configure the display area of the flexible display as an activation area for displaying visual information; recognize that a consistency problem occurs in an application execution screen when switching from the slide-out state to the slide-in state on the basis of occurrence of a slide-in trigger for contraction of the activation area while displaying the application execution screen on the activation area in the slide-out state; and provide a user interface to allow extension of the activation area on the basis of the occurrence of the consistency problem.
Inventor(s): Jinbae LEE of Suwon-si (KR) for samsung electronics co., ltd., Kihong MIN of Suwon-si (KR) for samsung electronics co., ltd., Heewoong YOON of Suwon-si (KR) for samsung electronics co., ltd., Hyungpil KUM of Suwon-si (KR) for samsung electronics co., ltd., Donghwan SEO of Suwon-si (KR) for samsung electronics co., ltd., Hyeonchang SON of Suwon-si (KR) for samsung electronics co., ltd., Kyeongmun JO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G09G3/00, H04N23/745
CPC Code(s): G09G3/035
Abstract: an electronic device according to various embodiments comprises: a display; a camera module; a sensor module including a first sensor, which is disposed on the rear part of the electronic device and operates on the basis of light, and a second sensor, which is disposed on the front part of the electronic device and operates on the basis of light; and a processor including a first processor and a second processor, wherein the processor can be configured to control the brightness of the display on the basis of data received from the first sensor and data received from the second sensor when the camera module is in an inactive state, and control the brightness of the display on the basis of data received from the second sensor, and not on the basis of data received from the first sensor, when the camera module is in an active state.
Inventor(s): Sanghun YI of Suwon-si (KR) for samsung electronics co., ltd., Sangwon KIM of Suwon-si (KR) for samsung electronics co., ltd., Youngkook KIM of Suwon-si (KR) for samsung electronics co., ltd., Jeongryeol SEO of Suwon-si (KR) for samsung electronics co., ltd., Sanghoon OH of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G09G5/14, H04B10/114
CPC Code(s): G09G5/14
Abstract: a display device and a control method therefor are disclosed. the display device includes: a display; a transmitter configured to transmit an infrared (ir) signal; and one or more processors configured to: control the display to display a multi-screen including a plurality of images based on a plurality of image signals received from a plurality of source devices, each of the plurality of source devices using a same ir protocol; perform, based on a user command indicating a first image from among the plurality of images, a process for selectively controlling a first source device, from among the plurality of source devices, which provides the first image; and transmit an ir signal for selectively controlling the first source device through the transmitter.
Inventor(s): Amin Fazeli of San Diego CA (US) for samsung electronics co., ltd., Mostafa El-Khamy of San Diego CA (US) for samsung electronics co., ltd., Jungwon Lee of San Diego CA (US) for samsung electronics co., ltd.
IPC Code(s): G10L21/0232, G06N3/08, G06N20/10, G10L21/0208, H04R3/04
CPC Code(s): G10L21/0232
Abstract: a system for performing echo cancellation includes: a processor configured to: receive a far-end signal; record a microphone signal including: a near-end signal; and an echo signal corresponding to the far-end signal; extract far-end features from the far-end signal; extract microphone features from the microphone signal; compute estimated near-end features by supplying the microphone features and the far-end features to an acoustic echo cancellation module including a recurrent neural network including: an encoder including a plurality of gated recurrent units; and a decoder including a plurality of gated recurrent units; compute an estimated near-end signal from the estimated near-end features; and transmit the estimated near-end signal to the far-end device. the recurrent neural network may include a contextual attention module; and the recurrent neural network may take, as input, a plurality of error features computed based on the far-end features, the microphone features, and acoustic path parameters.
Inventor(s): DAE-SIK MOON of SUWON-SI (KR) for samsung electronics co., ltd., GIL-HOON CHA of HWASEONG-SI (KR) for samsung electronics co., ltd., KI-SEOK OH of SEOUL (KR) for samsung electronics co., ltd., CHANG-KYO LEE of SEOUL (KR) for samsung electronics co., ltd., YEON-KYU CHOI of SEOUL (KR) for samsung electronics co., ltd., JUNG-HWAN CHOI of HWASEONG-SI (KR) for samsung electronics co., ltd., KYUNG-SOO HA of HWASEONG-SI (KR) for samsung electronics co., ltd., SEOK-HUN HYUN of SEONGNAM-SI (KR) for samsung electronics co., ltd.
IPC Code(s): G11C11/4076, G06F3/06, G11C7/22, G11C11/409
CPC Code(s): G11C11/4076
Abstract: a memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. the memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.
Inventor(s): Keonwoo PARK of Suwon-si (KR) for samsung electronics co., ltd., Kyuchang KANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G11C11/408
CPC Code(s): G11C11/4085
Abstract: a memory device having a row decoder circuit architecture is provided. the memory device includes a peripheral circuit structure and a cell array structure provided on the peripheral circuit structure and vertically overlapping the peripheral circuit structure. the cell array structure may include a plurality of memory blocks including a plurality of vertical channel transistor structures and a plurality of capacitor structures respectively connected to the vertical channel transistor structures. the peripheral circuit structure includes a row decoder connected to a plurality of word lines of the plurality of memory blocks, and the row decoder includes a first circuit group commonly connected to the plurality of memory blocks and a second circuit group connected to each of the plurality of memory blocks.
Inventor(s): Sangwon Park of Suwon-si (KR) for samsung electronics co., ltd., Jooyong Park of Suwon-si (KR) for samsung electronics co., ltd., Jaeha Park of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G11C16/10, G11C16/04, G11C16/08, G11C16/34
CPC Code(s): G11C16/107
Abstract: a nonvolatile memory device may include at least one memory block and a control circuit. the at least one memory block includes a plurality of cell strings that are divided into a plurality of sub-blocks arranged in the vertical direction, and each of the sub-blocks includes boundary word-lines adjacent to another sub-block and internal word-lines different from the boundary word-lines. the control circuit may be configured to control an erase operation by applying a pre-program voltage with a first individual bias condition sequentially to the internal word-lines and the at least one boundary word-line of at least one sub-block to be erased from among the plurality of sub-blocks during a pre-program period of an erase loop, and by applying an erase voltage to a channel of the at least one memory block during an erase execution period of the erase loop.
20240420794. NON-VOLATILE MEMORY_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Youhwan Kim of Suwon-si (KR) for samsung electronics co., ltd., Sewoong Lee of Suwon-si (KR) for samsung electronics co., ltd., Haedong No of Suwon-si (KR) for samsung electronics co., ltd., Ho-Sung Ahn of Suwon-si (KR) for samsung electronics co., ltd., Youn-Soo Cheon of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G11C29/52, G11C16/08, G11C29/50
CPC Code(s): G11C29/52
Abstract: a non-volatile memory device comprises a memory cell array comprising a plurality of memory cell blocks; and an address decoder connected to the memory cell array through a plurality of word lines and configured to apply a read pass voltage to unselected word lines of a selected memory cell block among the plurality of memory cell blocks and apply the read pass voltages of different levels to different memory cell blocks among the plurality of memory cell blocks.
Inventor(s): Seokhwan HONG of Suwon-si (KR) for samsung electronics co., ltd., Hogyeong KIM of Suwon-si (KR) for samsung electronics co., ltd., Hoshik LEE of Suwon-si (KR) for samsung electronics co., ltd., Kyunghyun CHO of New York NY (US) for samsung electronics co., ltd.
IPC Code(s): G16C20/30, G16C20/70
CPC Code(s): G16C20/30
Abstract: a method, apparatus, and system with physical property prediction inference and/or training is provided. a processor-implemented method includes predicting physical properties of a target material using a machine learning model provided an input that is based on a target feature vector, where the target feature vector corresponds to the target material, where the machine learning model is configured to predict the physical properties of the target material based on a multi-dimensional space that is dependent on feature vectors representing respective structures of materials and relation information between the materials.
20240420930. SUBSTRATE PROCESSING APPARATUS_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Changho Kim of Suwon-si (KR) for samsung electronics co., ltd., Ho-Jun Lee of Suwon-si (KR) for samsung electronics co., ltd., Kyung-Sun Kim of Suwon-si (KR) for samsung electronics co., ltd., Sang-Woo Kim of Suwon-si (KR) for samsung electronics co., ltd., Donghyeon Na of Suwon-si (KR) for samsung electronics co., ltd., Seungbo Shim of Suwon-si (KR) for samsung electronics co., ltd., Sung-Hyeon Jung of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01J37/32
CPC Code(s): H01J37/32669
Abstract: a substrate processing apparatus according to an embodiment includes: a chamber providing a processing space; a support member disposed in the processing space and configured to support a substrate during a process treatment; an antenna providing energy for plasma excitation into the processing space; and an inner electromagnet disposed outside the processing space.
Inventor(s): Seunghoon CHOI of Suwon-si (KR) for samsung electronics co., ltd., Seongsoo Kim of Suwon-si (KR) for samsung electronics co., ltd., Hoyoung Kim of Suwon-si (KR) for samsung electronics co., ltd., Yeongbong Park of Suwon-si (KR) for samsung electronics co., ltd., Kiho Bae of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L21/3105, H01L21/3115, H01L21/768, H01L23/528, H01L29/40
CPC Code(s): H01L21/31053
Abstract: a method of manufacturing a semiconductor device includes forming a first dielectric film on a front-side surface of a substrate that has the front-side surface and a back-side surface, doping a surface of the first dielectric film with impurities to form a doped dielectric film covering at least a portion of the first dielectric film, forming a second dielectric film on the doped dielectric film, and polishing the second dielectric film by a chemical mechanical polishing (cmp) method. the doped dielectric film has a polishing rate less than a polishing rate of each of the first dielectric film and the second dielectric film.
Inventor(s): Taejun JEON of Suwon-si (KR) for samsung electronics co., ltd., Yongkwan LEE of Suwon-si (KR) for samsung electronics co., ltd., Gyuhyeong KIM of Suwon-si (KR) for samsung electronics co., ltd., Seung Hwan KIM of Suwon-si (KR) for samsung electronics co., ltd., Jongwan KIM of Suwon-si (KR) for samsung electronics co., ltd., Junwoo PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L21/67, H01L21/56
CPC Code(s): H01L21/67126
Abstract: disclosed are semiconductor molding apparatuses and compression molding methods. the semiconductor molding apparatus comprises an upper mold capable of supporting a substrate, a lower mold that provides a first cavity capable of being filled with a resin, a guide member that provides a second cavity to be filled with the resin and vertically penetrates the lower mold, and a guide lift capable of driving the guide member to vertically move. the lower mold includes a base plate that extends in a horizontal direction and a sidewall member that upwardly extends from the base plate. the guide lift drives the guide member to vertically move such that a top surface of the guide member moves between a top surface of the base plate and a top surface of the sidewall member.
Inventor(s): YANGGYOO JUNG of Suwon-si (KR) for samsung electronics co., ltd., YOUNG LYONG KIM of Suwon-si (KR) for samsung electronics co., ltd., SUNGWOO PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L21/78, H01L23/00
CPC Code(s): H01L21/78
Abstract: a semiconductor die includes: a first surface; a second surface opposite to the first surface; and a first side surface, a second side surface, a third side surface, and a fourth side surface between the first surface and the second surface, in which the first side surface faces the third side surface, and a roughness of the second side surface varies according to area, and a roughness of at least a portion of the second side surface is greater than that of the first side surface.
20240421011. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): WanSun Kim of Suwon-si (KR) for samsung electronics co., ltd., HYUNGGIL BAEK of Suwon-si (KR) for samsung electronics co., ltd., Hojin Seo of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/18, H01L23/00, H01L23/498, H01L25/065, H01L25/18
CPC Code(s): H01L23/18
Abstract: a semiconductor package includes a package substrate, a semiconductor chip that is bonded to the package substrate, and a stiffener that is adjacent to the semiconductor chip and is bonded to the package substrate. the stiffener includes a plurality of corner parts that are bonded to a plurality of corner regions of the package substrate, and a plurality of leg parts that are spaced apart from the package substrate. each of the plurality of leg parts connects corresponding two leg parts of the plurality of leg parts with each other.
20240421012. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Sangsick PARK of Suwon-si (KR) for samsung electronics co., ltd., Chungsun LEE of Suwon-si (KR) for samsung electronics co., ltd., Hanmin LEE of Suwon-si (KR) for samsung electronics co., ltd., Seungyoon JUNG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/24, H01L23/00, H01L25/065
CPC Code(s): H01L23/24
Abstract: a semiconductor device includes a first semiconductor chip having a first through silicon via (tsv). a second semiconductor chip is arranged on the first semiconductor chip and includes a second tsv positioned on a same vertical line as the first tsv. a conductive pad is disposed on each of the first tsv and the second tsv. the conductive pad electrically connects the first semiconductor chip and the second semiconductor chip to each other. a warpage prevention metal structure is disposed on an upper surface of the first semiconductor chip or an upper surface of the second semiconductor chip.
Inventor(s): Injae Lee of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/31, H01L21/56, H01L23/00, H01L23/538, H01L25/00, H01L25/065
CPC Code(s): H01L23/3121
Abstract: a semiconductor package includes a package substrate extending in a first direction, the package substrate having at least one first opening in a chip mounting region of the package substrate; a first semiconductor chip mounted in the chip mounting region on an upper surface of the package substrate; a plurality of second semiconductor chips sequentially stacked on the upper surface of the package substrate and spaced apart from the first semiconductor chip in the first direction; a sealant covering the first semiconductor chip and the plurality of second semiconductor chips on the package substrate, the sealant filling a gap between the first semiconductor chip and the package substrate and filling an interior of the at least one first opening of the package substrate; and a taping film attached on a lower surface of the package substrate to cover at least a portion of the sealant exposed in the first opening.
Inventor(s): Jing Cheng LIN of Suwon-si (KR) for samsung electronics co., ltd., Jihwan SUH of Suwon-si (KR) for samsung electronics co., ltd., Hyunchul JUNG of Suwon-si (KR) for samsung electronics co., ltd., Youngkun JEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/31, H01L23/00, H01L23/48, H01L25/18
CPC Code(s): H01L23/3128
Abstract: a semiconductor package includes a first semiconductor chip, second semiconductor chips stacked on the first semiconductor chip, a first molding layer, a dummy chip and a second molding layer. each second semiconductor chip includes a semiconductor substrate comprising an active surface and an inactive surface opposite to the active surface. the first molding layer surrounds a portion of an upper surface of the first semiconductor chip and side surfaces of the second semiconductor chips and includes a trench that extends from an upper surface of the first molding layer into the first molding layer. the dummy chip is stacked on an uppermost second semiconductor chip of the second semiconductor chips. the second molding layer surrounds side surfaces of the dummy chip, and covers the first molding layer.
20240421020. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): YOUNG KWAN SEO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/31, H01L21/56, H01L23/00, H01L25/065
CPC Code(s): H01L23/3178
Abstract: a semiconductor package may include a base semiconductor chip, a connection semiconductor chip on the base semiconductor chip, an upper semiconductor chip on the connection semiconductor chip, a filling layer in a trench in the upper semiconductor chip, and a mold layer extending around the upper semiconductor chip.
20240421034. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Byungho KIM of Suwon-si (KR) for samsung electronics co., ltd., Youngchan KO of Suwon-si (KR) for samsung electronics co., ltd., Gyeongho KIM of Suwon-si (KR) for samsung electronics co., ltd., Yongkoon LEE of Suwon-si (KR) for samsung electronics co., ltd., Myungdo CHO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/42, H01L23/15, H01L23/498, H01L23/538, H01L25/065
CPC Code(s): H01L23/42
Abstract: a semiconductor package includes: a first redistribution structure including a first insulating layer and first conductive patterns; a connection substrate on the first redistribution structure, and including a base layer and a through electrode penetrating the base layer, wherein the base layer includes a first material; a molding layer at least partially surrounding the connection substrate and disposed on the first redistribution structure, wherein the molding layer includes a second material; a second redistribution structure disposed on the molding layer and the connection substrate; and a plurality of semiconductor devices spaced apart from each other on the second redistribution structure, wherein a first thermal expansion coefficient of the first material of the base layer is less than a second thermal expansion coefficient of the second material of the molding layer, and wherein an upper surface of the base layer is substantially coplanar with an upper surface of the molding layer.
20240421039. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Hyungeun CHOI of Suwon-si (KR) for samsung electronics co., ltd., Kiseok LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/48, H01L23/00, H01L25/065, H10B80/00
CPC Code(s): H01L23/481
Abstract: a semiconductor device includes a lower chip structure including a memory structure and a lower wiring structure connected to the memory structure and an upper chip structure on the lower chip structure, where the upper chip structure includes an upper base, peripheral transistors below the upper base, an intermediate wiring structure below the upper base and connected to the peripheral transistors, an upper wiring structure on the upper base, a first through-via penetrating the upper base between the upper wiring structure and the intermediate wiring structure, the first through-via connecting the upper wiring structure and the intermediate wiring structure, and a second through-via extending respectively downward and penetrating the upper base between the upper wiring structure and the lower wiring structure, the second through-via connecting the upper wiring structure and the lower wiring structure.
20240421054. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Seongho Shin of Suwon-si (KR) for samsung electronics co., ltd., Donguk Kim of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L23/00
CPC Code(s): H01L23/49816
Abstract: a semiconductor package according to an embodiment may include a printed circuit board that includes a first pad portion, a semiconductor chip that is mounted on the printed circuit board and includes a second pad portion, a coupling part that is between the first pad portion and the second pad portion, and a spacer that is between the coupling part and the first pad portion. the first pad portion and the second pad portion may be electrically coupled to each other through the coupling part and the spacer.
20240421056. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jae-Min Jung of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L23/00, H01L25/065
CPC Code(s): H01L23/49822
Abstract: a semiconductor package includes: a substrate including a chip region and an edge region extending around the chip region; a plurality of film wirings on the substrate in the chip region; an input wiring and an output wiring on the substrate in the edge region and extending to the chip region in a direction parallel to an upper surface of the substrate; and a semiconductor chip on the substrate in the chip region and electrically connected to the input wiring and the output wiring. the substrate includes a through hole extending through the substrate in a second direction perpendicular to the first direction, and the through hole is between the film wirings.
Inventor(s): Jinhyung Jung of Suwon-si (KR) for samsung electronics co., ltd., Hyonchol Kim of Suwon-si (KR) for samsung electronics co., ltd., Won Choi of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/498
CPC Code(s): H01L23/49822
Abstract: a surface mount technology (smt) package includes an smt substrate including an interconnection layer, an insulating layer having an arrangement region for the interconnection layer, and a mask layer on an upper surface of the insulating layer, a component including an insulating body, and an external electrode having at least a portion on a surface of the insulating body opposing the smt substrate, and a solder that electrically connects the interconnection layer and the external electrode to each other. the mask layer has an opening, and the smt substrate further includes an insulating support that supports the external electrode in the opening such that the external electrode is spaced apart from the interconnection layer and the insulating layer.
Inventor(s): Minkyu KIM of Suwon-si (KR) for samsung electronics co., ltd., Dahee KIM of Suwon-si (KR) for samsung electronics co., ltd., Khaile KIM of Suwon-si (KR) for samsung electronics co., ltd., Kyuil HWANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L21/48, H01L23/00, H01L23/538
CPC Code(s): H01L23/49822
Abstract: a semiconductor package may include a package structure on a redistribution structure. the redistribution structure may include a wiring structure and an insulating structure covering the wiring structure. the package structure may include a semiconductor chip connected to the wiring structure. the insulating structure of the redistribution structure may include a plurality of first insulating layers and a second insulating layer between the plurality of first insulating layers. the plurality of first insulating layers may include at least one of a first conductive line pattern and a first conductive via pattern. the second insulating layer may include a second conductive line pattern overlapping the first conductive line pattern in a vertical direction.
Inventor(s): JONGYOUN KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L23/00, H01L23/13, H01L23/14, H01L23/31, H01L25/10
CPC Code(s): H01L23/49833
Abstract: a semiconductor package includes a lower redistribution wiring layer having lower redistribution wirings, at least one semiconductor chip disposed on, and electrically connected to, the lower redistribution wiring layer, a sealing member disposed on the lower redistribution wiring layer and having a plurality of through vias that penetrate the sealing member and are electrically connected to the lower redistribution wirings, a dummy substrate layer stacked on the sealing member and the at least one semiconductor chip and having a plurality of through electrodes that penetrate the dummy substrate layer and are electrically connected to the plurality of through vias, and an upper redistribution wiring layer disposed on the dummy substrate layer and having upper redistribution wirings that are electrically connected to the plurality of through electrodes.
Inventor(s): Myoungsoo KIM of Suwon-si (KR) for samsung electronics co., ltd., Minyoung KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/522, H01L27/02, H01L27/06
CPC Code(s): H01L23/5223
Abstract: a semiconductor device including: a device layer on a substrate; an interconnection layer disposed on the device layer, wherein the interconnection layer includes conductive interconnections forming a plurality of layers; and first and second capacitor structures disposed inside the interconnection layer. each of the first and second capacitor structures includes: electrode layers spaced apart from each other in a vertical direction and forming three or more layers; dielectric layers between the electrode layers; conductive vias respectively connected to one of the electrode layers and extending vertically; a first connection terminal electrically connected to a lowermost electrode layer; and a second connection terminal electrically connected to at least one of the electrode layers, wherein the first capacitor structure and the second capacitor structure include the same number of electrode layers, and wherein a first capacitance of the first capacitor structure is different from a second capacitance of the second capacitor structure.
Inventor(s): Sunjung LEE of Suwon-si (KR) for samsung electronics co., ltd., Sanghoon AHN of Suwon-si (KR) for samsung electronics co., ltd., Donggon YOO of Suwon-si (KR) for samsung electronics co., ltd., Jangeun LEE of Suwon-si (KR) for samsung electronics co., ltd., Jeongwon HWANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/522, H01L21/768, H01L23/532, H01L29/06, H01L29/423, H01L29/775, H01L29/786
CPC Code(s): H01L23/5226
Abstract: disclosed are semiconductor devices and their fabrication methods. the semiconductor device comprises a substrate including an active pattern; a channel pattern on the active pattern; a source/drain pattern electrically connected to the channel pattern; a gate electrode on the channel pattern; an interlayer dielectric layer on the gate electrode, wherein the interlayer dielectric layer includes a recess; a via in the recess; a wiring line on the interlayer dielectric layer and electrically connected to the via; and an adhesion layer between the wiring line and an upper surface of the interlayer dielectric layer, wherein an upper surface of the via is closer than the upper surface of the interlayer dielectric layer to the substrate in a first direction, wherein the first direction is perpendicular to an upper surface of the substrate and wherein a portion of the adhesion layer is on a portion of an inner sidewall of the recess.
Inventor(s): Youngbae Kim of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/528, H01L21/66, H01L25/065, H10B80/00
CPC Code(s): H01L23/5283
Abstract: a high bandwidth memory structure according to an embodiment may include a buffer die including a plurality of conductive lines, a memory stacking structure on the buffer die, the memory stacking structure includes a plurality of memory dies that are stacked, an interconnection structure between the buffer die and the memory stacking structure, the interconnection structure includes a plurality of connection members and an insulating member surrounding the plurality of connection members, and a plurality of conductive pads disposed on the buffer die and side by side with the plurality of connection members, in which each conductive line of the plurality of conductive lines connect a connection member of the plurality of connection members to a conductive pad of the plurality of conductive pads.
20240421081. MEMORY DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Seulji Song of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/528, H10B63/00, H10N70/00
CPC Code(s): H01L23/5283
Abstract: a memory device includes a first conductive line extending in a first horizontal direction, a second conductive line extending in a second horizontal direction, and a memory cell extending in a vertical direction between the first conductive line and the second conductive line. the memory cell includes a lower electrode layer, a switching pattern, and an upper electrode layer, which are sequentially stacked on the first conductive line. the switching pattern includes a chalcogenide layer including a chalcogen element of group vi of the periodic table, and an element of group iv and an element of group v of the periodic table, which are chemically bonded to the group vi chalcogen element. the switching pattern is configured to have a three-level concentration gradient of the group iv element or the group v element in the vertical direction.
20240421082. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jeon Won Jeong of Suwon-si (KR) for samsung electronics co., ltd., Yubo Qian of Suwon-si (KR) for samsung electronics co., ltd., Sutae Kim of Suwon-si (KR) for samsung electronics co., ltd., Jae Young Park of Suwon-si (KR) for samsung electronics co., ltd., Jin Woo Lee of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/528, H01L29/06, H01L29/417, H01L29/423, H01L29/775, H01L29/786
CPC Code(s): H01L23/5283
Abstract: a semiconductor device includes a substrate including a standard cell area and an ending cell area that at least partially surrounds the standard cell area; a first active pattern in the standard cell area; a first wiring that extends in a first direction and is on the first active pattern; a first gate electrode that extends in a second direction and is on the first active pattern; a first gate contact; a second active pattern in the ending cell area; a second wiring that extends in the first direction and is on the second active pattern; a second gate electrode that extends in the second direction and is on the second active pattern; and a second gate contact.
Inventor(s): Seo Woo Nam of Suwon-si, Gyeonggi-do (KR) for samsung electronics co., ltd., Eui Bok Lee of Suwon-si, Gyeonggi-do (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/535, H01L21/768, H01L23/532
CPC Code(s): H01L23/535
Abstract: a semiconductor device includes a lower wiring structure, an upper interlayer insulating film on the lower wiring structure and including an upper wiring trench and an upper wiring structure in the upper wiring trench. the upper wiring structure includes an upper barrier structure, and an upper filling film on the upper barrier structure. the upper barrier structure includes side wall portions extending along side walls of the upper wiring trench, and a bottom portion extending along a bottom face of the upper wiring trench. the upper barrier structure includes an upper barrier film, and an upper liner film between the upper barrier film and the upper filling film. the side wall portions of the upper barrier structure include a two-dimensional material (2d material), and the bottom face of the upper barrier structure is free of the two-dimensional material.
Inventor(s): YOUNGBAE KIM of SUWON-SI (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/538, H01L23/00, H01L23/31, H01L23/498, H01L25/065, H10B80/00
CPC Code(s): H01L23/5383
Abstract: embodiments of a wiring substrate is provided. embodiments include a first redistribution layer, a first core layer disposed on the first redistribution layer, a second core layer disposed on the first core layer, a first adhesion layer disposed between the first core layer and the second core layer, and a second redistribution layer disposed on the second core layer. in some cases, the first core layer includes a first core section and a first core pad disposed on a top surface of the first core section, wherein the second core layer includes a second core section and a second core pad disposed on a bottom surface of the second core section. the first core layer and the second core layer are electrically connected to each other through the first core pad and the second core pad.
20240421099. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Junghoon KANG of Anyang-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/544, H01L23/00, H01L23/31, H01L23/538, H01L25/065
CPC Code(s): H01L23/544
Abstract: a semiconductor package includes a first semiconductor chip; an encapsulant covering at least a portion of the first semiconductor chip; insulating layers provided on the encapsulant, each of the insulating layers being transparent or translucent; and wiring layers provided on the encapsulant, the wiring layers being partially covered by the insulating layers, wherein an outermost insulating layer of the insulating layers comprises a first region and a second region, a color of the first region is different from a color of the second region, the second region surrounds the first region, and at least one marking pattern comprising at least one step portion is provided in the first region of the outermost insulating layer.
Inventor(s): Chengtar Wu of Suwon-si (KR) for samsung electronics co., ltd., CHOONGBIN YIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/065, H01L23/00, H01L23/31, H01L23/48, H01L23/538
CPC Code(s): H01L25/0655
Abstract: a semiconductor package includes: a substrate; a first semiconductor structure on the substrate, wherein the first semiconductor structure includes a first redistribution layer structure and a first semiconductor die that is disposed on the first redistribution layer structure and includes a plurality of first through-semiconductor vias; a second semiconductor structure disposed side by side with the first semiconductor structure on the substrate, wherein the second semiconductor structure includes a second redistribution layer structure and a second semiconductor die that is disposed on the second redistribution layer structure and includes a plurality of second through-semiconductor vias; a plurality of bonding wires electrically connecting the first semiconductor die and the second semiconductor die on the first semiconductor die and the second semiconductor die; and a molding material surrounding the plurality of bonding wires and through which the plurality of bonding wires pass.
20240421125. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): SEUNGDUK BAEK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/065, H01L23/00, H01L23/31, H01L23/48, H01L23/538, H10B80/00
CPC Code(s): H01L25/0655
Abstract: a semiconductor package includes an interposer, a first semiconductor chip on the interposer, a connection structure on the interposer, and a second semiconductor chip on the first semiconductor chip and the connection structure. the first semiconductor chip includes a first input/output circuit. the second semiconductor chip includes a second input/output circuit. the connection structure includes a connection substrate, and a connection through-via penetrating the connection substrate and electrically connecting the second semiconductor chip and the interposer. the first input/output circuit and the second input/output circuit are electrically connected to each other.
20240421129. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): SEUNGDUK BAEK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/065, H01L23/00, H01L23/31, H10B80/00
CPC Code(s): H01L25/0657
Abstract: a semiconductor package include a buffer die, a computing die on the buffer die, a plurality of memory dies vertically stacked on each other to form a memory stack, wherein the memory stack is disposed on the computing die, wherein the buffer die, the computing die, and the memory stack are vertically stacked on each other, and wherein the computing die is disposed in a space between the buffer die and the memory stack, and a mold layer covering the computing die and the plurality of memory dies. the buffer die comprises a plurality of outer connection members. the computing die comprises a plurality of computing blocks. each of the plurality of memory dies comprises a plurality of memory blocks. the plurality of computing blocks are configured to process data received from the plurality of memory blocks and to store the processed results in the plurality of memory blocks.
Inventor(s): Sanghoon Lee of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/065, H01L21/768, H01L23/00, H01L23/48, H01L23/532
CPC Code(s): H01L25/0657
Abstract: a semiconductor package includes a buffer die, an intermediate core die stack stacked on the buffer die, the intermediate core die stack including a plurality of intermediate core dies and a first gap filling portion covering outer surfaces of the plurality of intermediate core dies, and a top core die stack stacked on the intermediate core die stack, the top core die stack including a top core die and a second gap filling portion covering an outer surface of the top core die. the first gap filling portion and the second gap filling portion are directly bonded to each other.
20240421136. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): YOUNGBAE KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/10, H01L23/498, H01L23/538, H10B80/00
CPC Code(s): H01L25/105
Abstract: a semiconductor package includes a package substrate. a first device is on the package substrate. a second device is on the package substrate and is horizontally spaced apart from the first device. the package substrate includes a core portion. a bridge chip is on a top surface of the core portion. the bridge chip has first pads. an upper buildup portion covers the top surface of the core portion and surrounds the bridge chip. the upper buildup portion has second pads. first solders couple the first device to the first pads and second solders couple the first device to the second pads. a first height of the first solders is less than a second height of the second solders. a first interval between adjacent first solders of the first solders is less than a second interval between adjacent second solders of the second solders.
Inventor(s): Sanghoon Lee of Suwon-si (KR) for samsung electronics co., ltd., Yeongbeom Ko of Suwon-si (KR) for samsung electronics co., ltd., Seokgeun Ahn of Suwon-si (KR) for samsung electronics co., ltd., Juhyeon Oh of Suwon-si (KR) for samsung electronics co., ltd., Gwangjae Jeon of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/18, H01L23/00, H01L23/31, H01L23/48
CPC Code(s): H01L25/18
Abstract: a semiconductor package includes a buffer die, a first core die stack stacked on the buffer die, the first core die stack including at least one first intermediate core and a first gap filling portion covering an outer surface of the at least one first intermediate core, and a second core die stack stacked on the first core die stack, the second core die stack including at least one second intermediate core and a second gap filling portion covering an outer surface of the at least one second intermediate core. the first gap filling portion and the second gap filling portion are directly bonded to each other.
20240421143. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Dongjoo CHOI of Seoul (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/18, H01L23/00, H01L23/31, H01L23/48, H01L23/498, H01L23/538
CPC Code(s): H01L25/18
Abstract: a semiconductor package includes an interposer substrate; an upper semiconductor chip on a top surface of the interposer substrate, such that a bottom surface of the upper semiconductor chip faces the top surface of the interposer substrate, a chip stack on a bottom surface of the interposer substrate and including a plurality of stacked lower semiconductor chips, wherein each of the lower semiconductor chips includes a plurality of through vias therein, wherein a top surface of the chip stack faces the bottom surface of the interposer substrate, a molding layer that covers a sidewall of the chip stack, a sidewall of the interposer substrate, and a sidewall of the upper semiconductor chip, and a plurality of connection terminals disposed below a bottom surface of the chip stack opposite the top surface of the chip stack, and coupled to the through vias. the upper semiconductor chip is electrically connected through the interposer substrate to the through vias.
20240421149. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jinwoo Jung of Suwon-si (KR) for samsung electronics co., ltd., Kyoungil Do of Suwon-si (KR) for samsung electronics co., ltd., Jooyoung Song of Suwon-si (KR) for samsung electronics co., ltd., Chanhee Jeon of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/02, H01L27/06, H01L29/06, H01L29/74
CPC Code(s): H01L27/0262
Abstract: a semiconductor device includes a substrate doped with first conductivity-type impurities, a first well doped with second conductivity-type impurities different from the first conductivity-type impurities, first active regions in the first well, the first active regions being doped with the first conductivity-type impurities and connected to a first pad through a first interconnection, second active regions outside the first well, the second active regions being doped with the second conductivity-type impurities and connected to a second pad through a second interconnection, third active regions around the first active regions in the first well and doped with the second conductivity-type impurities, and fourth active regions around the second active regions outside the first well and doped with the first conductivity-type impurities, wherein at least one of the third active regions and at least one of the fourth active regions are electrically connected to each other through a third interconnection.
Inventor(s): Jongjin Lee of Clifton Park NY (US) for samsung electronics co., ltd., Wonhyuk Hong of Clifton Park NY (US) for samsung electronics co., ltd., Tae Sun Kim of Ballston Spa NY (US) for samsung electronics co., ltd., Panjae Park of Clifton Park NY (US) for samsung electronics co., ltd., Kang-ill Seo of Springfield VA (US) for samsung electronics co., ltd.
IPC Code(s): H01L27/088, H01L21/8234, H01L23/528, H01L29/06, H01L29/08, H01L29/423, H01L29/66, H01L29/775, H01L29/786
CPC Code(s): H01L27/088
Abstract: integrated circuit devices and methods of forming the same are provided. the integrated circuit devices may include a transistor including first and second source/drain regions spaced apart from each other in a horizontal direction, a backside power distribution network structure (bspdns), a substrate between the first and second source/drain regions and the bspdns, a backside contact that is in the substrate and is overlapped by the first source/drain region, a placeholder that is in the substrate and is overlapped by the second source/drain region, and a cavity in the substrate between the backside contact and the placeholder.
20240421162. INTEGRATED CIRCUIT DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Minchul AHN of Suwon-si (KR) for samsung electronics co., ltd., Yeonggil KIM of Suwon-si (KR) for samsung electronics co., ltd., Sungbin PARK of Suwon-si (KR) for samsung electronics co., ltd., Deokyoung JUNG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/12
CPC Code(s): H01L27/124
Abstract: an integrated circuit device includes a backside insulating structure including an etch stop pattern, gate lines arranged over the backside insulating structure and each overlapping the etch stop pattern in a vertical direction, source/drain regions respectively arranged one-by-one between the gate lines, and a backside via contact passing through the etch stop pattern in the vertical direction and connected to a first source/drain region selected from the source/drain regions, wherein the backside via contact includes a stepped portion, which is apart from a first vertical level in the vertical direction by as much as a first distance and has a change in the width of the backside via contact in a horizontal direction at a second vertical level that is adjacent to the etch stop pattern, the first vertical level being closest to the plurality of gate lines in the backside insulating structure.
20240421167. IMAGE SENSOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Youngrae Kim of Suwon-si (KR) for samsung electronics co., ltd., SACHOUN PARK of Suwon-si (KR) for samsung electronics co., ltd., Daeuk Jung of Suwon-si (KR) for samsung electronics co., ltd., JEONGJIN CHO of Suwon-si (KR) for samsung electronics co., ltd., JUNGHYUNG PYO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H01L27/14612
Abstract: an image sensor includes a first substrate having a first side and a second side opposite each other, and including a pixel array region having plurality of active regions disposed at the first side, a shallow trench isolation structure disposed at the first side of the first substrate and isolating each of the plurality of active regions, a plurality of floating diffusion regions disposed at the plurality of active regions of the first substrate, and a floating diffusion region connector connecting the plurality of floating diffusion regions with each other. the floating diffusion region connector is buried in the shallow trench isolation structure and an upper surface of the floating diffusion region connector is lower than an upper surface of the shallow trench isolation structure.
20240421170. IMAGE SENSOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Haeyong PARK of YONGIN-SI (KR) for samsung electronics co., ltd., Sungsoo CHOI of SEONGNAM-SI (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/146, H10K39/32
CPC Code(s): H01L27/1463
Abstract: an image sensor includes a substrate having a plurality of pixel regions and a deep device isolation pattern disposed in the substrate between the pixel regions. the pixel regions include first, second, third, and fourth pixel regions, which are adjacent to each other in first and second directions. the deep device isolation pattern includes first portions interposed between the first and second pixel regions and between the third and fourth pixel regions and spaced apart from each other in the second direction, and second portions interposed between the first and third pixel regions and between the second and fourth pixel regions and spaced apart from each other in the first direction. the first pixel region includes a first extended active pattern, which is extended to the second pixel region in the first direction and is disposed between the first portions of the deep device isolation pattern.
20240421171. IMAGE SENSOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): TAESUB JUNG of HWASEONG-SI (KR) for samsung electronics co., ltd., KYUNGHO LEE of SUWON-SI (KR) for samsung electronics co., ltd., MASATO FUJITA of HWASEONG-SI (KR) for samsung electronics co., ltd., DOOSIK SEOL of SEOUL (KR) for samsung electronics co., ltd., KYUNGDUCK LEE of HWASEONG-SI (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/146, H01L27/148
CPC Code(s): H01L27/1463
Abstract: an image sensor is provided. the image sensor includes a first pixel region and a second pixel region located within a semiconductor substrate, a first isolation layer surrounding the first pixel region and the second pixel region, a second isolation layer located between the first pixel region and the second pixel region, and a microlens arranged on the first pixel region and the second pixel region. each of the first pixel region and the second pixel region include a photoelectric conversion device. the second isolation layer includes at least one first open region that exposes a portion of an area located between the first pixel region and the second pixel region.
Inventor(s): HYO KYOUNG KIM of Suwon-si (KR) for samsung electronics co., ltd., KI WON CHO of Suwon-si (KR) for samsung electronics co., ltd., DONG MIN SIM of Suwon-si (KR) for samsung electronics co., ltd., SEOK WON YOON of Suwon-si (KR) for samsung electronics co., ltd., CHUN HYUNG CHUNG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/06, H01L29/423, H01L29/66, H01L29/775, H01L29/786, H10B12/00
CPC Code(s): H01L29/0673
Abstract: provided is a semiconductor device. the semiconductor device includes a substrate including an element isolation layer defining a plurality of active areas, and a plurality of gate structures intersecting the active areas. each of the gate structures includes a gate insulating layer including a first region containing a first material and a second region containing a second material different from the first material on the active area, and a gate electrode layer on the gate insulating layer. a concentration of the second material in the first region is less than a concentration of the second material in the second region, and a thickness of the first region is less than a thickness of the second region.
Inventor(s): Beom Jin Park of Suwon-si (KR) for samsung electronics co., ltd., Myung Gil Kang of Suwon-si (KR) for samsung electronics co., ltd., Dong Won Kim of Suwon-si (KR) for samsung electronics co., ltd., Chang Woo Noh of Suwon-si (KR) for samsung electronics co., ltd., Yu Jin Jeon of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/06, H01L29/423, H01L29/66, H01L29/775, H01L29/786
CPC Code(s): H01L29/0673
Abstract: the present disclosure relates to semiconductor devices. an example semiconductor device includes a substrate including first and second regions, a first bridge pattern extending in a first direction on the first region, a first gate structure extending in a second direction intersecting the first direction, first epitaxial patterns connected to the first bridge pattern on side surfaces of the first gate structure, first inner spacers interposed between the substrate and the first bridge pattern and between the first gate structure and the first epitaxial patterns, a second bridge pattern extending in the first direction on the second region, a second gate structure extending in the second direction, second epitaxial patterns connected to the second bridge pattern on side surfaces of the second gate structure, and second inner spacers interposed between the substrate and the second bridge pattern and between the second gate structure and the second epitaxial patterns.
20240421190. SEMICONDUCTOR DEVICES_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Seong Heum Choi of Suwon-si (KR) for samsung electronics co., ltd., Gi Woong Shim of Suwon-si (KR) for samsung electronics co., ltd., Rak Hwan Kim of Suwon-si (KR) for samsung electronics co., ltd., Do Sun Lee of Suwon-si (KR) for samsung electronics co., ltd., Hyo Seok Choi of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/06, H01L23/532, H01L29/08, H01L29/423, H01L29/66, H01L29/775, H01L29/786
CPC Code(s): H01L29/0673
Abstract: a semiconductor device may include a substrate, an active pattern extending in a first horizontal direction on the substrate, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, a source/drain region on at least a first side of the gate electrode on the active pattern, and a source/drain contact connected to the source/drain region on the first side of the gate electrode. the source/drain contact may include first, second, and third layers which are sequentially stacked, the first to third layers including the same metal, with each layer having a respective crystal orientation. the source/drain contact may include a first grain boundary at an interface between the first layer and the second layer, and a second grain boundary at an interface between the second layer and the third layer.
20240421206. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Seonkyu Shin of Suwon-si (KR) for samsung electronics co., ltd., Yongjin Kim of Suwon-si, (KR) for samsung electronics co., ltd., Sanghoon Ahn of Suwon-si, (KR) for samsung electronics co., ltd., Minkyoung Lee of Suwon-si, (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/423, H01L29/06, H01L29/417, H01L29/66, H01L29/775, H01L29/786
CPC Code(s): H01L29/42392
Abstract: a semiconductor device includes an active pattern extending on a substrate in a first direction; first and second lower channel layers in a first region and a second region of the active pattern, respectively; first and second upper channel layers on the first and second lower channel layers, respectively; a first source/drain pattern connected to the first and second lower channel layers; an isolation insulating layer on surfaces of the first source/drain pattern in the second direction, where a thickness of opposing edge portions of the isolation insulating layer when viewed in cross section along the first direction is smaller than a thickness of a central portion therebetween; a second source/drain pattern connected to the first and second upper channel layers; and an interlayer insulating layer on the second source/drain patterns and on the isolation insulating layer.
20240421207. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jiho Yoo of Suwon-si (KR) for samsung electronics co., ltd., Kihyung Ko of Suwon-si (KR) for samsung electronics co., ltd., Jihoon Cha of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/423, H01L23/528, H01L29/06, H01L29/08, H01L29/66, H01L29/775, H01L29/786
CPC Code(s): H01L29/42392
Abstract: a semiconductor device includes a substrate insulating layer having a lower insulating pattern protruding from an upper surface of the substrate insulating layer and extending in a first direction; a semiconductor pattern extending on the lower insulating pattern of the substrate insulating layer in the first direction; a plurality of channel layers stacked on the semiconductor pattern and spaced apart from each other in a direction perpendicular to the upper surface of the substrate insulating layer; a gate structure intersecting the semiconductor pattern, extending in a second direction crossing the first direction, and surrounding the plurality of channel layers; first and second source/drain regions disposed on the semiconductor pattern on both sides of the gate structure; and an intermediate insulating pattern disposed between the lower insulating pattern and the semiconductor pattern and having a thickness equal to or less than a distance between the plurality of channel layers.
20240421212. SEMICONDUCTOR DEVICES_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Woo Seok Park of Suwon-si (KR) for samsung electronics co., ltd., Jae Ho Jeon of Suwon-si (KR) for samsung electronics co., ltd., Sung Gi Hur of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/66, H01L29/06
CPC Code(s): H01L29/66553
Abstract: there is provided a semiconductor device capable of improving element performance and reliability. the semiconductor device may include an active pattern that includes a lower pattern extending in a first direction on a substrate and a sheet pattern on the lower pattern, a field insulating layer that defines the active pattern on the substrate, a gate structure on the lower pattern and including a gate insulating layer and a gate electrode, the gate electrode extending in a second direction perpendicular to the first direction, a gate spacer at least partially surrounding the gate structure and including a first portion on a sidewall of the gate structure and a second portion on a bottom surface of the gate structure, and a source/drain pattern on the lower pattern and in contact with the sheet pattern.
Inventor(s): Sunggyu Han of Suwon-si (KR) for samsung electronics co., ltd., Heonjong Shin of Suwon-si (KR) for samsung electronics co., ltd., Juneyoung Park of Suwon-si (KR) for samsung electronics co., ltd., Sanghee Lee of Suwon-si (KR) for samsung electronics co., ltd., Jaeran Jang of Suwon-si (KR) for samsung electronics co., ltd., Mingi Chung of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/775, H01L27/088, H01L29/06, H01L29/08, H01L29/66
CPC Code(s): H01L29/775
Abstract: an integrated circuit semiconductor device includes a base layer including a first surface and a second surface, a gate structure on the first surface of the base layer, a first source and drain region on a side of the gate structure, a second source and drain region on another side of the gate structure, a first placeholder in the base layer in a lower portion of the first source and drain region and electrically connected to the first source and drain region, a second placeholder in the base layer in a lower portion of the second source and drain region, and a metal power rail on the first placeholder and the second placeholder on the second surface of the base layer and electrically connected to the first placeholder.
20240421223. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Joongchan SHIN of Suwon-si (KR) for samsung electronics co., ltd., Seokhan PARK of Suwon-si (KR) for samsung electronics co., ltd., Kiseok LEE of Suwon-si (KR) for samsung electronics co., ltd., Moonyoung JEONG of Suwon-si (KR) for samsung electronics co., ltd., Jinwoo HAN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/78, H10B12/00
CPC Code(s): H01L29/7827
Abstract: a semiconductor device includes a substrate, a bit line extending in a first direction on the substrate, a first active pattern and a second active pattern on the bit line, a back gate electrode extending in a second direction perpendicular to the first direction across the bit line, and a word line extending in the second direction, wherein the first active pattern and the second active pattern have a minor symmetrical shape with respect to the back gate electrode when viewed in a third direction perpendicular to the first direction and the second direction.
20240421232. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Suk YANG of Suwon-si (KR) for samsung electronics co., ltd., Sung-Hwan JANG of Suwon-si (KR) for samsung electronics co., ltd., Do Hee KIM of Suwon-si (KR) for samsung electronics co., ltd., Jin Bum KIM of Suwon-si (KR) for samsung electronics co., ltd., Sung Uk JANG of Suwon-si (KR) for samsung electronics co., ltd., Inhae ZOH of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/786, H01L29/06, H01L29/423, H01L29/66, H01L29/78
CPC Code(s): H01L29/78696
Abstract: a semiconductor device includes a lower pattern extending in a first direction, a plurality of wire patterns spaced apart from the lower pattern in a second direction on the lower pattern, and a gate electrode surrounding the plurality of wire patterns and extending in a third direction, on the lower pattern. each of the plurality of wire patterns includes a transition metal dichalcogenide (tmd) material. each of the plurality of wire patterns includes a pair of first areas protruding from sidewalls of the gate electrode in the first direction and a second area between the first areas. a phase of the first area is different from a phase of the second area.
Inventor(s): Saket CHADDA of San Jose CA (US) for samsung electronics co., ltd., Zhen CHEN of Dublin CA (US) for samsung electronics co., ltd.
IPC Code(s): H01L33/00, H01L21/02, H01L33/12, H01L33/32, H01L33/62
CPC Code(s): H01L33/007
Abstract: a structure includes a first material layer, a second material layer, and a dielectric masking layer having a thickness of 20 nm or less and containing pinholes having a width of 200 nm or less filled with the second material of second material layer located between the first material layer and the second material layer. a method of forming a led includes forming a buffer layer over a support substrate, forming a dielectric masking layer having a thickness of 20 nm or less and containing pinholes having a width of 200 nm or less on the semiconductor buffer layer, forming a n-doped semiconductor material layer on the dielectric masking layer such that the n-doped semiconductor material of the n-doped semiconductor layer fills the pinholes and contacts the buffer layer, forming an active region over the n-doped semiconductor material layer, and forming a p-doped semiconductor material layer over the active region.
20240421279. METHOD FOR REPAIRING DISPLAY MODULE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Changjoon LEE of Suwon-si (KR) for samsung electronics co., ltd., Kyungwoon Jang of Suwon-si (KR) for samsung electronics co., ltd., Yangsoo Son of Suwon-si (KR) for samsung electronics co., ltd., Jeongyun Kim of Suwon-si (KR) for samsung electronics co., ltd., Sungyong Min of Suwon-si (KR) for samsung electronics co., ltd., Daesuck Hwang of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L33/62, H01L25/16
CPC Code(s): H01L33/62
Abstract: a method for repairing a display module on which light emitting diodes are arranged, includes: removing a defective light emitting diode from among the light emitting diodes from the display module; forming an elastic conductive pad on a panel electrode of the display module that is exposed as the defective light emitting diode is removed; transferring a new light emitting diode to the display module for electrical connection to the elastic conductive pad; covering the new light emitting diode and the elastic conductive pad with a protective layer; and curing the protective layer to maintain an elastic bond between the new light emitting diode and the elastic conductive pad.
20240421484. ELECTRONIC DEVICE INCLUDING ANTENNA_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Seongjun SONG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01Q5/50, H01Q1/24, H01Q1/42, H01Q3/24
CPC Code(s): H01Q5/50
Abstract: an electronic device includes a housing including a first housing part and a second housing part, a first substrate disposed on the second housing part, a second substrate disposed on the first housing part, a third substrate electrically connecting the first substrate and the second substrate, at least one processor disposed on the first substrate, an rf transceiver disposed on the first substrate, a first coupler disposed on the first substrate and configured to provide a first coupling signal based on a first signal, and a second coupler disposed on the second substrate and configured to provide a second coupling signal based on a second signal.
Inventor(s): Kyunghwan LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H02J7/00
CPC Code(s): H02J7/00308
Abstract: an electronic device according to an embodiment may include: a battery, load, charging circuitry, and control circuitry. the charging circuitry may include a plurality of switches and be configured to, in a pps mode, receive power adjusted in each specified charging period according to a charge amount of the battery from an external electronic device, convert a voltage of the received power based on a specified voltage conversion ratio using the plurality of switches, and supply the voltage-converted power to the battery and the load. the control circuitry may be configured to: control a gate voltage of at least one specified switch of the plurality of switches, based on a voltage of the battery being higher than a maximum allowed charging voltage or a current of the battery being higher than a maximum allowed charging current during the pps mode.
Inventor(s): Minwoo Kim of Suwon-si (KR) for samsung electronics co., ltd., Hyungju Park of Suwon-si (KR) for samsung electronics co., ltd., Minyong Jung of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H02M3/158, H02M1/00
CPC Code(s): H02M3/1582
Abstract: an electronic circuit includes a buck-boost converter and controller. the converter includes an inductive element, a plurality of switches and a plurality of drivers therein, and is configured to generate an output voltage in response to an input voltage. the controller configured to: (i) generate a ramp signal having a reset timing that is delayed as the input voltage decreases, (ii) generate a sensing voltage having a magnitude that is a function of a magnitude of an inductor current in the inductive element, (iii) generate a feedback voltage having a magnitude that is a function of a magnitude of the output voltage, (iv) generate a compensation voltage in response to the feedback voltage and a reference voltage, and (v) uniformly maintain the compensation voltage based on the ramp signal and the sensing voltage, and independent of any change in the input voltage.
Inventor(s): Hyunseok CHOI of Gyeonggi-do (KR) for samsung electronics co., ltd., Jooseung KIM of Gyeonggi-do (KR) for samsung electronics co., ltd., Jihoon KIM of Gyeonggi-do (KR) for samsung electronics co., ltd., Hyoseok NA of Gyeonggi-do (KR) for samsung electronics co., ltd., Sanghun SIM of Gyeonggi-do (KR) for samsung electronics co., ltd., Namjun CHO of Gyeonggi-do (KR) for samsung electronics co., ltd.
IPC Code(s): H03F1/52, H02H3/087, H03F3/24
CPC Code(s): H03F1/52
Abstract: an electronic device and method thereof of are provided to prevent burnout due to overcurrent. an electronic device includes a power amplifier configured to amplify a transmission signal; a battery configured to provide a bias voltage to the at least one power amplifier; and an overcurrent protection circuit configured to prevent overcurrent from flowing through the power amplifier. the overcurrent protection circuit includes a configurer configured to configure a reference current value, based on the power amplifier; a measurer configured to measure a bias current value due to the bias voltage; a comparator configured to compare the measured bias current value with the reference current value; and a controller configured to recognize overcurrent flowing through the power amplifier and control provision of the bias voltage, based on a result of the comparison.
Inventor(s): Jungi JEONG of Suwon-si (KR) for samsung electronics co., ltd., Junhwa OH of Suwon-si (KR) for samsung electronics co., ltd., Sanghyuk WI of Suwon-si (KR) for samsung electronics co., ltd., Seungyoon LEE of Suwon-si (KR) for samsung electronics co., ltd., Yuntae PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04B5/43, H01Q1/24, H01Q3/44, H04B7/04, H04W16/28, H04W88/10
CPC Code(s): H04B5/43
Abstract: provided is a 5g or 6g communication system for supporting higher data rates after the 4g communication system such as lte.
Inventor(s): Jungi JEONG of Suwon-si (KR) for samsung electronics co., ltd., Junhwa OH of Suwon-si (KR) for samsung electronics co., ltd., Sanghyuk WI of Suwon-si (KR) for samsung electronics co., ltd., Seungyoon LEE of Suwon-si (KR) for samsung electronics co., ltd., Yuntae PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04B5/43, H01Q1/24, H01Q3/44, H04B7/04, H04W16/28, H04W88/10
CPC Code(s): H04B5/43
Abstract: according to the disclosure, a base station (bs) including a near field reflecting intelligent surface (ris) may include the near field ris including at least one meta surface which reflects an ris beam into a target area, a transceiver and a processor. the processor may be configured to identify an operation mode among a normal mode or an ris mode based on whether a target area is included in a reflecting beam coverage, and control the transceiver to transmit the ris beam onto the meta surface based on at least one of a type of the near field ris, configuration information of the near field ris or information about the target area, in response to the operation mode being identified as the ris mode.
Inventor(s): Thuy Van Nguyen of Plano TX (US) for samsung electronics co., ltd., Yang Li of Plano TX (US) for samsung electronics co., ltd., R A Nadisanka Perera Rupasinghe of McKinney TX (US) for samsung electronics co., ltd., Kyung-Joong Kim of Suwon (KR) for samsung electronics co., ltd.
IPC Code(s): H04B7/024, H04B7/06
CPC Code(s): H04B7/024
Abstract: a method of operating a network entity includes transmitting, via a first trp and a second trp, a first dl rs; receiving from a ue, based on the first dl rs, first csi; determining, based on the first csi, a calibrated quadrant; transmitting, via the first trp and the second trp, a second dl rs based on the calibrated quadrant; and receiving from the ue, based on the second dl rs, second csi. the method further includes, for n iterations, determining, based on the (n+1)th csi, an adjusted calibrated phase; transmitting, via the first trp and the second trp, an (n+2)th dl rs based on the adjusted calibrated phase; and receiving from the ue, based on the (n+2)th dl rs, (n+2)th csi. the method further includes, after the n iterations, determining, based on a most recently received (n+2)th csi, a converged calibrated phase.
Inventor(s): Md. Saifur Rahman of Plano TX (US) for samsung electronics co., ltd., Eko Onggosanusi of Coppell TX (US) for samsung electronics co., ltd.
IPC Code(s): H04B7/0456, H04B7/06
CPC Code(s): H04B7/0469
Abstract: methods and apparatuses for codebook based ul transmission are provided. a method for operating a ue comprises transmitting a ue capability information about a ul codebook for 8 antenna ports; receiving an indication indicating a tpmi for a transmission of a pusch; and transmitting the pusch based on the indicated tpmi, wherein the tpmi indicates a precoding matrix from the ul codebook for the 8 antenna ports, the ul codebook includes full-coherent (fc) precoding matrices comprising all non-zero entries, and an l-th column of a fc precoding matrix is associated with an l-th layer of the pusch transmission.
Inventor(s): Anil AGIWAL of Suwon-si (KR) for samsung electronics co., ltd., Soenghun KIM of Suwon-si (KR) for samsung electronics co., ltd., Mangesh Abhimanyu INGALE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04B7/06, H04W8/30, H04W36/00, H04W36/06, H04W36/08, H04W36/30, H04W48/16, H04W72/044, H04W74/0833, H04W76/11, H04W76/27, H04W84/04
CPC Code(s): H04B7/0695
Abstract: a system for converging fifth generation (5g) communication systems for supporting higher data rates beyond fourth generation (4g) systems with a technology for internet of things (iot) is provided. the communication method and system may be applied to intelligent services based on the 5g communication technology and the iot-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. a system is provided for determining system information validity by acquiring and storing a first system information block and other system information, including information on a public land mobile network (plmn) identity and a value tag, and determining whether the stored system information is valid for the cell. as another example, a terminal and base station are provided for performing beam failure detection and a recovery procedure using first and second configuration information for beam failure recovery (bfr) and if failure is detected, initiating a first random access (ra) procedure and if second configuration information is received while the first ra procedure is ongoing, terminating the first ra procedure and initiating a second ra procedure based on the second configuration information.
20240421889. CONFIGURATION OF QCL INFORMATION_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Md. Saifur Rahman of Plano TX (US) for samsung electronics co., ltd., Eko Onggosanusi of Coppell TX (US) for samsung electronics co., ltd., Gilwon Lee of McKinney TX (US) for samsung electronics co., ltd.
IPC Code(s): H04B7/06
CPC Code(s): H04B7/06968
Abstract: apparatuses and methods for configuring quasi co-location (qcl) information. a method performed by a user equipment includes receiving a configuration including information about (i) k>1 non-zero power (nzp) channel state information-reference signal (csi-rs) resources and (ii) quasi-co-location information (qcl-info) that is common for at least n out of the k nzp csi-rs resources, where 1<n≤k. the qcl-info indicates at least one source rs and a qcl-type. the qcl-type indicates at least one channel property of the at least one source rs. the method further includes, based on the configuration, applying the qcl-info for channel measurement via the n out of the k nzp csi-rs resources based on an assumption that at least one channel property of the n nzp csi-rs resources is same as the indicated at least one channel property of the at least one source rs.
Inventor(s): SOONWOO CHOI of Suwon-si (KR) for samsung electronics co., ltd., MINKI AHN of Suwon-si (KR) for samsung electronics co., ltd., JUNYOUNG JEONG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04L1/00, H03M13/39, H04L25/02, H04L27/38
CPC Code(s): H04L1/0045
Abstract: an apparatus for transmitting and receiving signal may include a transceiver configured to receive a reception signal through a channel and demodulate the reception signal into a reception symbol and a channel estimation value corresponding to the reception signal, and a demapper configured to detect a modulation type of the reception signal, calculate a first status data based on a first value obtained by zero-forcing the reception symbol and a second value obtained by squaring the channel estimation value, calculate a second status data based on the second value, and estimate bit information with respect to the reception symbol based on the modulation type, the first status data, and the second status data.
Inventor(s): Yaser Mohamed Mostafa Kamal FOUAD of San Diego CA (US) for samsung electronics co., ltd., Philippe Jean Marc Michel SARTORI of Naperville IL (US) for samsung electronics co., ltd.
IPC Code(s): H04L1/1867, H04L5/00, H04W88/04
CPC Code(s): H04L1/1896
Abstract: a system and a method are disclosed for relaying in wireless communications. in some embodiments, a method includes: receiving, by a first user equipment (ue), a single first transport block including a plurality of code block groups (cbgs); attempting to decode each of the cbgs, by the first ue; and signaling, to a second ue, by the first ue: a successful decoding of a first cbg; and a unsuccessful decoding of a second cbg.
Inventor(s): Hongbo Si of Allen TX (US) for samsung electronics co., ltd., Emad Nader Farag of Flanders NJ (US) for samsung electronics co., ltd., Carmela Cozzo of San Diego CA (US) for samsung electronics co., ltd., Kyeongin Jeong of Allen TX (US) for samsung electronics co., ltd., Shiyang Leng of Allen TX (US) for samsung electronics co., ltd., Anil Agiwal of Allen TX (US) for samsung electronics co., ltd.
IPC Code(s): H04L5/00, H04W72/40
CPC Code(s): H04L5/0007
Abstract: apparatuses and methods for flexible resource allocation for sidelink transmissions. a method of a user equipment (ue) in a wireless communication system includes receiving higher layer parameters including a bitmap; determining a first number s>1; and determining a sidelink resource pool based on the bitmap and the first number s, wherein bits in the bitmap indicate whether a group of s consecutive slots are included in the sidelink resource pool. the method further includes determining a second number l; determining l consecutive orthogonal frequency division multiplexing (ofdm) symbols within the s consecutive slots, wherein the l consecutive ofdm symbols are used for a physical sidelink shared channel (pssch) or a physical sidelink control channel (pscch); and receiving the pssch or the pscch.
Inventor(s): Euichang JUNG of Suwon-si (KR) for samsung electronics co., ltd., Youngrok JANG of Suwon-si (KR) for samsung electronics co., ltd., Suha YOON of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04L5/00, H04W72/0446, H04W72/51, H04W76/20, H04W80/02
CPC Code(s): H04L5/0051
Abstract: the disclosure relates to a 5generation (5g) or 6generation (6g) communication system for supporting higher data transmission rates, and discloses a method for transmitting a sounding reference signal (srs) in a wireless communication system are provided. the method includes receiving configuration information including a first configuration for srs resource sets, identifying, based on the first configuration, that a usage of the srs resource sets is configured to antenna switching, and transmitting the srs, based on x antennas among y reception antennas of an electronic device, wherein y is a natural number of 6 or larger, x is a natural number of y or smaller, and the number of the srs resource sets associated with the srs transmission may be determined based on whether capability information about the electronic device associated with the resource type of the srs is reported in the time domain.
Inventor(s): Taehyung LIM of Gyeonggi-do (KR) for samsung electronics co., ltd., Sooyeon JUNG of Gyeonggi-do (KR) for samsung electronics co., ltd., Inyoung SHIN of Gyeonggi-do (KR) for samsung electronics co., ltd., Duckey LEE of Gyeonggi-do (KR) for samsung electronics co., ltd., Hyewon LEE of Gyeonggi-do (KR) for samsung electronics co., ltd., Jonghyo LEE of Gyeonggi-do (KR) for samsung electronics co., ltd.
IPC Code(s): H04L9/08, H04L9/32
CPC Code(s): H04L9/085
Abstract: provided is a method of sharing a digital key between devices, and a method, performed by an owner device in a wireless communication system, including transmitting, to a friend device, key configuration data, receiving, from the friend device, certification information signed by a private key of the friend device, the certification information including a public key of the friend device, generating a key attestation based on the certification information and the key configuration data, and transmitting, to the friend device, information including the key attestation.
Inventor(s): Soheil Rostami of Carrollton TX (US) for samsung electronics co., ltd., Joonyoung Cho of Portland OR (US) for samsung electronics co., ltd., Heping Wan of Plano TX (US) for samsung electronics co., ltd.
IPC Code(s): H04L27/26, H04L25/03, H04W8/22
CPC Code(s): H04L27/263
Abstract: methods and apparatuses for ue initiated reporting in a wireless communication system. a method of operating a ue includes: transmitting ue capability information supporting a ftn; generating data modulation symbols including a set of zero symbols, wherein the data modulation symbols are up-sampled or zero-padded; performing, to obtain dft output signal, a dft spread operation on the up-sampled or the zero-padded data modulation symbols; performing, based on a target ftn compression rate and a sc allocation, a discarding or a down sampling operation on the dft output signal, wherein the discarding or the down sampling operation generates a subset of dft symbols; mapping the subset of dft symbols to a set of scs; and performing an ifft operation on the subset of dft symbols to obtain an ftn-dft-s-ofdm signal including the target ftn compression rate comprising a positive rational number smaller than one.
20240422055. TELECOMMUNICATION NETWORKS_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): David Gutierrez ESTEVEZ of Staines (GB) for samsung electronics co., ltd.
IPC Code(s): H04L41/0816, H04L41/0806, H04L41/16, H04W24/02, H04W88/08, H04W92/12
CPC Code(s): H04L41/0816
Abstract: the present disclosure relates to a method and system for converging a 5th-generation (5g) communication system for supporting higher data rates beyond a 4th-generation (4g) system with a technology for internet of things (iot). the system may be applied to intelligent services based on the 5g communication technology and the iot-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. the method includes a method for configuring a base station in a telecommunication network. the base station includes a central unit (cu) and a distributed unit (du). the cu is arranged to perform virtualized network functions (vnfs). the cu includes an artificial intelligence (ai) engine operable to learn from computational metrics and to adjust the configuration of various vnfs, wherein an f1 interface is used to exchange computational metrics between the cu and the du.
Inventor(s): Jiyong KIM of Seoul (KR) for samsung electronics co., ltd., Kwanghyun LEE of Hwaseong-si (KR) for samsung electronics co., ltd., Jaejin JUNG of Hwaseong-si (KR) for samsung electronics co., ltd., Wontak CHOI of Seoul (KR) for samsung electronics co., ltd., Yeeun HA of Hwaseong-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N23/67, H04N25/11
CPC Code(s): H04N23/67
Abstract: an image sensor, including a pixel array including a first unit pixel including first a plurality of photodiodes and a second unit pixel including a second plurality of diodes; a readout circuit configured to: obtain a reset signal from the first unit pixel and the second unit pixel, obtain a first single pixel signal from a first photodiode of the first unit pixel, and a second single pixel signal from a second photodiode of the second unit pixel, and obtain a first summed pixel signal from the first unit pixel, and a second summed pixel signal from the second unit pixel, wherein the first photodiode is disposed in position with respect to the first unit pixel which is different from a position of the second photodiode with respect to the second unit pixel.
Inventor(s): Gyu Beom IM of Suwon-si (KR) for samsung electronics co., ltd., Keun Joo PARK of Suwon-si (KR) for samsung electronics co., ltd., Jun Seok KIM of Suwon-si (KR) for samsung electronics co., ltd., Jun Hyuk PARK of Suwon-si (KR) for samsung electronics co., ltd., Bong Ki SON of Suwon-si (KR) for samsung electronics co., ltd., Ji Won IM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N25/47, H04N23/745
CPC Code(s): H04N25/47
Abstract: an image processing device is provided. the image processing device includes: a memory; a vision sensor; and at least one processor operatively connected to the memory and the vision sensor, wherein the at least one processor is configured to: receive an event signal from a pixel array of the vision sensor, accumulate the event signal during a preset time and store, in the memory, the event signal as accumulated event data; perform a pixel correction on the stored accumulated event data; and compare the corrected accumulated event data with the event signal to extract valid event data.
Inventor(s): Seok San KIM of Suwon-si (KR) for samsung electronics co., ltd., Min Woong SEO of Hwaseong-si (KR) for samsung electronics co., ltd., Ji-Youn SONG of Seoul (KR) for samsung electronics co., ltd., Hyun Yong JUNG of Seoul (KR) for samsung electronics co., ltd., Myung Lae CHU of Hwaseong-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N25/65, H04N25/75, H04N25/771
CPC Code(s): H04N25/65
Abstract: a unit pixel includes first and second photoelectric conversion units, a first transfer transistor disposed between the first photoelectric conversion unit and a first node, a first capacitor connected to the first node through a first switch transistor, and a second transfer transistor disposed between the second photoelectric conversion unit and the first node. a signal including a first voltage level is applied to the first transfer transistor and the second transfer transistor during a first time interval, a signal including a second voltage level is applied to the first transfer transistor, the second transfer transistor, and the first switch transistor during a second time interval, a signal including a third voltage level is applied to the first transfer transistor during a third time interval, and the signal including the first voltage level is applied to the second transfer transistor and the first switch transistor during a fourth time interval.
Inventor(s): MINWOO LEE of Suwon-si (KR) for samsung electronics co., ltd., MIN-SUN KEEL of Suwon-si (KR) for samsung electronics co., ltd., KYUNG-MIN KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N25/75, H04N25/76, H04N25/772
CPC Code(s): H04N25/75
Abstract: disclosed is an image sensor device which includes a first pixel located at a first row and a first column, corresponding to a first color filter, and outputting a first pixel signal through a first column line, a second pixel located at a second row different from the first row and the first column, corresponding to the first color filter, and outputting a second pixel signal through a second column line, and a conversion circuit receiving the first pixel signal through the first column line, receiving the second pixel signal through the second column line, and generating first image data and second image data based on the first pixel signal and the second pixel signal. the first pixel signal and the second pixel signal are respectively output through the first column line and the second column line simultaneously.
Inventor(s): Tamal DAS of Bangalore (IN) for samsung electronics co., ltd., Saikat HAZRA of Bangalore (IN) for samsung electronics co., ltd., Sanjeeb Kumar GHOSH of Bangalore (IN) for samsung electronics co., ltd.
IPC Code(s): H04Q11/04, H03K3/037, H04L25/49
CPC Code(s): H04Q11/0421
Abstract: various example embodiments herein provide methods, circuits, and systems, for controlling a multicycle path in a serializer interface. the method includes determining a desired delay window of a multicycle data path in a serializer interface by sampling at least one step response from serializer delay replica circuitry at an edge of a first clock signal and a gating signal, in response to synchronizing a second clock signal with a negative edge of the first clock signal, configuring a polarity of a latch in a subsequent serializer of a serializer chain based on the determined desired delay window, and controlling the multicycle data path in the serializer interface based on the configured polarity of the latch in the subsequent serializer of the serializer chain.
Inventor(s): Deepanshu GAUTAM of Bangalore (IN) for samsung electronics co., ltd.
IPC Code(s): H04W8/20, H04W4/12, H04W8/18
CPC Code(s): H04W8/20
Abstract: disclosed is a method performed by a mobile network service (mns) producer entity in a wireless communication system, including receiving, from an mns consumer entity, a first message indicating a subscription to receive a managed object instance (moi) related notification, identifying a conflict on an intent, and transmitting, to the mns consumer entity, a second message indicating a notification of the conflict on the intent based on an intent moi report.
Inventor(s): Mallikarjuna HAMPALI of Bangalore (IN) for samsung electronics co., ltd.
IPC Code(s): H04W8/20, H04W8/18
CPC Code(s): H04W8/205
Abstract: a method for transferring an embedded subscriber identity module (e-sim) profile from a first communication device to a second communication device. the method includes: receiving, at a server from the first communication device, an e-sim transfer request message including an e-sim identifier (eid) corresponding to each of the first communication device and the second communication device. the received e-sim transfer request message corresponds to a request for transferring the e-sim profile from the first communication device to the second communication device. the method also includes: performing a mapping process to map the e-sim profile associated with the eid of the first communication device with the eid of the second communication device based on the received e-sim transfer request message; and transmitting, to the second communication device, the e-sim profile that is mapped with the eid of the second communication device.
Inventor(s): Jieun JUNG of Suwon-si (KR) for samsung electronics co., ltd., Hyongjin BAN of Suwon-si (KR) for samsung electronics co., ltd., Jaehyeon SEO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W8/20
CPC Code(s): H04W8/205
Abstract: an electronic device is provided. the electronic device includes an embedded universal integrated circuit card (euicc), memory storing one or more computer programs, and one or more processors communicatively coupled to the euicc and the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the electronic device to based on identifying at least one user input causing transfer of a first profile stored in the euicc to an external electronic device, transmit a first message requesting the transfer of the first profile to the external electronic device, based on receiving a second message requesting deletion of the first profile corresponding to the first message, delete the first profile, transmit a third message indicating the deletion of the first profile to an subscription manager data preparation plus (sm-dp+) server, receive, from an entitlement server, a fourth message indicating that the first profile is completely ready in the sm-dp+ server receiving the third message, transmit a fifth message requesting profile download information to the entitlement server, based on the fourth message, receive a sixth message including the download information corresponding to the fifth message from the entitlement server, and provide the download information identified based on of the sixth message.
Inventor(s): Ashok Kumar NAYAK of Bangalore (IN) for samsung electronics co., ltd., Dongyeon KIM of Suwon-si (KR) for samsung electronics co., ltd., Jungshin PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W12/06, H04W60/06, H04W84/06
CPC Code(s): H04W12/06
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. embodiments herein provide a method for managing aerial information of an uuaa context in a wireless network () by a network device (). the method includes storing an uuaa mobility management (uuaa-mm) context or uuaa session management (uuaa-sm) context when an uav () is authenticated and authorized for an uncrewed aerial system (cas) service in the wireless network. further, the method includes detecting an event associated with an uav () in the wireless network. further, the method includes removing the stored uuaa-mm context or uuaa-sm context for the uas service for the uav () in response to detecting the event. further, the method includes transmitting a message to an uasnf device () to unsubscribe for the uas service for the uav or to remove the uuaa-mm context or uuaa-sm context stored at the uasnf device () for the cas service for the uav.
Inventor(s): Zhigang WANG of Beijing (CN) for samsung electronics co., ltd., Qixin HUANG of Beijing (CN) for samsung electronics co., ltd., Ranran ZHANG of Beijing (CN) for samsung electronics co., ltd., Ying ZHU of Beijing (CN) for samsung electronics co., ltd., Ying WANG of Beijing (CN) for samsung electronics co., ltd., Yan LI of Beijing (CN) for samsung electronics co., ltd., Ying LI of Beijing (CN) for samsung electronics co., ltd., Honghong LI of Beijing (CN) for samsung electronics co., ltd.
IPC Code(s): H04W24/02, H04B7/0413, H04L41/0823, H04L41/16, H04W28/16, H04W48/18
CPC Code(s): H04W24/02
Abstract: the present disclosure relates to a communication method and system for converging a 5th-generation (5g) communication system for supporting higher data rates beyond a 4th-generation (4g) system with a technology for internet of things (iot). the present disclosure may be applied to intelligent services based on the 5g communication technology and the iot-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. specifically, the present disclosure relates to an o-ran based network system.
Inventor(s): Donggun KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W24/04, H04B7/06, H04L5/00, H04W24/02, H04W52/02, H04W76/15
CPC Code(s): H04W24/04
Abstract: the present disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. according to an embodiment of the present disclosure, provided are a method and an apparatus for enabling a cell to be quickly activated in a next-generation mobile communication system.
Inventor(s): Qiongjie Lin of Sunnyvale CA (US) for samsung electronics co., ltd., Aristides Papasakellariou of Houston TX (US) for samsung electronics co., ltd., Hongbo Si of Allen TX (US) for samsung electronics co., ltd.
IPC Code(s): H04W24/08, H04L1/1607, H04L1/1812, H04L5/00, H04W72/0446, H04W72/23
CPC Code(s): H04W24/08
Abstract: methods and apparatus for physical downlink control channel (pdcch) reliability enhancements. a method includes receiving first information for a number of n>1 search space sets. for each of the n search space sets, the first information includes: an index, wherein search space sets are indexed in an ascending order of respective indexes, a periodicity, wherein the periodicity is same for all of the n search space sets, and an indication that the n search space sets are linked for receptions of pdcchs, wherein the pdcchs provide identical information. the method further includes determining a number of n pdcch reception occasions in m≥1 slots within a period according to the periodicity. a n-th pdcch reception occasion from the npdcch reception occasions is according to a n-th search space set from the n search space sets. the method further includes receiving n pdcchs in the n pdcch reception occasions.
Inventor(s): Dun YUAN of Montreal (CA) for samsung electronics co., ltd., Abu Zafar Ekram HOSSAIN of Winnipeg (CA) for samsung electronics co., ltd., Di WU of Laurent (CA) for samsung electronics co., ltd., Xue LIU of Montreal (CA) for samsung electronics co., ltd., Gregory Lewis DUDEK of Westmount (CA) for samsung electronics co., ltd.
IPC Code(s): H04W28/02, H04L43/0811, H04L43/0852, H04L47/80
CPC Code(s): H04W28/0236
Abstract: a method performed by an electronic device of a wireless communication system, includes: receiving, from a first user, points of a cloud related to an application; receiving, from a plurality of mobile edge computing (mec) servers, a plurality of computing capacities of the plurality of mec servers; estimating a total latency of the wireless communication system, based on the points of the cloud and the plurality of computing capacities; performing a first operation of minimizing a maximum latency among a plurality of users comprising the first user, based on the total latency; performing a second operation of minimizing a number of splits of the points, based on the minimized maximum latency; performing a splitting of the points to a plurality of subsets and allocating the plurality of subsets to the plurality of mec servers, respectively.
Inventor(s): Xiaoning MA of Beijing (CN) for samsung electronics co., ltd., Yu PAN of Beijing (CN) for samsung electronics co., ltd., Weiwei WANG of Beijing (CN) for samsung electronics co., ltd., Lixiang XU of Beijing (CN) for samsung electronics co., ltd., Hong WANG of Beijing (CN) for samsung electronics co., ltd.
IPC Code(s): H04W36/00, H04W36/24
CPC Code(s): H04W36/00833
Abstract: the disclosure relates to a method and device for self-optimization and self-configuration, and provides a method performed by a first node in a wireless communication system, including: acquiring, by the first node, first configuration information related to a successful handover report (shr); transmitting, by the first node, the first configuration information to a user equipment (ue).
Inventor(s): MHD Saria AL LAHHAM of Montreal (CA) for samsung electronics co., ltd., Di WU of Saint-Laurent (CA) for samsung electronics co., ltd., Abu Zafar Ekram HOSSAIN of Winnipeg (CA) for samsung electronics co., ltd., Xue LIU of Montreal (CA) for samsung electronics co., ltd., Gregory Lewis DUDEK of Westmount (CA) for samsung electronics co., ltd.
IPC Code(s): H04W36/30, H04B17/318, H04W36/06, H04W76/20
CPC Code(s): H04W36/304
Abstract: a method performed by an electronic device of a wireless communication system, includes: receiving channel qualities and movements reports from a plurality of user equipments; based on the channel qualities and the movements reports, determining whether a load balancing index (lbi) is lower than a predetermined threshold; based on identifying that the lbi is lower than the predetermined threshold, determining an assignment matrix between the plurality of ues and the plurality of operating bands by calculating minimized maximum band loads and minimized number of inter-frequency handovers (hos); and transmitting a message to a first ue of the plurality of ues, wherein the message indicates that the first ue is assigned to a first operating band of the plurality of the operating bands, based on the assignment matrix.
Inventor(s): Alexi Georgiev Jordanov of New Westminster (CA) for samsung electronics co., ltd., Erick Wong of Vancouver (CA) for samsung electronics co., ltd.
IPC Code(s): H04W40/02, G06N3/0442
CPC Code(s): H04W40/02
Abstract: in one embodiment, a method includes by one or more computing devices: receiving, from a wireless client device via wireless gateway devices, a data stream including data packets, where each data packet includes context data corresponding to a prior context of the wireless client device when sending the data packet, analyzing, using a machine-learning model, one or more transmission metrics based on the reception of the data packets from the wireless gateway devices and the context data of the data packets, and generating, using the machine-learning model, a wireless route policy to configure data transmission of the wireless client device based on the one or more transmission metrics and a current context of the wireless client device, where the wireless route policy specifies rules for sending data packets via wireless gateway devices based on the current context of the wireless client device.
Inventor(s): Youngkwon LEE of Suwon-si (KR) for samsung electronics co., ltd., Hyungjoon YU of Suwon-si (KR) for samsung electronics co., ltd., Sanghyun LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W48/16, H04W16/18
CPC Code(s): H04W48/16
Abstract: an electronic device and an electronic device operating method are provided. the electronic device includes a digitally compensated crystal oscillator (dcxo) generating a reference clock for generating a signal having a reference frequency, a transceiver for supporting auto frequency control (afc) performed so that the signal has a frequency of designated range, memory storing one or more computer programs; and one or more processors communicatively coupled to the dcxo, the transceiver, and the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the electronic device to control the transceiver to search for a base station included in a network to which the electronic device is to be connected by changing the frequency of the signal within the designated range, enter, based on a failure of the search for the base station, a mode for changing the designated range, change the size of the designated range, and search for the base station again based on a signal having a frequency of the changed range.
Inventor(s): Junliang LUO of Lasalle (CA) for samsung electronics co., ltd., Yi Tian Xu of Mont-Royal (CA) for samsung electronics co., ltd., Di Wu of Saint-Laurent (CA) for samsung electronics co., ltd., Xue Liu of Montreal (CA) for samsung electronics co., ltd., Gregory Lewis Dudek of Westmount (CA) for samsung electronics co., ltd.
IPC Code(s): H04W52/02, H04L41/16, H04W28/24
CPC Code(s): H04W52/0206
Abstract: a method performed by at least one processor of a network device in communication with a plurality of base stations, the method including: receiving historical data collected by one or more base stations from the plurality of base stations, the historical data indicating one or more of a power consumption, handover data, and quality of service (qos); generating, from the historical data, training data comprising a plurality of cell states and a corresponding random action for each cell state; and training one or more neural network estimators based on the training data, where the one or more neural network estimators comprise one or more of a power consumption estimator, a qos estimator, and a handover prediction estimator, and where each base station from the plurality of base stations is associated with a respective cell.
Inventor(s): Pavan Kumar DEVARAYANIGARI of Bangalore (IN) for samsung electronics co., ltd., Ramkumar Thirumalli SURESHSAH of Bangalore (IN) for samsung electronics co., ltd., Venkata Anil Kumar KARAMSETTI of Bangalore (IN) for samsung electronics co., ltd., Bharat Vinayak BHAT of Bangalore (IN) for samsung electronics co., ltd., Lalith KUMAR of Bangalore (IN) for samsung electronics co., ltd.
IPC Code(s): H04W68/02, H04L61/5076, H04L101/654, H04W4/14, H04W8/02, H04W60/04, H04W72/51, H04W76/38
CPC Code(s): H04W68/02
Abstract: a method for handling a service connection in a wireless communication system, including detecting, by a user equipment (ue), a mobility management (mm) service state of the ue is set to attempting to update, receiving, by the ue, a valid temporary mobile subscriber identity (tmsi) in a tmsi reallocation procedure from a base station via a radio resource control (rrc) connection, changing, by the ue, the mm service state to a normal service state in response to the receiving a valid tmsi and the detecting a mm service state, and sending, by the ue, a paging response message to the base station in response to the changing the mm service state and a paging indication message received from the base station to establish the service connection, the paging indication message including the valid tmsi.
Inventor(s): Myeongjin Kim of Seongnam-si (KR) for samsung electronics co., ltd., Wookbong Lee of San Jose CA (US) for samsung electronics co., ltd.
IPC Code(s): H04W72/0453, H04L5/00, H04W72/23, H04W74/04, H04W84/12
CPC Code(s): H04W72/0453
Abstract: a method of communicating, by a first device, with at least one second device in a wireless local area network (wlan) system includes allocating at least one resource unit (ru) within a bandwidth to a second device; generating at least one subfield defining the at least one ru; generating a trigger frame comprising a user information field comprising the at least one subfield, and transmitting a ppdu including the trigger frame to the at least one second device, wherein the generating comprises setting at least seven bits associated with the at least one ru and setting at least two bits as a value defining a subband that includes the at least one ru when the band width comprises at least four subbands.
Inventor(s): Seunghoon CHOI of Suwon-si (KR) for samsung electronics co., ltd., Youngbum KIM of Suwon-si (KR) for samsung electronics co., ltd., Hyunseok RYU of Suwon-si (KR) for samsung electronics co., ltd., Cheolkyu SHIN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W72/044, H04W88/08
CPC Code(s): H04W72/046
Abstract: the present disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. one embodiment of the present disclosure can provide a transmission/reception method and apparatus using a beam in an integrated access and backhaul (iab) node.
Inventor(s): Ebrahim MolavianJazi of San Jose CA (US) for samsung electronics co., ltd., Jeongho Jeon of San Jose CA (US) for samsung electronics co., ltd., Joonyoung Cho of Portland OR (US) for samsung electronics co., ltd., Aristides Papasakellariou of Houston TX (US) for samsung electronics co., ltd.
IPC Code(s): H04W72/1263, H04L1/1812, H04L1/1867, H04L27/26, H04W72/0446, H04W72/0453, H04W72/20
CPC Code(s): H04W72/1263
Abstract: methods and apparatuses for adaptive cross-carrier scheduling and flexible physical uplink control channel (pucch) groups. a method for receiving physical downlink control channels (pdcchs) or transmitting pucchs includes receiving first information for a first group of cells and for a second group of cells and receiving second information for activation of only one of the first group of cells and the second group of cells. the method also includes determining a group of cells to be activated based on the second information and receiving the pdcchs only on first cells from the activated group of cells or transmitting pucchs only on second cells from the activated group of cells.
Inventor(s): Youngrok JANG of Suwon-si (KR) for samsung electronics co., ltd., Junyung YI of Suwon-si (KR) for samsung electronics co., ltd., Seongmok LIM of Suwon-si (KR) for samsung electronics co., ltd., Hyunseok RYU of Suwon-si (KR) for samsung electronics co., ltd., Hyoungju JI of Suwon-si (KR) for samsung electronics co., ltd., Kyungjun CHOI of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W72/1268, H04L1/08, H04W52/14
CPC Code(s): H04W72/1268
Abstract: the present disclosure relates to a 5g or 6g communication system for supporting higher data transmission rates. the present disclosure relates to a method performed by a terminal in a wireless communication system, wherein the method may comprise the steps of: receiving scheduling information, for the repeated transmission of a physical uplink shared channel (pusch), from a base station through a first signal; setting a time period, in which a signal for transmit power control (tpc) can be received and applied, for each of one or more puschs scheduled through the first signal; and performing power control for the pusch transmissions corresponding to the set time periods on the basis of second signals received from a base station within the set time periods.
Inventor(s): Anil Agiwal of Allen TX (US) for samsung electronics co., ltd.
IPC Code(s): H04W72/231, H04B17/318, H04W52/36, H04W56/00, H04W74/0816
CPC Code(s): H04W72/231
Abstract: a user equipment (ue) includes a transceiver configured to receive a primary downlink control channel (pdcch) order for a layer1/layer2 triggered mobility (ltm) candidate cell. the ue further includes a processor operatively coupled to the transceiver. the processor is configured to determine, whether a transmission indicator in the pdcch order indicates an initial transmission or and initialize or increment a retransmission, a preamble_power_ramping_counter based on the determination.
Inventor(s): Rubayet Shafin of Frisco TX (US) for samsung electronics co., ltd., Boon Loong Ng of Plano TX (US) for samsung electronics co., ltd., Yue Qi of Plano TX (US) for samsung electronics co., ltd., Peshal Nayak of Plano TX (US) for samsung electronics co., ltd., Vishnu Vardhan Ratnam of Plano TX (US) for samsung electronics co., ltd., Elliot Jen of Taipei City (TW) for samsung electronics co., ltd.
IPC Code(s): H04W74/0816, H04W28/02, H04W74/08
CPC Code(s): H04W74/0816
Abstract: a first station (sta) device in a wireless network, the first sta device comprising a memory and a processor coupled to the memory, the processor is configured to obtain a transmission opportunity (txop) for transmission of a frame on a link, allocate a portion of the txop to a plurality of stas; transmit a trigger frame to the plurality of stas indicating allocation of the portion of txop; and receive a response frame from at least one sta acknowledging the allocation of the portion of the txop.
Inventor(s): Manasi EKKUNDI of Bangalore (IN) for samsung electronics co., ltd., Avneesh Tiwari of Bangalore (IN) for samsung electronics co., ltd., Neha Sharma of Bangalore (IN) for samsung electronics co., ltd., Dongmyoung Kim of Gyeonggi-do (KR) for samsung electronics co., ltd.
IPC Code(s): H04W76/10, H04W76/20, H04W92/20
CPC Code(s): H04W76/10
Abstract: methods and apparatuses are provided in which a message is received at a user equipment (ue) from one or more radio access network (ran) nodes. the ue determines presence of an information element (ie) in the message. the ue determines an interface protocol supported by each of the one or more ran nodes based on a value indicated in the ie. the ue establishes communication with a first ran node of the one or more ran nodes based on a priority associated with the interface protocol of the first ran node.
Inventor(s): Seungri JIN of Gyeonggi-do (KR) for samsung electronics co., ltd., Sangyeob JUNG of Gyeonggi-do (KR) for samsung electronics co., ltd.
IPC Code(s): H04W76/15, H04W88/06
CPC Code(s): H04W76/15
Abstract: the present disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. according to various embodiments of the present disclosure, user equipment, which supports a plurality of usims, may be supported so as to also perform an operation related to dual connectivity configured in one network while maintaining rrc connection establishment with two networks.
Inventor(s): Peshal Nayak of Plano TX (US) for samsung electronics co., ltd., Boon Loong Ng of Plano TX (US) for samsung electronics co., ltd., Vishnu Vardhan Ratnam of Plano TX (US) for samsung electronics co., ltd., Rubayet Shafin of Allen TX (US) for samsung electronics co., ltd., Yue Qi of Plano TX (US) for samsung electronics co., ltd., Elliot Jen of Taipei City (TW) for samsung electronics co., ltd.
IPC Code(s): H04W76/15, H04L1/1607, H04W60/04
CPC Code(s): H04W76/15
Abstract: a first device associated with a second device in a wireless network, the first device comprising: at least one station (sta) affiliated with the first device, a processor coupled to the at least one sta, the processor configured to establish one or more links between the first device and the second device, transmit one or more physical layer protocol data units (ppdus) comprising a plurality of frames to the second device, and receive a first frame from the second device that includes information on a second frame that is missing.
Inventor(s): Donggun KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W76/18, H04W76/19
CPC Code(s): H04W76/18
Abstract: the disclosure relates to a communication method and system for converging a 5th-generation (5g) communication system for supporting higher data rates beyond a 4th-generation (4g) system with a technology for internet of things (iot). the disclosure may be applied to intelligent services based on the 5g communication technology and the iot-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. the disclosure relates to a method and a device for quickly recovering a connection to a network in a next-generation mobile communication system when the connection to the network fails.
20240422853. BEAM INDICATION FOR FULL DUPLEX_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Emad Nader Farag of Flanders NJ (US) for samsung electronics co., ltd., Marian Rudolf of Longueuil (CA) for samsung electronics co., ltd., Eko Onggosanusi of Coppell TX (US) for samsung electronics co., ltd., Dalin Zhu of Allen TX (US) for samsung electronics co., ltd., Aristides Papasakellariou of Houston TX (US) for samsung electronics co., ltd.
IPC Code(s): H04W76/20, H04B7/06, H04W72/0446, H04W72/1268, H04W72/231
CPC Code(s): H04W76/20
Abstract: methods and apparatuses for beam indication for full duplex. a method of operating a user equipment (ue) includes receiving first and second information that includes first and second transmission configuration indicator (tci) state configurations associated with first and second subsets of slots or symbols, respectively, on a cell and receiving a downlink control information (dci) format that includes a first or second tci state code point from the first or second tci state configuration. the method further includes determining, based on whether a slot or symbol is from the first or second subset, the first or second tci state code point and receiving, based on the determination, a shared data or control channel or signal using the first or second tci state code point. the first subset does not include time-domain resources indicated for simultaneous transmission and reception on the cell and the second subset does.
Inventor(s): Hyeongyo JEONG of Suwon-si (KR) for samsung electronics co., ltd., Gyeongsik KIM of Suwon-si (KR) for samsung electronics co., ltd., Jaesun SHIM of Suwon-si (KR) for samsung electronics co., ltd., Junbeom LEE of Suwon-si (KR) for samsung electronics co., ltd., Taehoon LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W76/20, H04M15/00, H04W72/044
CPC Code(s): H04W76/20
Abstract: a user plane entity of a wireless communication system including the user plane entity and a control plane entity according to an embodiment may comprise: a at least one processor, comprising processing circuitry, individually and/or collectively, is configured to: detect whether a session message, which has been transmitted to the control plane entity by the user plane entity, for the volume quota allocation of a resource of the user plane entity is lost; generate a session message, including an arbitrary usage report, based on the session message being detected as being lost; and a communication interface, comprising communication circuitry, is configured to transmit the session message including the usage report to the control plane entity to attempt volume quota allocation.
Inventor(s): Dohyeong PARK of Suwon-si (KR) for samsung electronics co., ltd., Junghoon PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H05K1/14, H05K1/18, H05K5/00
CPC Code(s): H05K1/144
Abstract: according to an embodiment, an electronic device includes a first printed circuit board and a second printed circuit board, facing the first printed circuit board, disposed over the first printed circuit board. the electronic device includes a first support member disposed on a first surface of the first printed circuit board. the electronic device includes a second support member, disposed on a second surface of the second printed circuit board, facing the first printed circuit board and configured to come into contact with the first support member by an external force applied to the electronic device. the electronic device includes an interposer between the first printed circuit board and the second printed circuit board, surrounding an area between the first surface and the second surface.
Inventor(s): Seongjin KIM of Suwon-si (KR) for samsung electronics co., ltd., Minseok PARK of Suwon-si (KR) for samsung electronics co., ltd., Gabseong LEE of Suwon-si (KR) for samsung electronics co., ltd., Hyungsok YEO of Suwon-si (KR) for samsung electronics co., ltd., Igor IVANOV of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H05K5/02
CPC Code(s): H05K5/0217
Abstract: an electronic device includes a display area having a variable size by sliding of a slidable housing, and a sliding assembly which is connected to the housing. the sliding assembly includes sliding guides slidable relative to each other and together with each other, each sliding guide including an elastic member which provides an elastic force to the sliding guide along a sliding direction of the housing. at least one of the sliding guides is connected to a first housing and at least one of the sliding guides is connected to a second housing slidable relative to the first housing.
Inventor(s): Nakhyun CHOI of Suwon-si (KR) for samsung electronics co., ltd., Hyunsuk KIM of Suwon-si (KR) for samsung electronics co., ltd., Sanghyuk PARK of Suwon-si (KR) for samsung electronics co., ltd., Soohyun SEO of Suwon-si (KR) for samsung electronics co., ltd., Wonho LEE of Suwon-si (KR) for samsung electronics co., ltd., Joongyeon CHO of Suwon-si (KR) for samsung electronics co., ltd., Junghyeob LEE of Suwon-si (KR) for samsung electronics co., ltd., Hyunju HONG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H05K5/02, H02K7/116, H05K5/00, H05K7/14
CPC Code(s): H05K5/0217
Abstract: an electronic device is provided. the electronic device includes a first housing, a second housing slidably connected to the first housing, a rollable display disposed to be supported by the first housing and the second housing and having a display area contracted or expanded based on a slide-in state or a slide-out state of the second housing, a support member disposed on the rear surface of the rollable display to support at least a portion of the rollable display, a first printed circuit board disposed in the first housing, a second printed circuit board disposed in the second housing, a flexible printed circuit board configured to connect the first printed circuit board and the second printed circuit board and configured to be folded or unfolded based on the slide-in state or slide-out state of the second housing, a drive motor disposed in the first housing, electrically connected to the first printed circuit board and configured to provide a driving force to drive the second housing, a battery disposed in the first housing and configured to supply power to the drive motor, a pinion gear disposed in the first housing and configured to transmit power based on the driving force of the drive motor, and a rack gear disposed in the second housing to be engaged with the pinion gear.
Inventor(s): Yeonggyu YOON of Suwon-si (KR) for samsung electronics co., ltd., Youngmin KANG of Suwon-si (KR) for samsung electronics co., ltd., Moonchul SHIN of Suwon-si (KR) for samsung electronics co., ltd., Joongyeon CHO of Suwon-si (KR) for samsung electronics co., ltd., Junyoung CHOI of Suwon-si (KR) for samsung electronics co., ltd., Byounguk YOON of Suwon-si (KR) for samsung electronics co., ltd., Junghyeob LEE of Suwon-si (KR) for samsung electronics co., ltd., Sunggun CHO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H05K5/02
CPC Code(s): H05K5/0217
Abstract: an electronic device, according to various embodiments of the present disclosure, comprises: a second housing; a first housing which slidingly moves with respect to the second housing; a display which comprises a first display area and a second display area extending from the first display area, and which has at least a portion of the second display area move on the basis of the sliding movement of the first housing; a motor which is disposed in the second housing and provides a driving force for the sliding movement of the first housing; and a gear structure which transfers the driving force provided from the motor to the first housing. the gear structure comprises: a first gear unit which is connected to the motor; a second gear unit which is connected to the first gear unit; a third gear unit which is connected to or disconnected from the second gear unit; and a rack gear which is disposed in the first housing and is connected to the third gear unit.
Inventor(s): Jaehyun BAE of Suwon-si (KR) for samsung electronics co., ltd., Youngmin MOON of Suwon-si (KR) for samsung electronics co., ltd., Changsu LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H05K5/03
CPC Code(s): H05K5/03
Abstract: a display device is provided. the display device includes a display panel, and a window which is disposed on the display panel and in which a bending region that can be bent and a flat region that is kept flat are defined, wherein the window includes a base layer, and a first coating layer which is disposed on one surface of the base layer and includes a plurality of coating portions each having a different hardness, and wherein the thickness of the first coating layer disposed on the flat region may be thicker than that of the first coating layer disposed on the bending region.
Inventor(s): Bongkyu MIN of Suwon-si (KR) for samsung electronics co., ltd., Taewoo KIM of Suwon-si (KR) for samsung electronics co., ltd., Jinyong PARK of Suwon-si (KR) for samsung electronics co., ltd., Hyelim YUN of Suwon-si (KR) for samsung electronics co., ltd., Hyeongju LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H05K9/00, H05K1/02, H05K1/14
CPC Code(s): H05K9/0024
Abstract: an electronic device is provided. the electronic device includes a first printed circuit board (pcb) including a main hole, a second pcb inserted into the main hole and enclosed by the first pcb, a bridge pcb configured to connect the first pcb and the second pcb and disposed so as to overlap the first pcb and the second pcb, the bridge pcb including a bridge hole, an application processor disposed on the second pcb, inserted into the bridge hole, and enclosed by the bridge pcb, and a main shield connected to the bridge pcb and configured to cover the application processor.
20240422961. SEMICONDUCTOR MEMORY DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Joongchan SHIN of Suwon-si (KR) for samsung electronics co., ltd., Seokhan PARK of Suwon-si (KR) for samsung electronics co., ltd., Kiseok LEE of Suwon-si (KR) for samsung electronics co., ltd., Moonyoung JEONG of Suwon-si (KR) for samsung electronics co., ltd., Jinwoo HAN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/315
Abstract: a semiconductor memory device includes a plurality of word lines extending in a first horizontal direction, a plurality of back gate lines extending in the first horizontal direction and alternately arranged with the plurality of word lines in a second horizontal direction different from the first horizontal direction, a plurality of channel layers extending in a vertical direction between a word line and a back gate line adjacent to each other among the plurality of word lines and the plurality of back gate lines, to correspond to columns in the first horizontal direction, a plurality of bit lines extending in the second horizontal direction on the plurality of word lines, the plurality of back gate lines, and the plurality of channel layers and electrically connected to the plurality of channel layers, and a plurality of memory structures electrically connected to the plurality of channel layers.
20240422963. SEMICONDUCTOR MEMORY DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): KYO-SUK CHAE of Suwon-si (KR) for samsung electronics co., ltd., Tai Uk Rim of Suwon-si (KR) for samsung electronics co., ltd., Jin-seong Lee of Suwon-si (KR) for samsung electronics co., ltd., Hee Jae Choi of Suwon-si (KR) for samsung electronics co., ltd., Jung-Hoon Han of Suwon-si (KR) for samsung electronics co., ltd., Byung Ha Kang of Suwon-si (KR) for samsung electronics co., ltd., Gyu Taek Shin of Suwon-si (KR) for samsung electronics co., ltd., Shin Woo Jeong of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/34
Abstract: a semiconductor memory device includes a substrate including a device isolation film defining active regions; and cell gate structures in trenches, including first areas and second areas, the cell gate structures extending to intersect the active regions, each of the cell gate structures includes a cell gate insulating layer, extending along inner sidewalls of the trenches, a first gate dielectric film, on sidewalls of the cell gate insulating layer, in a first area of the trench, a second gate dielectric film, on the sidewalls of the cell gate insulating layer, in a second area of the trench, and a cell gate electrode structure, including a first gate electrode layer on sidewalls of the first gate dielectric film and a second gate electrode layer on sidewalls of the second gate dielectric film in the second area.
20240422964. SEMICONDUCTOR MEMORY DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Kyunghwan LEE of Suwon-si (KR) for samsung electronics co., ltd., Wonsok LEE of Suwon-si (KR) for samsung electronics co., ltd., Juho LEE of Suwon-si (KR) for samsung electronics co., ltd., Daewon HA of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B12/00, H01L29/10
CPC Code(s): H10B12/488
Abstract: a semiconductor memory device includes a memory cell array having a three-dimensional structure, the memory cell array including a plurality of memory cells repeatedly arranged in a first lateral direction, a second lateral direction, and a vertical direction, wherein the first lateral direction and the second lateral direction are perpendicular to each other, and the vertical direction is perpendicular to each of the first lateral direction and the second lateral direction, wherein each of the plurality of memory cells includes two transistors including at a least portions of two word lines passing through the memory cell in the vertical direction and at least portions of two bit lines respectively on both sides of the two word lines in the first lateral direction, each of the two bit line extending along the second lateral direction, and each of the plurality of memory cells does not include a capacitor.
Inventor(s): Yanghee Lee of Suwon-si (KR) for samsung electronics co., ltd., Jonghyuk Park of Suwon-si (KR) for samsung electronics co., ltd., Hyesung Park of Suwon-si (KR) for samsung electronics co., ltd., Seungji Kang of Suwon-si (KR) for samsung electronics co., ltd., Seongeun Kim of Suwon-si (KR) for samsung electronics co., ltd., Dongwon Lee of Suwon-si (KR) for samsung electronics co., ltd., Juyeon Han of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B12/00, H01L23/528
CPC Code(s): H10B12/50
Abstract: an integrated circuit device includes a substrate having a memory cell area and a peripheral circuit area extending around the memory cell area, cell transistors in the memory cell area, and a peripheral circuit transistor in the peripheral circuit area. the device further includes: a capacitor structure including lower electrodes on the cell transistors, a dielectric layer on a surface of the lower electrodes, an upper material layer on the dielectric layer, and a metal plate layer on the upper material layer; an interlayer insulating layer on the metal plate layer in the memory cell area and on the peripheral circuit transistor in the peripheral circuit area; and an etch stop pattern in the interlayer insulating layer at a boundary portion of the memory cell area and the peripheral circuit area. the etch stop pattern is spaced laterally from a sidewall of the metal plate layer and extends vertically.
Inventor(s): Seulji SONG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B43/20, H10B41/10, H10B41/20, H10B43/10
CPC Code(s): H10B43/20
Abstract: a 3d vertical memory device includes a substrate and an electrode structure extending in a vertical direction on the substrate. the electrode structure has a shape of a first cylinder and includes a first electrode and a switching material layer. a gate stack structure includes a gate electrode and an interlayer insulating layer alternately stacked on the substrate along a sidewall of the electrode structure. the gate electrode is electrically connected to the switching material layer. the electrode structure is arranged in a two-dimensional array structure on a plane perpendicular to the vertical direction, and constitutes a plurality of lines extending in a first direction. the electrode structures of two lines adjacent to each other in a second direction are arranged in a zigzag manner. a partition wall pillar having a shape of a second cylinder is arranged between the electrode structures adjacent to each other in the first direction.
Inventor(s): Kwangyoung Jung of Suwon-si (KR) for samsung electronics co., ltd., Sunil Shim of Suwon-si (KR) for samsung electronics co., ltd., Seung-Jun Lee of Suwon-si (KR) for samsung electronics co., ltd., Joohyun Lim of Suwon-si (KR) for samsung electronics co., ltd., Yoojin Jeon of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B43/27, H10B43/40
CPC Code(s): H10B43/27
Abstract: a three-dimensional semiconductor memory device may include a peripheral circuit structure on a peripheral substrate, a cell array structure on the peripheral circuit structure, the cell array structure including a cell array region and an outer region, a source structure on the cell array region, a base pattern on the outer region, a cell vertical structure that extends into the cell array structure in the cell array region and is electrically connected to the source structure, an outer vertical structure that extends into the cell array structure in the outer region, and a filling pattern that extends from the outer vertical structure and into the base pattern. the filling pattern defines a void, a top end of the cell vertical structure extends from the peripheral substrate by a first distance, and a top surface of the source structure extends from the peripheral substrate by a second distance.
Inventor(s): Dongyoung KIM of Suwon-si (KR) for samsung electronics co., ltd., Jinhyun KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B43/27, G11C16/04, H01L25/065, H10B41/10, H10B41/27, H10B41/35, H10B43/10, H10B43/35, H10B80/00
CPC Code(s): H10B43/27
Abstract: a semiconductor device including gate electrodes stacked and spaced apart from each other in a first direction, extending by different lengths in a second direction on the second region, and each including a pad region having an upper surface exposed upwardly in the second region and a stack region other than the pad region, the gate electrodes including a first gate electrode and a second gate electrode below the first gate electrode, a first contact plug insulating layer on interlayer insulating layers in the pad region of the first gate electrode, surrounding a gate contact plug, and vertically overlapping the first gate electrode, second contact plug insulating layers alternating with the interlayer insulating layers below the pad region of the first gate electrode and surrounding the gate contact plug may be provided.
Inventor(s): Kohji Kanamori of Suwon-si (KR) for samsung electronics co., ltd., Seo-Goo Kang of Suwon-si (KR) for samsung electronics co., ltd., Seunghyun Lee of Suwon-si (KR) for samsung electronics co., ltd., Jeehoon Han of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B43/35, H01L23/522, H01L23/528, H01L25/065, H10B43/10, H10B43/27, H10B43/40, H10B80/00
CPC Code(s): H10B43/35
Abstract: a semiconductor device and an electronic system are provided. the semiconductor device may include a substrate including a cell array region and a connection region, a stacked structure including conductive patterns stacked on the substrate, an inner supporter that extends into the stacked structure in the connection region, a contact plug that extends into a portion of the stacked structure and electrically connected to one of the conductive patterns and at least partially extends around the inner supporter in plan view, an insulating spacer between the contact plug and the stacked structure and at least partially extends around the contact plug, and outer supporters spaced apart from the contact plug in the connection region and extending into the stacked structure.
20240422987. SEMICONDUCTOR MEMORY DEVICES_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Kyung Hwan Lee of Suwon-si (KR) for samsung electronics co., ltd., Myung Hun Woo of Suwon-si (KR) for samsung electronics co., ltd., Dae Won Ha of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B51/30, H10B51/40
CPC Code(s): H10B51/30
Abstract: there is provided a semiconductor memory device comprising: a first word line; a second word line spaced apart from the first word line, a back gate electrode between the first word line and the second word line; a first channel pattern between the first word line and the back gate electrode; a second channel pattern between the second word line and the back gate electrode; a first gate insulating film between the first word line and the first channel pattern; a second gate insulating film between the second word line and the second channel pattern; a first bit line on the first channel pattern and the second channel pattern, wherein the first bit line is connected to the first channel pattern; and a second bit line on the first channel pattern and the second channel pattern, wherein the second bit line is connected to the second channel pattern.
Inventor(s): Youngsun Song of Suwon-si (KR) for samsung electronics co., ltd., Seulji Song of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B63/00, G11C13/00, H10N70/00
CPC Code(s): H10B63/24
Abstract: a vertical memory device includes a memory cell structure extending primarily in a vertical direction. a resistive layer is electrically connected to a first end of the memory cell structure. a selector is electrically connected to a second end of the memory cell structure and includes a variable resistive material of which an electrical resistive value is reversibly changed in response to an electrical signal. a first bit line is located apart from the memory cell structure in the vertical direction with the resistive layer disposed therebetween and is connected to the resistive layer. a second bit line is located apart from the memory cell structure in the vertical direction with the selector disposed therebetween and is connected to the selector. a plurality of word line plates are spaced apart from each other in the vertical direction and overlapping each other in the vertical direction. each word line plate at least partially surrounds a portion of a sidewall of the memory cell structure.
20240422994. SEMICONDUCTOR MEMORY DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Youngsun Song of Suwon-si (KR) for samsung electronics co., ltd., Seulji Song of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B63/00
CPC Code(s): H10B63/845
Abstract: a semiconductor memory device includes a first source line extending in a first horizontal direction, a second source line extending on the first source line in the first horizontal direction, a plurality of word line plates arranged apart from each other in a vertical direction, between the first source line and the second source line, a vertical bit line configured to penetrate the plurality of word line plates and extending in the vertical direction, a selector arranged between the plurality of word line plates and the vertical bit line, a first vertical channel transistor arranged between the vertical bit line and the first source line, and a second vertical channel transistor arranged between the vertical bit line and the second source line.
Inventor(s): Bon Jae Koo of Suwon-si (KR) for samsung electronics co., ltd., Seul Ji Song of Suwon-si (KR) for samsung electronics co., ltd., Hwa Yeong Lee of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B99/00
CPC Code(s): H10B99/10
Abstract: a nonvolatile memory device may include a substrate, a plurality of gate electrodes stacked on the substrate, a first conductive pillar that extends in a first direction and intersects the gate electrodes, a second conductive pillar that extends in the first direction and intersects the gate electrodes, the second conductive pillar being spaced apart from the first conductive pillar, an information storage film between the first conductive pillar and each of the gate electrodes and between the second conductive pillar and each of the gate electrodes, the information storage film including chalcogenide, a conductive layer spaced apart from the gate electrodes in the first direction, a first charge dissipation layer between the first conductive pillar and the conductive layer, and a second charge dissipation layer between the second conductive pillar and the conductive layer, the second charge dissipation layer being spaced apart from the first charge dissipation layer.
Inventor(s): Yongkoo HER of Suwon-si (KR) for samsung electronics co., ltd., Nari KIM of Suwon-si (KR) for samsung electronics co., ltd., Jaewook PARK of Suwon-si (KR) for samsung electronics co., ltd., Eungyeong LEE of Suwon-si (KR) for samsung electronics co., ltd., Jungwoon SHIN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10K59/80, H10K59/35
CPC Code(s): H10K59/8792
Abstract: a display is provided. according to an embodiment, the display includes a substrate, a light emitting layer disposed on the substrate and including a plurality of first light emitting elements, and at least one second light emitting element, a plurality of first transmission members disposed on each of the plurality of first light emitting elements and configured to refract a first light from each of the plurality of first light emitting elements, at least one second transmission member disposed on the at least one second light emitting element and configured to transmit a second light from the at least one second light emitting element, and a blocking member including opaque material and contacting the at least one second transmission member, wherein a shape of the at least one second transmission member is different from a shape of each of the plurality of first transmission members.
20240423097. MAGNETIC MEMORY DEVICES_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): JeongMok KIM of Suwon-si (KR) for samsung electronics co., ltd., Juhyun KIM of Suwon-si (KR) for samsung electronics co., ltd., Se Chung OH of Suwon-si (KR) for samsung electronics co., ltd., Junho Jeong of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10N50/20, H10B61/00, H10N50/01, H10N50/85
CPC Code(s): H10N50/20
Abstract: a memory device comprising a reference magnetic pattern and a free magnetic pattern sequentially stacked on a substrate; and a tunnel barrier pattern between the reference magnetic pattern and the free magnetic pattern, wherein the reference magnetic pattern includes: a first pinning pattern; a second pinning pattern between the first pinning pattern and the tunnel barrier pattern; and an exchange coupling pattern between the first pinning pattern and the second pinning pattern, the exchange coupling pattern antiferromagnetically coupling the first pinning pattern and the second pinning pattern, wherein the first pinning pattern includes: a first magnetic pattern; and a second magnetic pattern between the first magnetic pattern and the exchange coupling pattern, the first magnetic pattern is a single layer including an alloy of a first ferromagnetic element and a first non-magnetic metal element, and wherein the second magnetic pattern is a single layer including a second ferromagnetic element.
Inventor(s): Dae Yun KIM of Suwon-si (KR) for samsung electronics co., ltd., Dae Seok HAN of Suwon-si (KR) for samsung electronics co., ltd., Kyung Mee SONG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10N60/12, G06N10/40, H01P7/08, H10N60/82, H10N60/85
CPC Code(s): H10N60/12
Abstract: a superconducting qubit-based device includes: a superconducting qubit comprising a first conductive pad and a second conductive pad, each being formed of a superconducting material, and a ferromagnetic body configured to form a josephson junction with the first conductive pad and the second conductive pad; a conducting wire spaced apart from the ferromagnetic body by a predetermined distance; and a control circuit configured to control a resonance frequency of the superconducting qubit by controlling a current flowing through the conducting wire.
Samsung Electronics Co., Ltd. patent applications on December 19th, 2024
- Samsung Electronics Co., Ltd.
- A47L9/28
- A47L9/00
- G01K7/22
- G01R15/04
- G01R19/165
- G01R19/22
- H02H5/04
- CPC A47L9/2889
- Samsung electronics co., ltd.
- A61B5/1455
- A61B5/00
- A61B5/145
- G04G21/02
- H01S5/00
- H01S5/125
- CPC A61B5/1455
- A61B5/263
- A61B5/256
- H01B5/14
- CPC A61B5/263
- A61B5/0205
- CPC A61B5/681
- A61H3/00
- CPC A61H3/00
- A63B24/00
- CPC A63B24/0021
- B25J15/00
- H01L21/687
- CPC B25J15/0019
- C02F9/00
- B01D15/36
- B01D61/02
- B01D61/08
- B01D61/14
- B01D63/02
- B08B3/02
- B08B3/14
- B08B13/00
- C02F1/28
- C02F1/42
- C02F1/44
- C02F103/04
- C02F103/34
- H01L21/67
- CPC C02F9/00
- C09G1/02
- CPC C09G1/02
- D06F34/18
- D06F34/04
- D06F58/38
- D06F58/46
- CPC D06F34/18
- D06F39/10
- D06F37/20
- D06F39/08
- D06F39/12
- CPC D06F39/10
- F24F11/42
- CPC F24F11/42
- G01D5/24
- E05B65/00
- E05F15/611
- CPC G01D5/24
- G01N21/47
- H01L21/66
- G01N21/17
- CPC G01N21/4788
- F21V8/00
- G02B1/04
- G02B27/01
- CPC G02B6/0055
- G02B6/124
- G02B6/12
- G02B6/293
- G02B6/42
- G02B6/43
- CPC G02B6/124
- G02B27/64
- G03B5/00
- G03B30/00
- H02K41/035
- H04N23/68
- CPC G02B27/646
- G02F1/29
- H01S5/042
- CPC G02F1/292
- G03F7/16
- B65D41/04
- B65D47/06
- CPC G03F7/16
- G03F7/00
- G03F1/36
- CPC G03F7/70441
- G04C10/04
- G04G17/04
- H01Q1/27
- CPC G04C10/04
- G06F1/16
- H05K5/02
- H05K7/16
- CPC G06F1/1624
- H01L25/16
- H01L33/14
- H01L33/50
- CPC G06F1/1652
- G06F3/0488
- CPC G06F3/0488
- G06F3/06
- G06F13/38
- CPC G06F3/0655
- CPC G06F3/0685
- G06F3/16
- G06F3/01
- CPC G06F3/165
- G06F3/00
- G06F18/20
- G06V40/16
- G10L17/18
- G10L17/22
- CPC G06F3/167
- G06F9/30
- G06F9/50
- G06F12/06
- G06F13/16
- G06F15/78
- H03K19/173
- CPC G06F9/3001
- G06F9/38
- G06F13/42
- CPC G06F9/3842
- G06F11/07
- G06F12/10
- CPC G06F11/0793
- G06F12/02
- G06F21/44
- CPC G06F12/0246
- G06F12/084
- CPC G06F12/084
- CPC G06F13/1668
- G06F15/80
- CPC G06F15/8061
- G06F30/3953
- CPC G06F30/3953
- G06K19/077
- CPC G06K19/07732
- G06N3/08
- G06N3/049
- G06N3/06
- G06N5/04
- CPC G06N3/08
- G06N3/082
- G06N3/04
- CPC G06N3/082
- G06N20/00
- CPC G06N20/00
- G06Q20/40
- G06Q20/32
- H04N23/69
- CPC G06Q20/40145
- G06T5/70
- A61B5/024
- A61B5/11
- G06T5/20
- G06T5/60
- G06T7/00
- G06T7/246
- G06T7/73
- G06V10/776
- CPC G06T5/70
- G06T7/11
- G06T7/90
- G06T17/00
- G06V10/44
- CPC G06T7/246
- G06T7/70
- CPC G06T7/70
- G06T11/60
- CPC G06T11/60
- G06T15/20
- G06T7/62
- G06T19/00
- CPC G06T15/20
- G06V10/28
- G06F18/214
- G06F18/24
- G06T3/4046
- G06V20/10
- CPC G06V10/28
- G06V10/762
- G06T3/18
- G06V10/764
- G06V10/771
- CPC G06V10/762
- G06V10/98
- G06V10/82
- CPC G06V10/993
- G06V20/52
- G06T3/40
- CPC G06V20/52
- G09G3/00
- G06F3/0482
- G06F3/0484
- G06V30/19
- CPC G09G3/035
- H04N23/745
- G09G5/14
- H04B10/114
- CPC G09G5/14
- G10L21/0232
- G06N20/10
- G10L21/0208
- H04R3/04
- CPC G10L21/0232
- G11C11/4076
- G11C7/22
- G11C11/409
- CPC G11C11/4076
- G11C11/408
- CPC G11C11/4085
- G11C16/10
- G11C16/04
- G11C16/08
- G11C16/34
- CPC G11C16/107
- G11C29/52
- G11C29/50
- CPC G11C29/52
- G16C20/30
- G16C20/70
- CPC G16C20/30
- H01J37/32
- CPC H01J37/32669
- H01L21/3105
- H01L21/3115
- H01L21/768
- H01L23/528
- H01L29/40
- CPC H01L21/31053
- H01L21/56
- CPC H01L21/67126
- H01L21/78
- H01L23/00
- CPC H01L21/78
- H01L23/18
- H01L23/498
- H01L25/065
- H01L25/18
- CPC H01L23/18
- H01L23/24
- CPC H01L23/24
- H01L23/31
- H01L23/538
- H01L25/00
- CPC H01L23/3121
- H01L23/48
- CPC H01L23/3128
- CPC H01L23/3178
- H01L23/42
- H01L23/15
- CPC H01L23/42
- H10B80/00
- CPC H01L23/481
- CPC H01L23/49816
- CPC H01L23/49822
- H01L21/48
- H01L23/13
- H01L23/14
- H01L25/10
- CPC H01L23/49833
- H01L23/522
- H01L27/02
- H01L27/06
- CPC H01L23/5223
- H01L23/532
- H01L29/06
- H01L29/423
- H01L29/775
- H01L29/786
- CPC H01L23/5226
- CPC H01L23/5283
- H10B63/00
- H10N70/00
- H01L29/417
- H01L23/535
- CPC H01L23/535
- CPC H01L23/5383
- H01L23/544
- CPC H01L23/544
- CPC H01L25/0655
- CPC H01L25/0657
- CPC H01L25/105
- CPC H01L25/18
- H01L29/74
- CPC H01L27/0262
- H01L27/088
- H01L21/8234
- H01L29/08
- H01L29/66
- CPC H01L27/088
- H01L27/12
- CPC H01L27/124
- H01L27/146
- CPC H01L27/14612
- H10K39/32
- CPC H01L27/1463
- H01L27/148
- H10B12/00
- CPC H01L29/0673
- CPC H01L29/42392
- CPC H01L29/66553
- CPC H01L29/775
- H01L29/78
- CPC H01L29/7827
- CPC H01L29/78696
- H01L33/00
- H01L21/02
- H01L33/12
- H01L33/32
- H01L33/62
- CPC H01L33/007
- CPC H01L33/62
- H01Q5/50
- H01Q1/24
- H01Q1/42
- H01Q3/24
- CPC H01Q5/50
- H02J7/00
- CPC H02J7/00308
- H02M3/158
- H02M1/00
- CPC H02M3/1582
- H03F1/52
- H02H3/087
- H03F3/24
- CPC H03F1/52
- H04B5/43
- H01Q3/44
- H04B7/04
- H04W16/28
- H04W88/10
- CPC H04B5/43
- H04B7/024
- H04B7/06
- CPC H04B7/024
- H04B7/0456
- CPC H04B7/0469
- H04W8/30
- H04W36/00
- H04W36/06
- H04W36/08
- H04W36/30
- H04W48/16
- H04W72/044
- H04W74/0833
- H04W76/11
- H04W76/27
- H04W84/04
- CPC H04B7/0695
- CPC H04B7/06968
- H04L1/00
- H03M13/39
- H04L25/02
- H04L27/38
- CPC H04L1/0045
- H04L1/1867
- H04L5/00
- H04W88/04
- CPC H04L1/1896
- H04W72/40
- CPC H04L5/0007
- H04W72/0446
- H04W72/51
- H04W76/20
- H04W80/02
- CPC H04L5/0051
- H04L9/08
- H04L9/32
- CPC H04L9/085
- H04L27/26
- H04L25/03
- H04W8/22
- CPC H04L27/263
- H04L41/0816
- H04L41/0806
- H04L41/16
- H04W24/02
- H04W88/08
- H04W92/12
- CPC H04L41/0816
- H04N23/67
- H04N25/11
- CPC H04N23/67
- H04N25/47
- CPC H04N25/47
- H04N25/65
- H04N25/75
- H04N25/771
- CPC H04N25/65
- H04N25/76
- H04N25/772
- CPC H04N25/75
- H04Q11/04
- H03K3/037
- H04L25/49
- CPC H04Q11/0421
- H04W8/20
- H04W4/12
- H04W8/18
- CPC H04W8/20
- CPC H04W8/205
- H04W12/06
- H04W60/06
- H04W84/06
- CPC H04W12/06
- H04B7/0413
- H04L41/0823
- H04W28/16
- H04W48/18
- CPC H04W24/02
- H04W24/04
- H04W52/02
- H04W76/15
- CPC H04W24/04
- H04W24/08
- H04L1/1607
- H04L1/1812
- H04W72/23
- CPC H04W24/08
- H04W28/02
- H04L43/0811
- H04L43/0852
- H04L47/80
- CPC H04W28/0236
- H04W36/24
- CPC H04W36/00833
- H04B17/318
- CPC H04W36/304
- H04W40/02
- G06N3/0442
- CPC H04W40/02
- H04W16/18
- CPC H04W48/16
- H04W28/24
- CPC H04W52/0206
- H04W68/02
- H04L61/5076
- H04L101/654
- H04W4/14
- H04W8/02
- H04W60/04
- H04W76/38
- CPC H04W68/02
- H04W72/0453
- H04W74/04
- H04W84/12
- CPC H04W72/0453
- CPC H04W72/046
- H04W72/1263
- H04W72/20
- CPC H04W72/1263
- H04W72/1268
- H04L1/08
- H04W52/14
- CPC H04W72/1268
- H04W72/231
- H04W52/36
- H04W56/00
- H04W74/0816
- CPC H04W72/231
- H04W74/08
- CPC H04W74/0816
- H04W76/10
- H04W92/20
- CPC H04W76/10
- H04W88/06
- CPC H04W76/15
- H04W76/18
- H04W76/19
- CPC H04W76/18
- CPC H04W76/20
- H04M15/00
- H05K1/14
- H05K1/18
- H05K5/00
- CPC H05K1/144
- CPC H05K5/0217
- H02K7/116
- H05K7/14
- H05K5/03
- CPC H05K5/03
- H05K9/00
- H05K1/02
- CPC H05K9/0024
- CPC H10B12/315
- CPC H10B12/34
- H01L29/10
- CPC H10B12/488
- CPC H10B12/50
- H10B43/20
- H10B41/10
- H10B41/20
- H10B43/10
- CPC H10B43/20
- H10B43/27
- H10B43/40
- CPC H10B43/27
- H10B41/27
- H10B41/35
- H10B43/35
- CPC H10B43/35
- H10B51/30
- H10B51/40
- CPC H10B51/30
- G11C13/00
- CPC H10B63/24
- CPC H10B63/845
- H10B99/00
- CPC H10B99/10
- H10K59/80
- H10K59/35
- CPC H10K59/8792
- H10N50/20
- H10B61/00
- H10N50/01
- H10N50/85
- CPC H10N50/20
- H10N60/12
- G06N10/40
- H01P7/08
- H10N60/82
- H10N60/85
- CPC H10N60/12
