Samsung Electronics Co., Ltd. patent applications on August 1st, 2024
Patent Applications by Samsung Electronics Co., Ltd. on August 1st, 2024
Samsung Electronics Co., Ltd.: 183 patent applications
Samsung Electronics Co., Ltd. has applied for patents in the areas of H01L23/00 (13), H01L29/423 (11), H01L25/065 (11), H01L29/66 (8), H01L27/146 (7) H01L25/0657 (5), H01L23/481 (3), G06T5/50 (2), H04N25/78 (2), G11C7/222 (2)
With keywords such as: layer, device, data, including, semiconductor, based, image, configured, substrate, and memory in patent application abstracts.
Patent Applications by Samsung Electronics Co., Ltd.
Inventor(s): Hyunsu HONG of Suwon-si (KR) for samsung electronics co., ltd., Sangbeom NAM of Suwon-si (KR) for samsung electronics co., ltd., Yongjin LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): A61B5/16, A61B5/00, A61B5/11, G08B21/18
CPC Code(s): A61B5/165
Abstract: an electronic device for providing biometric information is provided. the electronic device includes a sensor module, a memory, and a processor electrically connected to the sensor module and the memory. the processor obtains a biometric signal from the sensor module at a predetermined time interval, determines whether a user is in a first state on the basis of the obtained biometric signal, in case the user is in a first state, obtains a representative value for a respective of the at least one biometric signal, defines the obtained representative value for the respective of the at least one biometric signal as a candidate reference value for a corresponding biometric signal, determines a candidate reference value satisfying a predetermined condition as a first reference value for the corresponding biometric signal, and updates a second reference value previously configured for the corresponding biometric signal on the basis of the first reference value.
Inventor(s): Kuemjong BAE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): A61H3/00, A61H1/02
CPC Code(s): A61H3/00
Abstract: an exercise assistance apparatus may include: a proximal support for supporting a proximal part of a user; a distal support for supporting a distal part (e.g., thigh or arm) of the user; and actuator that is connected to the proximal support and generates power; an upper frame connected to the actuator; a lower frame connected to the distal support; a base link connected to a first of the upper frame or the lower frame; a frame link which is connected to the other of the upper frame or the lower frame and detachably connected to the base link, and can rotate about the base link; and a magnet that is connected to the base link and exerts magnetic force to the frame link.
Inventor(s): Daehyun KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): A61H3/00, A63B24/00
CPC Code(s): A61H3/00
Abstract: a method of controlling a wearable device may include: determining whether a walking state of a user of the wearable device is a normal state based on test movement information of the user obtained through test walking; when the walking state is not the normal state, determining first correction torque information based on the test movement information; and outputting a first correction torque corresponding to the first correction torque information through at least one of a drive module or an additional drive module.
Inventor(s): Changhwan Kim of Suwon-si (KR) for samsung electronics co., ltd., Takafumi Noguchi of Yokohama-shi (JP) for samsung electronics co., ltd., Toshihiro Iizuka of Yokohama-shi (JP) for samsung electronics co., ltd., Kenichi Nagayama of Yokohama-shi (JP) for samsung electronics co., ltd.
IPC Code(s): B22F3/14, G01N29/14
CPC Code(s): B22F3/14
Abstract: in a manufacturing method for a sintered body, a mold device including a die, first and second punches, first and second spacers, first and second rams, and a plurality of thermal resistors is used. the manufacturing method includes an operation of loading raw material powder into a cavity of the die and then sintering the raw material powder, while pressing and molding the raw material powder in the uniaxial direction using the first and second punches, to form a sintered body and an operation of cooling the formed sintered body. in the operation of cooling the formed sintered body, an acoustic emission (ae) waveform is detected from the formed sintered body, and it is determined whether a crack has occurred in the formed sintered body using the detected ae waveform.
20240253899. TRANSFER DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jeong Jae BANG of Suwon-si (KR) for samsung electronics co., ltd., Sang June BAE of Suwon-si (KR) for samsung electronics co., ltd., Dong Hun SEO of Suwon-si (KR) for samsung electronics co., ltd., Hyung Sik UM of Suwon-si (KR) for samsung electronics co., ltd., Jun Kyu LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): B65G1/04
CPC Code(s): B65G1/0457
Abstract: an overhead hoist transport (oht) device is provided. the oht device comprises a plate including a front bolt groove and a rear bolt groove which are extended and opened in a first direction, and a transport unit including a front body and a rear body, placed on the plate, wherein the transport unit comprises a front neck connector disposed on an upper face of the front bolt groove, a rear neck connector disposed on an upper face of the rear bolt groove, a front traveling wheel placed on both sides of the front body, a rear traveling wheel placed on both sides of the rear body, a front position movement drive unit which is connected to the front neck connector by a first connecting bolt passing through the front bolt groove and a rear position movement drive unit which is connected to the rear neck connector by a second connecting bolt passing through the rear bolt groove, and has the same structure as the front position movement drive unit, wherein the front position movement drive unit and the rear position movement drive unit adjust a placement state of the transport unit on the plate, depending on a load distribution state of the front traveling wheel and the rear traveling wheel.
Inventor(s): Sangkyung LEE of Suwon-si (KR) for samsung electronics co., ltd., Seunggyu KANG of Suwon-si (KR) for samsung electronics co., ltd., Hyunjae KANG of Suwon-si (KR) for samsung electronics co., ltd., Youngwook KIM of Suwon-si (KR) for samsung electronics co., ltd., Jaesung BYUN of Suwon-si (KR) for samsung electronics co., ltd., Yongjun AHN of Suwon-si (KR) for samsung electronics co., ltd., Minkyun LEE of Suwon-si (KR) for samsung electronics co., ltd., Hyunwoo LEE of Suwon-si (KR) for samsung electronics co., ltd., Jeonghun LIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): B65G1/04, B65G1/137
CPC Code(s): B65G1/0464
Abstract: an article transfer and storage apparatus includes a travel rail that includes a plurality of first rails extending in a first direction and spaced apart from each other in a second direction perpendicular to the first direction and a plurality of second rails extending in the second direction and spaced apart from each other in the first direction, a plurality of power transmission rails disposed above the travel rail, extending in the first direction, and spaced apart from each other in the second direction, a transfer robot that is configured to move on the travel rail in the first direction and the second direction to convey an article, the transfer robot including a battery charged by power provided from the plurality of power transmission rails, and storage shelves disposed below the travel rail.
Inventor(s): Yuho WON of Seoul (KR) for samsung electronics co., ltd., Sung Woo KIM of Hwaseong-si (KR) for samsung electronics co., ltd., Jin A KIM of Suwon-si (KR) for samsung electronics co., ltd., Jeong Hee LEE of Seongnam-si (KR) for samsung electronics co., ltd., Tae Hyung KIM of Seoul (KR) for samsung electronics co., ltd., Eun Joo JANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): C09K11/88, B82Y20/00, B82Y40/00, C09K11/02, H05B33/14, H10K50/115, H10K50/15, H10K50/16, H10K50/17
CPC Code(s): C09K11/883
Abstract: a quantum dot including: a core including a first semiconductor nanocrystal material including zinc, tellurium, and selenium; and a semiconductor nanocrystal shell disposed on the core, the semiconductor nanocrystal shell including zinc, selenium, and sulfur, wherein the quantum dot does not include cadmium, and in the quantum dot, a mole ratio of the sulfur with respect to the selenium is less than or equal to about 2.4:1. a production method of the quantum dot and an electronic device including the same are also disclosed.
20240254623. VAPOR SUPPLY APPARATUS_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Changhwan Kim of Suwon-si (KR) for samsung electronics co., ltd., Takafumi Noguchi of Yokohama-shi (JP) for samsung electronics co., ltd., Toshihiro Iizuka of Yokohama-shi (JP) for samsung electronics co., ltd., Kenichi Nagayama of Yokohama-shi (JP) for samsung electronics co., ltd.
IPC Code(s): C23C16/448, C23C16/455
CPC Code(s): C23C16/448
Abstract: a vapor supply apparatus is described. the apparatus stably supplies vapor to a process chamber when the vapor pressure of the material is lower than the process pressure. the apparatus includes a supply container accommodating a solid or a liquid having a vapor pressure which is lower than the process pressure. the vapor may be generated in the supply container from a liquid or from a solid. a buffer tank is interposed between the supply container and the process chamber and into which the vapor from the container is introduced by reducing pressure. the apparatus includes a mechanism for pressurizing the buffer tank and pressure-feeding the vapor to the process chamber.
Inventor(s): Jeongwon HAHN of Suwon-si (KR) for samsung electronics co., ltd., Romon SON of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): D06F34/04, D06F33/32, D06F33/47, D06F34/05, D06F34/24, D06F34/28, D06F37/42, D06F101/20, D06F103/16, D06F105/00, D06F105/58, G06Q50/10, G08B5/22, H04L12/28, H04L67/12, H04L67/306, H04M1/72403, H04Q9/00
CPC Code(s): D06F34/04
Abstract: a washing machine includes communicator, a display, a sensor for detecting a water temperature of residual water of the washing machine, and a processor. when the water temperature is equal to or lower than a first temperature, the processor is configured to receive data regarding a temperature of an area where the washing machine is located from an application server. the processor is configured to transmit the received data regarding the temperature to a data server so that the received data regarding the temperature is transmitted to a user terminal device. when the water temperature is equal to or lower than a temperature that is lower than the first temperature, the processor is configured to display a notification regarding freezing of the washing machine. the processor is configured to transmit the notification to the application server so that the notification is transmitted to the user terminal device.
20240254676. CLOTHES TREATMENT APPARATUS_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Geonhui JO of Suwon-si (KR) for samsung electronics co., ltd., Byeongwoo KIM of Suwon-si (KR) for samsung electronics co., ltd., Doyun LEE of Suwon-si (KR) for samsung electronics co., ltd., Kwangmin CHUN of Suwon-si (KR) for samsung electronics co., ltd., Jonghun SUNG of Suwon-si (KR) for samsung electronics co., ltd., Youngchul JO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): D06F39/02, D06F23/04, D06F39/12
CPC Code(s): D06F39/02
Abstract: disclosed herein is a clothes treatment apparatus according to an embodiment including a cabinet, a tub disposed in the cabinet, and a detergent supply device configured to supply detergent into the tub, wherein the detergent supply device includes a housing, a detergent container provided in the housing to accommodate detergent, a water supply guide configured to guide water from a water supply source to the inside of the housing, and a partition configured to cover a portion of the detergent container to prevent water supplied into the housing by the water supply guide from flowing to an upper side of the detergent container.
20240254677. WASHING MACHINE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Kwangmin CHUN of Suwon-si (KR) for samsung electronics co., ltd., Geonhui JO of Suwon-si (KR) for samsung electronics co., ltd., Bongjin KO of Suwon-si (KR) for samsung electronics co., ltd., Byeongwoo KIM of Suwon-si (KR) for samsung electronics co., ltd., Yonggyun YIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): D06F39/02
CPC Code(s): D06F39/022
Abstract: provided is a washing machine including: a housing; a tub disposed inside the housing; and a detergent supply configured to supply detergent to the tub. the detergent supply includes: a case mounted on the housing; a detergent box configured to be movable in a mounting direction to be mounted on the case and in a separating direction to be separated from the case; a push connection configured to press onto the detergent box in the separating direction; and an electric motor configured to operate the push connection. the push connection is configured to be rotatable between a first position in which the push connection is coupled to the detergent box to support the detergent box in the mounting direction and a second position b in which the push connection is released from the detergent box to release the supporting of the detergent box in the mounting position.
20240255213. REFRIGERATOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Gahyeong KIM of Suwon-si (KR) for samsung electronics co., ltd., Juno Kwon of Suwon-si (KR) for samsung electronics co., ltd., Joonho Park of Suwon-si (KR) for samsung electronics co., ltd., Sangmin Park of Suwon-si (KR) for samsung electronics co., ltd., Jin Jeong of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): F25D23/12, F25D23/02, F25D23/04
CPC Code(s): F25D23/126
Abstract: a refrigerator includes: a main body comprising a storage room; a door rotatably coupled to the main body and configured to open or close the storage room; and a water supply device on a rear surface of the door. the water supply device includes: a water supply case comprising a bucket installation space; a water level sensor configured to detect a water level of a water bucket in the bucket installation space; a first water supply port configured to supply water to the water bucket based on the water level of the water bucket that is detected by the water level sensor; a lever in the water supply case and configured to be manually operable; and a second water supply port configured to supply water based on operation of the lever by a user.
Inventor(s): Changi Jeon of Suwon-si (KR) for samsung electronics co., ltd., Younghoon Sohn of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G01B11/06, G01B11/24, G01B15/04
CPC Code(s): G01B11/06
Abstract: provided is a complex sensing device including a thickness sensing device including pulse generating device configured to generate a probe pulse and a pump pulse, a first optical splitter configured to split the probe pulse and direct the pump pulse to a surface of a sample and generate an acoustic signal in the sample, a detector configured to receive a reflection probe pulse generated by the probe pulse being reflected from the sample, a first processor configured to receive and process a first signal from the detector, and a second optical splitter on a path of the reflection probe pulse from the sample to the detector, the second optical splitter being configured to split the reflection probe pulse, and a surface shape sensing device configured to receive a split probe pulse split from the first optical splitter and a split reflection probe pulse split from the second optical splitter, and measure a surface shape of the sample based on a phase difference between the split probe pulse and the split reflection probe pulse.
Inventor(s): Sangmin LEE of Suwon-si (KR) for samsung electronics co., ltd., Sungyong BANG of Suwon-si (KR) for samsung electronics co., ltd., Sunghun JUNG of Suwon-si (KR) for samsung electronics co., ltd., Jongwoo KIM of Suwon-si (KR) for samsung electronics co., ltd., Hakryoul KIM of Suwon-si (KR) for samsung electronics co., ltd., Mooyoung KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G01K7/42
CPC Code(s): G01K7/42
Abstract: according to an embodiment, an electronic device includes: at least one first component and at least one second component arranged in an internal space of the electronic device wherein the first and second components have temperatures that vary differently depending on the operation of the electronic device, a first temperature sensor configured to measure the temperature of the at least one first component, a second temperature sensor configured to measure the temperature of the at least one second component, a memory, and at least one processor operatively connected to the at least one first component, the at least one second component, the first temperature sensor, the second temperature sensor, and the memory, wherein at least one processor is configured to: identify a prediction model related to prediction of the outside temperature stored in the memory, acquire a first temperature of the at least one first component through the first temperature sensor according to a specified period, acquire a second temperature of the at least one second component through the second temperature sensor according to a specified period, and predict the outside temperature corresponding to the acquired first temperature and the acquired second temperature based on the identified prediction model.
Inventor(s): Heeyoon Han of Suwon-si (KR) for samsung electronics co., ltd., Donghoon Kim of Suwon-si (KR) for samsung electronics co., ltd., Sungyoon Ryu of Suwon-si (KR) for samsung electronics co., ltd., Younghoon Sohn of Suwon-si (KR) for samsung electronics co., ltd., Sunhong Jun of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G01N21/95, G01N21/31, G06N20/00
CPC Code(s): G01N21/9501
Abstract: a defect detection method includes radiating light onto a substrate, obtaining a spectrum image, performing an electrical die sorting (eds) test on the substrate, inspecting defects of each of a plurality of blocks of the substrate based on a result of the eds test, generating a defect map, generating spectrum image information by matching the spectrum image with the defect map, training a defect detection model by using the defect grade as an output value and the spectrum image information as an input value, obtaining a target spectrum image with respect to a target substrate, extracting a feature vector from the target spectrum image by using the defect detection model, and detecting a target defect grade of the target spectrum image based on the feature vector, and generating a target defect map based on the target defect grade.
Inventor(s): Sungyong MIN of Suwon-si (KR) for samsung electronics co., ltd., Changkyu CHUNG of Suwon-si (KR) for samsung electronics co., ltd., Kyungwoon JANG of Suwon-si (KR) for samsung electronics co., ltd., Daeseok HWANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G01R31/26
CPC Code(s): G01R31/2635
Abstract: an electroluminescence inspection apparatus includes a first substrate, and electrode members arranged at a first surface of the first substrate, and electrically contacted respectively with a chip electrode pad of light emitting diodes arranged at a second substrate based on performing an electroluminescence inspection, wherein an electrode member includes contact protrusions configured to be elastically contacted at a chip electrode member of the light emitting diode based on the first substrate is pressed by the second substrate.
Inventor(s): Sangsu Park of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G01R31/26, G11C16/04, G11C16/16, H01L23/00, H01L25/065, H01L25/18, H10B80/00
CPC Code(s): G01R31/2637
Abstract: a bonding quality test circuit includes a switching circuit configured to provide a connection between a sensing node and a bonding node, the bonding node corresponding to a first end of a bonding resistor that is between a line provided to a memory device and a peripheral circuit, a precharging circuit configured to provide a precharge voltage to the line and the sensing node when the precharging circuit is connected to the line and the sensing node by the switching circuit, a latch circuit that includes a first node configured to provide a control output signal to the precharging circuit and a second node configured to have a voltage that is phase inverted with respect to a voltage of the control output signal, and a first transistor configured to provide an output signal according to the sensing node when the first transistor is connected to the second node.
Inventor(s): Jinho KIM of Yongin-si (KR) for samsung electronics co., ltd., Tae Won SONG of Yongin-si (KR) for samsung electronics co., ltd.
IPC Code(s): G01R31/367, G01R31/36, G01R31/3842, G01R31/387, G01R31/392
CPC Code(s): G01R31/367
Abstract: a processor-implemented method with battery state estimation includes: determining a state variation of a battery using a voltage difference between a sensed voltage of the battery and an estimated voltage of the battery that is estimated by an electrochemical model corresponding to the battery; updating an internal state of the electrochemical model based on the determined state variation of the battery; and estimating state information of the battery based on the updated internal state of the electrochemical model.
Inventor(s): Sunglak KIM of Suwon-si (KR) for samsung electronics co., ltd., Yongyeon KIM of Suwon-si (KR) for samsung electronics co., ltd., Hyeongki NAM of Suwon-si (KR) for samsung electronics co., ltd., Sungho PARK of Suwon-si (KR) for samsung electronics co., ltd., Jaebum LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G01R31/55, G01R19/165, H02H1/00, H02H3/12, H05K1/14
CPC Code(s): G01R31/55
Abstract: an electronic device is provided. the electronic device includes a housing, a first printed circuit board disposed inside the housing and including a first antenna, a first connector connected to the first antenna, a second antenna, and a second connector connected to the second antenna, memory storing one or more computer programs, a second printed circuit board spaced apart from the first printed circuit board inside the housing and including a power management circuit, a third connector electrically connected to the first connector, a fourth connector electrically connected to the second connector, a first detection circuit, and one or more processors communicatively coupled to the first detection circuit and the memory, a first cable electrically connecting the first connector and the third connector, and a second cable electrically connecting the second connector and the fourth connector, wherein the first detection circuit includes a first resistor disposed between the one or more processors and the power management circuit, and the first printed circuit board includes a second resistor branched between the first antenna and the first connector and electrically connected to the ground, and a third resistor branched between the second antenna and the second connector and electrically connected to the ground.
20240255845. PHOTORESIST COMPOSITION_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Seungyeol Baek of Suwon-si (KR) for samsung electronics co., ltd., Chawon Koh of Suwon-si (KR) for samsung electronics co., ltd., Jiyoung Park of Suwon-si (KR) for samsung electronics co., ltd., Tsunehiro Nishi of Suwon-si (KR) for samsung electronics co., ltd., Wonjoon Son of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G03F7/004, C07F7/22
CPC Code(s): G03F7/0042
Abstract: a photoresist composition includes an organometallic compound represented by formula 1.
Inventor(s): Hana KIM of Suwon-si (KR) for samsung electronics co., ltd., Yoonhyun KWAK of Suwon-si (KR) for samsung electronics co., ltd., Hyeran KIM of Suwon-si (KR) for samsung electronics co., ltd., Beomseok KIM of Suwon-si (KR) for samsung electronics co., ltd., Hoyoon PARK of Suwon-si (KR) for samsung electronics co., ltd., Sunyoung LEE of Suwon-si (KR) for samsung electronics co., ltd., Minyoung HA of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G03F7/004, G03F7/039
CPC Code(s): G03F7/0045
Abstract: provided are an organic salt represented by formula 1 below, a photoresist composition including the same, and a method of forming a pattern by using the photoresist composition:
Inventor(s): Hana KIM of Suwon-si (KR) for samsung electronics co., ltd., Yoonhyun KWAK of Suwon-si (KR) for samsung electronics co., ltd., Hyeran KIM of Suwon-si (KR) for samsung electronics co., ltd., Beomseok KIM of Suwon-si (KR) for samsung electronics co., ltd., Hoyoon PARK of Suwon-si (KR) for samsung electronics co., ltd., Sunyoung LEE of Suwon-si (KR) for samsung electronics co., ltd., Minyoung HA of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G03F7/004, G03F7/039
CPC Code(s): G03F7/0045
Abstract:
Inventor(s): Chawon KOH of Suwon-si (KR) for samsung electronics co., ltd., Yeon Hee SEONG of Suwon-si (KR) for samsung electronics co., ltd., Tsunehiro NISHI of Suwon-si (KR) for samsung electronics co., ltd., Geun Su LEE of Suwon-si (KR) for samsung electronics co., ltd., Sung Jae JUNG of Suwon-si (KR) for samsung electronics co., ltd., Moo Hyun KOH of Suwon-si (KR) for samsung electronics co., ltd., Ji Young PARK of Suwon-si (KR) for samsung electronics co., ltd., Seungyeol BAEK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G03F7/004, C07F7/22, C07F9/6596, G03F7/075, G03F7/16, G03F7/38, H01L21/027
CPC Code(s): G03F7/0045
Abstract: the present disclosure relates to a semiconductor photoresist composition including an organometallic compound represented by chemical formula 1 and a solvent, and a method of forming patterns by using the semiconductor photoresist composition.
Inventor(s): Jungchul AN of Suwon-si (KR) for samsung electronics co., ltd., Seungki CHOI of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F1/16, H04M1/02, H05K1/18, H05K5/02
CPC Code(s): G06F1/1681
Abstract: according to various embodiments, an electronic device may comprise a housing comprising a first housing and a second housing. the first housing may comprise: a hinge module; a first plate connected to the hinge module; a second plate facing away from the first plate; and a first side frame surrounding a first space between the first plate and the second plate. the second housing may comprise: a third plate connected to the hinge module; a fourth plate facing away from the third plate; and a second side frame surrounding a second space between the third plate and the fourth plate. the first housing and the second housing may fold or unfold with regard to each other with reference to the hinge module. in addition, the electronic device may comprise: a printed circuit board disposed in the second space; a first display disposed to be supported by the first plate and the third plate; a battery disposed between the third plate and the fourth plate in the second space; and a second display disposed between the battery and the fourth plate to be visible from the outside through at least a part of the fourth plate. at least a part of the second display may be disposed to face the battery.
Inventor(s): Jihyun LEE of Suwon-si (KR) for samsung electronics co., ltd., Minkyung KIM of Suwon-si (KR) for samsung electronics co., ltd., Jungmin LEE of Suwon-si (KR) for samsung electronics co., ltd., Jongwoo SHIN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F3/04842, G06F3/04886, G06V40/16
CPC Code(s): G06F3/04842
Abstract: an electronic device is provided that includes a display, a processor, and memory storing instructions. the instructions, when executed by the processor, may cause the electronic device to display a first image in a first image area of an execution screen of a first application on the display. the instructions, when executed by the processor, may cause the electronic device to identify a target region in the first image. the target region includes a target object in the first image. the instructions, when executed by the processor, may cause the electronic device to identify a first user input while the first image is displayed. the instructions, when executed by the processor, may cause the electronic device to change, based on the first user input, an image area for displaying an image, from the first image area in which the first image is displayed to a second image area which is smaller than the first image area. the instructions, when executed by the processor, may cause the electronic device to, in response to the image area changing from the first image area to the second image area, control display of the first image in the second image area based on a position of the target region in the first image.
Inventor(s): Yongchan Jo of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/061
Abstract: in a method of operating a storage device, the method receives a first data input/output (i/o) request for performing a first data i/o operation on a first memory block from a host device, where the first data i/o request includes an address of the first memory block. the method receives a parameter check table including a plurality of parameters from the buffer memory. by scheduling the first data i/o request using a first parameter corresponding to the address of the first memory block and the parameter check table, when the first parameter is equal to one of the plurality of parameters, the method transmits a first data i/o command to non-volatile memories, such that a first latency from a time at which the first data i/o request is received to a time at which the first data i/o command is transmitted becomes longer than a reference latency.
Inventor(s): Srikanth Tumkur Shivanand of Karnataka (IN) for samsung electronics co., ltd., Paul Justin Koilraj Jayakumar of Karnataka (IN) for samsung electronics co., ltd., Sharath Kumar Kodase of Karnataka (IN) for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0616
Abstract: a method includes updating a first metadata log in an nvram of a host device corresponding to one or more recent input/output (i/o) operations received by the host device, periodically checking whether the size of the updated first metadata log is greater than a flush limit maintained in the host device, triggering a meta flush thread when the updated first metadata log size exceeds the flush limit maintained in the host device, sending, by a non-volatile memory express (nvme) driver, a first command for synchronizing the updated first metadata log to one or more solid state drives (ssds) for updating a second metadata log in the one or ssds, and discarding, by the host device, metadata of the first metadata log updated in the host device after receiving a second command for acknowledging synchronization completion from the one or more ssds.
Inventor(s): SEUNGHAN LEE of SUWON-SI (KR) for samsung electronics co., ltd., HEESEOK EUN of SUWON-SI (KR) for samsung electronics co., ltd., KYUNGKEUN LEE of SUWON-SI (KR) for samsung electronics co., ltd., SOO-YOUNG JI of SUWON-SI (KR) for samsung electronics co., ltd.
IPC Code(s): G06F3/06, G06F11/30
CPC Code(s): G06F3/0631
Abstract: an electronic device includes a host device and a plurality of storage devices. the host device includes a processor and a baseboard management controller (bmc). each of the plurality of storage devices includes a storage controller and a micro controller unit (mcu). the processor and the storage controller support in-band communication, and the bmc and the mcu support out-of-band communication. the bmc receives monitoring data from the mcu of each of the plurality of storage devices based on the out-of-band communication. the processor allocates a first workload among one or more workloads to a first storage device among the plurality of storage devices, based on a monitoring data set including the monitoring data. the first storage device executes the first workload based on the in-band communication.
Inventor(s): JISEOK LEE of Suwon-si (KR) for samsung electronics co., ltd., SANGWON HWANG of Suwon-si (KR) for samsung electronics co., ltd., HYUNYOUNG LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0656
Abstract: a storage device which includes a nonvolatile memory device that includes a memory circuit storing first device information and that operates based on the first device information, a storage controller that controls the nonvolatile memory device, and a buffer memory that stores map data managed by the storage controller and stores second device information being a backup of the first device information. the first device information includes information about an operation parameter and an operation frequency of the nonvolatile memory device. the storage controller further performs a recovery operation on the first device information stored in the memory circuit of the nonvolatile memory device, based on the second device information stored in the buffer memory.
Inventor(s): Eldho Mathew PATHIYAKKARA THOMBRA of Bengaluru (IN) for samsung electronics co., ltd., Prashant Vishwanath Mahendrakar of Bengaluru (IN) for samsung electronics co., ltd., Jin In So of Hwaseong-si (KR) for samsung electronics co., ltd., Jong-Geon Lee of Seoul (KR) for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0659
Abstract: a method for operating a near memory processing (nmp) dual in-line memory module (dimm) for dimm-to-dimm communication is provided. the nmp dimm includes one or more ports for communicative connection to other nmp dimms. the method includes parsing, by one nmp dimm, a nmp command received from a processor of a host platform, identifying data dependencies on one or more other nmp dimms based on the parsing, establishing communication with the one or more other nmp dimms through one or more ports of the one nmp dimm, receiving data from the one or more other nmp dimms through one or more ports of the one nmp dimm, processing the nmp command using the data received from one of the one or more other nmp dimms and data present in the one nmp dimm, and sending a nmp command completion notification to the processor of the host platform.
Inventor(s): Sunghyun AN of Suwon-si (KR) for samsung electronics co., ltd., Sunghoon BAE of Suwon-si (KR) for samsung electronics co., ltd., Dongjun LEE of Suwon-si (KR) for samsung electronics co., ltd., Youngjin JO of Suwon-si (KR) for samsung electronics co., ltd., Hangrak CHOI of Suwon-si (KR) for samsung electronics co., ltd., Jaeyoung HWANG of Suwon-si (KR) for samsung electronics co., ltd., Heangsu KIM of Suwon-si (KR) for samsung electronics co., ltd., Dwoosung LEE of Suwon-si (KR) for samsung electronics co., ltd., Yonggil HAN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F8/34, G06F3/0482, G06F9/451
CPC Code(s): G06F8/34
Abstract: a first electronic device is provided. the first electronic device includes a display, a communication circuit, memory, and a processor. the processor is configured to execute an initial setup function for initial setup of the first electronic device, recognize a second electronic device in response to the execution of the initial setup function, request first data from the recognized second electronic device, obtain the first data produced by the second electronic device from the second electronic device, in response to completion of the initial setup function, display a first home screen implemented based on the obtained first data on the display and request second data corresponding to an application stored in the second electronic device from the second electronic device, obtain the second data from the second electronic device, and display a second home screen implemented based on the obtained second data on the display.
Inventor(s): Syam SIDHARDHAN of Bengaluru (IN) for samsung electronics co., ltd., Siba Prasad SAMAL of Bengaluru (IN) for samsung electronics co., ltd., Anurag BIRADAR of Bengaluru (IN) for samsung electronics co., ltd., Inpyo KANG of Suwon-si (KR) for samsung electronics co., ltd., Dongwook LEE of Suwon-si (KR) for samsung electronics co., ltd., Niranjan B PATIL of Bengaluru (IN) for samsung electronics co., ltd., Ankit JAIN of Bengaluru (IN) for samsung electronics co., ltd.
IPC Code(s): G06F8/654
CPC Code(s): G06F8/654
Abstract: methods and systems for dynamically updating firmware of a single-protocol based one-chip radio device present in an internet of things (iot) environment with multiple technologies using an intelligent firmware update based on size of the flash memory, the one or more hardware resources available at the controller level, and a current iot context associated with the iot environment are provided. the method includes receiving a firmware update package, determining a size of flash memory and one or more hardware resources at a controller level of the single-protocol, based on receiving the firmware update package, correlating the received firmware update package with the size of the flash memory, dynamically selecting one or more firmware resources from the received firmware package for updating firmware of the single-protocol based one-chip radio device based on the correlation, and updating firmware of the single-protocol based one-chip radio device using the one or more firmware resources.
Inventor(s): Gyeongmin LEE of Suwon-si (KR) for samsung electronics co., ltd., Bongjun KIM of Suwon-si (KR) for samsung electronics co., ltd., Seungwon LEE of Suwon-si (KR) for samsung electronics co., ltd., Hanwoong JUNG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F9/30
CPC Code(s): G06F9/3004
Abstract: a system configured to perform an operation includes: a hardware device comprising a plurality of computing modules and a plurality of memory modules arranged in a lattice form, each of the computing modules comprising a coarse-grained reconfigurable array and each of the memory modules comprising a static random-access memory and a plurality of functional units connected to the static random-access memory; and a compiler configured to divide a target operation and assign the divided target operation to the computing modules and the memory modules such that the computing modules and the memory modules of the hardware device perform the target operation.
Inventor(s): HYUN-WOO SIM of Suwon-si (KR) for samsung electronics co., ltd., HYUNPIL KIM of Suwon-si (KR) for samsung electronics co., ltd., SEONGWOO AHN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F9/38, G06F9/30, G06F9/32
CPC Code(s): G06F9/3851
Abstract: an in-order processor using a multiple-issue scheme includes a control unit configured to fetch a plurality of instructions together, to determine whether to multiple-issue the plurality of fetched instructions, to decode an issued instruction based on the determination, and to determine whether a stall of the decoded instruction is caused by a data hazard. the processor further includes an execution unit configured to execute an instruction transmitted from the control unit, and a buffer configured to store stall history information on a plurality of multiple-issued instructions when the plurality of multiple-issued instructions are stalled by the data hazard. the control unit determines whether to multiple-issue the plurality of fetched instructions, based on the stall history information of the buffer.
Inventor(s): Suckhyun NAM of Suwon-si (KR) for samsung electronics co., ltd., Taesun PARK of Suwon-si (KR) for samsung electronics co., ltd., Minsung KIL of Suwon-si (KR) for samsung electronics co., ltd., Ho-Jin CHUN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F11/14, G06F1/30, G06F11/30
CPC Code(s): G06F11/1417
Abstract: a storage device includes a plurality of power circuits configured to operate sequentially to drive the storage device, a control circuit configured to, monitor a plurality of first monitoring signals received from the plurality of power circuits, and generate a retry request in response to detection of hardware initialization failure in at least one of the plurality of power circuits based on the plurality of first monitoring signals, and a power sequence circuit configured to, monitor a plurality of second monitoring signals received from the plurality of power circuits and the control circuit, and retry a hardware initialization operation for at least one power circuit of the plurality of power circuits based on the retry request and the plurality of second monitoring signals.
Inventor(s): Jungsik CHOI of Suwon-si (KR) for samsung electronics co., ltd., Ruth KIM of Suwon-si (KR) for samsung electronics co., ltd., Jin-Hong KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F12/08
CPC Code(s): G06F12/08
Abstract: an electronic device includes: a host processor configured to: generate a memory group allocated to an expanded virtual memory in response to receiving memory usage information; determine a target memory group comprising a page on which a page fault has occurred among memory groups allocated to the expanded virtual memory, based on the memory usage information; and migrate the target memory group from one of a host memory, an accelerator memory, and a storage device, which comprises the target memory group, to either one of the host memory and the accelerator memory in which the page fault has occurred; and an accelerator configured to perform an operation using the accelerator memory, wherein the expanded virtual memory is a virtual single address space using the host memory, the accelerator memory, and the storage device.
Inventor(s): Shinhaeng Kang of Suwon-si (KR) for samsung electronics co., ltd., Suk Han Lee of Suwon-si (KR) for samsung electronics co., ltd., Kyomin Sohn of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F12/0811, G06F12/0891
CPC Code(s): G06F12/0811
Abstract: disclosed is a semiconductor memory device and a memory system, including at least one high-bandwidth memory device configured to store data or output stored data according to an access command, a processor configured to generate the access command for the high-bandwidth memory device, and a logic die on the high-bandwidth memory device and including a last level cache providing a cache function to the processor. the last level cache is configured to perform a cache bypassing operation to directly access the high-bandwidth memory device without a cache replacement operation when an invalid line and a clean line do not exist in a cache miss state in response to a cache read or cache write request by the processor.
Inventor(s): Gyuduck BAE of Suwon-si (KR) for samsung electronics co., ltd., Pilsung Koh of Suwon-si (KR) for samsung electronics co., ltd., Sangsu Kim of Suwon-si (KR) for samsung electronics co., ltd., Kyuman Yeon of Suwon-si (KR) for samsung electronics co., ltd., Soyeon Lee of Suwon-si (KR) for samsung electronics co., ltd., Bora Jeong of Suwon-si (KR) for samsung electronics co., ltd., Boseok Hong of Suwon-si (KR) for samsung electronics co., ltd., Jisan Kwak of Suwon-si (KR) for samsung electronics co., ltd., Haegeun Park of Suwon-si (KR) for samsung electronics co., ltd., Yonghwan Baek of Suwon-si (KR) for samsung electronics co., ltd., Chulho Song of Suwon-si (KR) for samsung electronics co., ltd., Seungyong Lee of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F30/13, G06F111/20
CPC Code(s): G06F30/13
Abstract: a method of determining a facility layout of a semiconductor factory including a main floor including processing zones, a clean sub-fab (csf) floor under the main floor, and a facility sub-fab (fsf) floor under the csf floor includes receiving data related to main facilities to be placed on the main floor, csf subsidiary facilities to be placed on the csf floor, and fsf subsidiary facilities to be placed on the fsf floor, and determining the facility layout including a layout of the main facilities for the main floor, a layout of the csf subsidiary facilities for the csf floor, and a layout of the fsf subsidiary facilities for the fsf floor.
Inventor(s): Eunsun JUNG of Suwon-si (KR) for samsung electronics co., ltd., Jeongmin KIM of Suwon-si (KR) for samsung electronics co., ltd., Hoyoung LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06F30/398
CPC Code(s): G06F30/398
Abstract: a method of verifying an integrated circuit includes obtaining first data defining elements in the integrated circuit and second data defining positions and connection relationships of the elements, generating chip data by merging the first data and the second data in the background, performing a plurality of physical verifications in parallel, and generating output data, based on results of at least one of physical verifications. the performing of the plurality of physical verifications in parallel includes extracting verification input data used for physical verification, based on the chip data.
20240256828. NEURAL PROCESSOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Ilia Ovsiannikov of Porter Ranch CA (US) for samsung electronics co., ltd., Ali Shafiee Ardestani of San Jose CA (US) for samsung electronics co., ltd., Joseph H. Hassoun of Los Gatos CA (US) for samsung electronics co., ltd., Lei Wang of Burlingame CA (US) for samsung electronics co., ltd., Sehwan Lee of Hwaseong-si (KR) for samsung electronics co., ltd., JoonHo Song of Hwaseong-si (KR) for samsung electronics co., ltd., Jun-Woo Jang of Hwaseong-si (KR) for samsung electronics co., ltd., Yibing Michelle Wang of Pasadena CA (US) for samsung electronics co., ltd., Yuecheng Li of San Jose CA (US) for samsung electronics co., ltd.
IPC Code(s): G06N3/04, G06F9/30, G06F17/15, G06F17/16, G06N3/08, G06T9/00
CPC Code(s): G06N3/04
Abstract: a neural processor. in some embodiments, the processor includes a first tile, a second tile, a memory, and a bus. the bus may be connected to the memory, the first tile, and the second tile. the first tile may include: a first weight register, a second weight register, an activations buffer, a first multiplier, and a second multiplier. the activations buffer may be configured to include: a first queue connected to the first multiplier and a second queue connected to the second multiplier. the first queue may include a first register and a second register adjacent to the first register, the first register being an output register of the first queue. the first tile may be configured: in a first state: to multiply, in the first multiplier, a first weight by an activation from the output register of the first queue, and in a second state: to multiply, in the first multiplier, the first weight by an activation from the second register of the first queue.
Inventor(s): Jungho KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06N3/045
CPC Code(s): G06N3/045
Abstract: provided is a neural network computing system that includes: a processor comprising a plurality of computing devices, a memory storing at least one instruction related to execution of a neural network model, a memory controller; and a system bus. the processor is configured to execute the at least one instruction to: determine a normalized target performance of the neural network model, determine a normalized target performance of each of the plurality of computing devices, determine a normalized target performance of the memory controller and the system bus, determine an operating frequency for each of a plurality of hardware devices based on the determined normalized target performance(s), and execute the neural network model by operating the plurality of hardware devices based on the determined operating frequency for each of the plurality of hardware devices.
Inventor(s): Hyukjin JEONG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06N3/0495
CPC Code(s): G06N3/0495
Abstract: an electronic apparatus is provided. the electronic apparatus includes a memory, at least one processor connected to the memory and configured to control the electronic apparatus, and the processor may obtain a first neural network model comprising at least one layer that may be quantized, obtain test data used as an input of the first neural network model, obtain feature map data from each of at least one layer included in the first neural network model by inputting the test data to the first neural network model, obtain information about at least one of scaling or shifting to equalize channel-wise data from the feature map data obtained from each of the at least one layer, obtain a second neural network model in which channel-wise data of the feature map data is equalized by updating each of the at least one layer based on the obtained information, and obtain a quantized third neural network model corresponding to the first neural network model by quantizing the second neural network model based on the test data.
Inventor(s): Borna J. Obradovic of Leander TX (US) for samsung electronics co., ltd., Titash Rakshit of Austin TX (US) for samsung electronics co., ltd., Mark S. Rodder of Dallas TX (US) for samsung electronics co., ltd.
IPC Code(s): G06N3/065, H01L21/28, H01L29/423, H01L29/66, H01L29/788, H01L29/808, H10B41/30
CPC Code(s): G06N3/065
Abstract: a neuromorphic device for the analog computation of a linear combination of input signals, for use, for example, in an artificial neuron. the neuromorphic device provides non-volatile programming of the weights, and fast evaluation and programming, and is suitable for fabrication at high density as part of a plurality of neuromorphic devices. the neuromorphic device is implemented as a vertical stack of flash-like cells with a common control gate contact and individually contacted source-drain (sd) regions. the vertical stacking of the cells enables efficient use of layout resources.
Inventor(s): Mohammad Vahid Jamali of Nashville TN (US) for samsung electronics co., ltd., Hamid Saber of San Diego CA (US) for samsung electronics co., ltd., Homayoon Hatami of San Diego CA (US) for samsung electronics co., ltd., Jung Hyun Bae of San Diego CA (US) for samsung electronics co., ltd.
IPC Code(s): G06N3/08, G06N3/045
CPC Code(s): G06N3/08
Abstract: a method of training an autoencoder that includes encoder neural networks and decoder neural networks. the method includes training the encoder neural networks in which weights of the decoder neural networks are fixed. the method also includes iteratively training the decoder neural networks for a number of iterations. for each iteration of the training of the decoder neural networks, a pair of decoder neural networks is replaced by another pair of neural networks, and a second decoder neural network of the pair of decoder neural networks utilizes different parameters than a first decoder neural network of the pair of decoder neural networks.
Inventor(s): Jonghoon YOON of Suwon-si (KR) for samsung electronics co., ltd., Geon PARK of Daejeon (KR) for samsung electronics co., ltd., Jaehong YOON of Daejeon (KR) for samsung electronics co., ltd., Sung Ju HWANG of Daejeon (KR) for samsung electronics co., ltd., Wonyong JEONG of Daejeon (KR) for samsung electronics co., ltd.
IPC Code(s): G06N3/098, G06N3/045
CPC Code(s): G06N3/098
Abstract: a method and device with federated learning of neural network models are disclosed. a method includes: receiving weights of respective clients, wherein each weight has a respectively corresponding precision that is initially an inherent precision; using a dequantizer to change the weights such that the precisions thereof are changed from the inherent precisions to a same reference precision; determining masks respectively corresponding to the weights based on the inherent precisions; based on the masks, determining an integrated weight by merging the weights having the reference precision; and quantizing the integrated weight to generate quantized weights having the inherent precisions, respectively, and transmitting the quantized weights to the clients.
Inventor(s): Vikas Yadav of San Jose CA (US) for samsung electronics co., ltd., Hyuk Joon Kwon of New York NY (US) for samsung electronics co., ltd., Vijay Srinivasan of San Jose CA (US) for samsung electronics co., ltd., Hongxia Jin of San Jose CA (US) for samsung electronics co., ltd.
IPC Code(s): G06N5/02, G06F40/295
CPC Code(s): G06N5/02
Abstract: a method includes predicting, using the at least one processing device, a question type for each section of a document using a trained question type prediction model, each section including a different portion of the document. the method also includes generating, using the at least one processing device, multiple question-answer pairs using a trained question-answer generation model that receives the predicted question types and the document as input. each question-answer pair includes (i) a question having a type corresponding to one of the predicted question types and being associated with content in the section corresponding to the type and (ii) an answer to the question. the method further includes outputting, using the at least one processing device, the question-answer pairs for use in training a question answering model.
Inventor(s): Giyoung HEO of Suwon-si (KR) for samsung electronics co., ltd., Daeho LEE of Suwon-si (KR) for samsung electronics co., ltd., Minseok LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06T5/50, G06T5/70
CPC Code(s): G06T5/50
Abstract: an image processor including an interface circuit configured to receive a plurality of images corresponding to a plurality of exposure times from an external sensor, and a high dynamic range (hdr) synthesis circuit configured to synthesize a first hdr image, based on a first image and a second image among the plurality of images, synthesize a second hdr image, based on a third image among the plurality of images and the first hdr image, apply a first weight including weight values respectively corresponding to pixels of the first hdr image to the first hdr image, and apply a second weight including weight values respectively corresponding to pixels of the third image to the third image to synthesize the second hdr image.
Inventor(s): Jinwoo KANG of Suwon-si (KR) for samsung electronics co., ltd., Dongbum CHOI of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06T5/50, G06T5/70, G06T7/20
CPC Code(s): G06T5/50
Abstract: in a method of processing an image, a first composite frame image corresponding to an n-th input frame image is generated by performing a first temporal noise reduction operation based on the n-th input frame image and an (n−m)-th input frame image. the (n−m)-th input frame image is received prior to the n-th input frame image. a second composite frame image corresponding to the n-th input frame image is generated by performing a second temporal noise reduction operation based on the n-th input frame image and an (n+k)-th input frame image. the (n+k)-th input frame image is received subsequent to the n-th input frame image. the second composite frame image is provided as an n-th output frame image corresponding to the n-th input frame image.
Inventor(s): Nguyen Thang Long Le of Garland TX (US) for samsung electronics co., ltd., Tyler Luu of Richardson TX (US) for samsung electronics co., ltd., Hamid R. Sheikh of Allen TX (US) for samsung electronics co., ltd.
IPC Code(s): G06T5/00, G06T5/50
CPC Code(s): G06T5/92
Abstract: a method includes obtaining multiple input image frames and generating a high dynamic range (hdr) blended image based on the input image frames, where the hidr blended image has a higher dynamic range than individual ones of the input image frames. the method also includes performing a tone fusion operation on the hidr blended image based on a semantic delta-weight map to generate a fused image. performing the tone fusion operation includes synthesizing multiple low dynamic range (ldr) images based on the hidr blended image and generating initial weight maps based on the ldr images. performing the tone fusion operation also includes generating filtered weight maps based on the initial weight maps, the semantic delta-weight map, and a guided filter. performing the tone fusion operation further includes generating the fused image based on the filtered weight maps and decomposed versions of the ldr images.
Inventor(s): Abhiram Gnanasambandam of Frisco TX (US) for samsung electronics co., ltd., John W. Glotzbach of Allen TX (US) for samsung electronics co., ltd., Zeeshan Nadir of Allen TX (US) for samsung electronics co., ltd., Gunawath Dilshan Godaliyadda of Allen TX (US) for samsung electronics co., ltd., John Seokjun Lee of Allen TX (US) for samsung electronics co., ltd., Hamid R. Sheikh of Allen TX (US) for samsung electronics co., ltd.
IPC Code(s): G06T5/00, G06T3/40, G06T15/50
CPC Code(s): G06T5/94
Abstract: a method includes obtaining multiple image frames captured using at least one imaging sensor. the method also includes generating a local tone map, a global tone map look-up table (lut), and one or more contrast enhancement luts based on at least one of the image frames and one or more parameters of the at least one imaging sensor. the method further includes generating a blended and demosaiced image based on the image frames and generating a local tone mapped image based on the blended and demosaiced image and the local tone map. the method also includes adjusting color saturation based on the local tone mapped image to generate a corrected image. in addition, the method includes generating an output image based on the corrected image, the global tone map lut, and the one or more contrast enhancement luts.
Inventor(s): Seungju HAN of Suwon-si (KR) for samsung electronics co., ltd., Sanghyuk MOON of Seoul (KR) for samsung electronics co., ltd., Je Hyeong HONG of Seoul (KR) for samsung electronics co., ltd., Hyeon Jeong PARK of Seoul (KR) for samsung electronics co., ltd.
IPC Code(s): G06T7/00
CPC Code(s): G06T7/0004
Abstract: a processor-implemented method including performing an iterative training operation of a defect detection model which includes randomly assigning a label for a detected defect pattern of an object having a defect to training data responsive to the detected defect pattern being determined to be a defect pattern that is not among the training data, dependent on the label being determined to be a new label, generating an importance score, which represents a frequency of an occurrence of the defect pattern, and executing the training of the defect detection model using the defect data of the defect pattern when the importance score exceeds the first threshold value, and deleting the defect data when the importance score does not exceed the first threshold.
Inventor(s): Jungkyu Kook of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06T7/11, G02B27/00, G02B27/01, G06T7/194, G06V10/25, G09G5/391
CPC Code(s): G06T7/11
Abstract: a display device includes a processor configured to generate a region-of-interest image of a current frame based on a background image of the current frame and a line-of-sight region of a user, and a timing controller configured to output the background image and the region-of-interest image to a display panel, wherein the timing controller comprises a buffer storing at least one of the background image and the region-of-interest image, and a reception controller configured to overwrite the region-of-interest image to the buffer based on position information of the region-of-interest image in the background image and to update the at least one of the background image and the region-of-interest image in the buffer.
Inventor(s): Dongmin LEE of Suwon-si (KR) for samsung electronics co., ltd., Hyeokjin CHOI of Suwon-si (KR) for samsung electronics co., ltd., Miyoung LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06T19/00, G16Y40/30
CPC Code(s): G06T19/003
Abstract: an electronic device is provided. the electronic device includes a display including a display area and at least one processor electrically connected to the display. the at least one processor displays a three-dimensional (3d) map including at least one of indoor space status information including an environmental status of an indoor space or home appliance status information including an operating status of at least one home appliance disposed in the indoor space and control an operation of the at least one home appliance based on a user input to a predetermined area on the 3d map.
Inventor(s): Yingen Xiong of Mountain View CA (US) for samsung electronics co., ltd.
IPC Code(s): G06T19/00, G06T3/40, G06T5/20, G06V10/44
CPC Code(s): G06T19/006
Abstract: a method includes obtaining multiple see-through image frames of an environment around an augmented reality (ar) device using multiple imaging sensors of the ar device. the method also includes generating a depth map based on the see-through image frames and generating a three-dimensional (3d) representation of the environment based on the depth map. the method further includes projecting the 3d representation onto a curved surface, mapping points of the projected 3d representation to multiple virtual view images, and presenting the virtual view images on one or more displays of the ar device. generating the depth map may include generating an initial depth map using a trained machine learning model and modifying the initial depth map to provide both spatial consistency and temporal consistency in order to generate a refined depth map. the curved surface may include a portion of a cylindrical, spherical, or conical surface.
Inventor(s): Soonmook JEONG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06V10/764, G06V10/30, G06V10/77
CPC Code(s): G06V10/764
Abstract: an electronic apparatus includes: a memory storing at least one instruction; and at least one processor configured to execute the at least one instruction to: obtain an input image by capturing an object and a background of the object through a camera; obtain a first classification map by classifying a first part of the obtained input image as an object region corresponding to the object and a second part of the obtained input image as a background region corresponding to the background of the object; pre-process the first classification map to obtain a second classification map in which a noise region in the first classification map is removed; and obtain an object image corresponding to the object, based on the first classification map and the second classification map, by using the noise region in the first classification map and information about a distance between the camera and the object.
Inventor(s): Hyewon MOON of Suwon-si (KR) for samsung electronics co., ltd., Nahyup KANG of Suwon-si (KR) for samsung electronics co., ltd., Jiyeon KIM of Suwon-si (KR) for samsung electronics co., ltd., Donghoon SAGONG of Suwon-si (KR) for samsung electronics co., ltd., Seokhwan JANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G06V10/774, G06T7/50, G06T7/70, G06T7/90, G06T17/00, G06V10/82
CPC Code(s): G06V10/774
Abstract: an image processing method and an image processing apparatus are provided. the image processing method includes: receiving a camera pose of a camera corresponding to a target scene; generating a piece of prediction information including either a color of an object included in the target scene or a density of the object, wherein the prediction information is generated by applying, to a neural network model, three-dimensional (3d) points on a camera ray formed based on the camera pose; sampling, among the 3d points, target points corresponding to a static object, wherein the sampling is based on the piece of prediction information; and outputting a rendered image corresponding to the target scene by projecting a pixel value corresponding to the target points onto the target scene and rendering the target scene onto which the pixel value may be projected.
Inventor(s): Jinsol PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G09G3/20, G01S13/42
CPC Code(s): G09G3/2092
Abstract: at least one processor of an electronic device to: identify first information in memory, the first information including information about one or more objects included in each of a plurality of pieces of content, and information indicating the emotion type for each of the plurality of pieces of content; acquire second information indicating the illuminance of the external environment in which the electronic device is present; acquire third information about the location of a user; input the first information, the second information, and the third information to a first model to acquire fourth information including one or more pieces of content to be displayed on a display among the plurality of pieces of content, and one or more areas in which the one or more pieces of content are to be respectively arranged; and display the one or more pieces of content in the one or more areas, respectively.
Inventor(s): Umberto MICHIELI of Staines (GB) for samsung electronics co., ltd., Mete OZAY of Staines (GB) for samsung electronics co., ltd., Edward FISH of Staines (GB) for samsung electronics co., ltd.
IPC Code(s): G10L15/06, G10L15/30
CPC Code(s): G10L15/063
Abstract: the present techniques generally relate to a computer-implemented method for personalising automatic speech recognition (asr) or other general-purpose models using mixed precision (mp) quantization. each model is personalised on a user device or server to a target memory budget b using user data.
Inventor(s): Hwanseok KU of Suwon-si (KR) for samsung electronics co., ltd., Youngmin JO of Suwon-si (KR) for samsung electronics co., ltd., Anil KAVALA of Suwon-si (KR) for samsung electronics co., ltd., Jungjune PARK of Suwon-si (KR) for samsung electronics co., ltd., Chiweon YOON of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G11C7/22, G11C7/10, G11C8/18
CPC Code(s): G11C7/222
Abstract: a memory package includes a data input/output pin, a data strobe pin, a plurality of memory devices, and a buffer device. the data input/output pin receives a data signal. the data strobe pin receives a data strobe signal. the plurality of memory devices operate based on the data signal and the data strobe signal. the buffer device is between the data input/output pin, the data strobe pin and the plurality of memory devices, and performs a training operation based on training data and the data strobe signal in response to the data signal including the training data and the data strobe signal being received. during the training operation, the buffer device sets different delays on a plurality of sub-training data included in the training data, and the sub-training data on which the different delays are set are stored in different memory regions of the plurality of memory devices.
Inventor(s): Soong-Man SHIN of Hwaseong-si (KR) for samsung electronics co., ltd., Hyungjin KIM of Suwon-si (KR) for samsung electronics co., ltd., YoungWook KIM of Hwaseong-si (KR) for samsung electronics co., ltd.
IPC Code(s): G11C7/22, G06F13/16, G11C7/10, G11C8/18
CPC Code(s): G11C7/222
Abstract: a storage device including a nonvolatile memory device including memory blocks and a controller connected with the nonvolatile memory device through data input and output lines and a data strobe line may be provided. the nonvolatile memory device and the controller may be configured to perform training on the data input and output lines by adjusting a delay of a data strobe signal sent through the data strobe line and adjust delays of the data input and output lines based on the training result.
Inventor(s): Anil Kavala of Suwon-si (KR) for samsung electronics co., ltd., Youngmin Jo of Suwon-si (KR) for samsung electronics co., ltd., Jungjune Park of Suwon-si (KR) for samsung electronics co., ltd., Chiweon Yoon of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G11C7/22, G11C7/10
CPC Code(s): G11C7/225
Abstract: provided is a memory system including a memory device including a plurality of non-volatile memories, each of the plurality of non-volatile memories being electrically connected to a buffer chip, and a memory controller electrically connected to the buffer chip and configured to transmit a reference clock signal used in correction of a data signal, wherein the buffer chip includes a delay clock generation chain configured to generate a first delay clock signal or a second delay clock signal from the reference clock signal, a first register configured to store the first delay clock signal, and a second register configured to store the second delay clock signal, and wherein the buffer chip is configured to perform compensation on a strobe signal of the data signal based on the first delay clock signal, and perform compensation on the data signal based on the second delay clock signal.
Inventor(s): Sanghoon CHA of Suwon-si (KR) for samsung electronics co., ltd., Yuhwan RO of Suwon-si (KR) for samsung electronics co., ltd., Seungwoo SEO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G11C8/06, G11C7/10, G11C8/04
CPC Code(s): G11C8/06
Abstract: a memory device includes: a memory bank module comprising a memory bank; and an operation module comprising a processing in memory (pim) block, wherein the memory bank comprises: an array of memory cells arranged in a plurality of rows and a plurality of columns; a row buffer configured to store data of a row corresponding to a row address among the plurality of rows; and a selecting module configured to select first data and second data corresponding to a column address from among the data stored in the row buffer, wherein the first data is transmitted to the pim block through a first data path connected between the selecting module and the pim block, and the second data is transmitted to the pim block through a second data path connected between the selecting module and the pim block.
20240257856. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Youngnam Hwang of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G11C11/22, G11C5/06, H10B51/10, H10B51/20, H10B51/40
CPC Code(s): G11C11/2257
Abstract: a semiconductor device includes memory cells connected to word lines, bit lines, and one source line, a row decoder connected to the word lines, and a sense amplifier circuit connected to the bit lines. in a program operation for two or more selected memory cells, a reference voltage is applied to the one source line, the sense amplifier circuit inputs a selected voltage to one selected bit line connected to the selected memory cells, and the row decoder inputs, to selected word lines connected to respective ones of the selected memory cells, a first program voltage lower than the reference voltage or a second program voltage higher than the reference voltage. each of the memory cells includes a ferroelectric layer in which at least one of a polarization direction and a polarization degree changes depending on a voltage input to each of the word lines.
Inventor(s): Taeyun KIM of Suwon-si (KR) for samsung electronics co., ltd., Junmyung WOO of Suwon-si (KR) for samsung electronics co., ltd., Taewon KIM of Suwon-si (KR) for samsung electronics co., ltd., Yanggyoon LOH of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G11C11/4091, G11C11/408, G11C11/4094
CPC Code(s): G11C11/4091
Abstract: an lsa circuit includes a first sensing transistor and a second sensing transistor connected in series between a local i/o line and a complementary local i/o line, a pre-sensing driver configured to drive an lsa sensing voltage to a connection node between the first sensing transistor and the second sensing transistor during a pre-sensing operation of the lsa circuit, and a main-sensing driver configured to drive the lsa sensing voltage to the connection node during a main-sensing operation of the lsa circuit. a driving strength of the pre-sensing driver is set to be weaker than a driving strength of the main-sensing driver, and the pre-sensing driver is driven before the main-sensing driver.
Inventor(s): Dong KIM of Suwon-si (KR) for samsung electronics co., ltd., Inhoon PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G11C29/02, G11C29/00
CPC Code(s): G11C29/022
Abstract: a storage device includes a volatile memory and a storage controller, which is configured to control the volatile memory. the volatile memory includes a memory cell array, which has a plurality of sub-cell arrays therein, and a plurality of sub-wordline driver blocks, which are configured to drive sub-wordlines electrically connected to at least one of the plurality of sub-cell arrays. the storage controller includes: a volatile memory interface configured to transmit data to and receive data from the volatile memory, and detect an error bit(s) of data output from the volatile memory, a working memory configured to store a structure map table, which maps unit areas of the volatile memory, the sub-wordlines, and the plurality of sub-wordline driver blocks, and a processor, which is configured to: update an error count of a unit area of the volatile memory that corresponds to the error bit(s) detected from the volatile memory interface to the structure map table, detect at least one of a defective sub-wordline and defective sub-wordline driver block, by accessing the structure map table, and then repair at least one memory cell connected to the defective sub-wordline and/or repair at least one memory cell associated with the defective sub-wordline driver block.
Inventor(s): Seungki HONG of Suwon-si (KR) for samsung electronics co., ltd., Seungjun LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G11C29/44, G11C29/18
CPC Code(s): G11C29/44
Abstract: a repair circuit, including a first fail address latch configured to latch a first fail address and a second fail address corresponding to a first bank; a second fail address latch configured to latch a third fail address and a fourth fail address corresponding to a second bank different from the first bank; a fail address multiplexer configured merge the first fail address and the third fail address into a first merge address, and to merge the second fail address and the fourth fail address into a second merge address; a comparison circuit configured to compare the first and second merge addresses with merged decoded row addresses to generate first and second hit signals; a logic operator configured to output a valid hit pre-signal based on the first and second hit signals; and a valid hit latch configured output a valid hit signal based on the valid hit pre-signal.
Inventor(s): Taehong KWON of Suwon-si (KR) for samsung electronics co., ltd., Daeseok Byeon of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): G11C29/00
CPC Code(s): G11C29/702
Abstract: a memory device is provided. the memory device includes: a first cell region provided in a first layer and including a first bit line and a first redundant bit line; a second cell region provided in a second layer and including a second bit line and a second redundant bit line; a peripheral region provided in a third layer and including first page buffers configured to be respectively connected to the first bit line and the second bit line, and a second page buffer configured to be commonly connected to the first redundant bit line and the second redundant bit line; and a control circuit configured to: based on the first bit line being defective, replace the first bit line with the first redundant bit line; and based on the second bit line being defective, replace the second bit line with the second redundant bit line.
Inventor(s): JIHWAN KIM of Suwon-si (KR) for samsung electronics co., ltd., Nam Kyun KIM of Suwon-si (KR) for samsung electronics co., ltd., HYUN BAE KIM of Suwon-si (KR) for samsung electronics co., ltd., SEUNGBO SHIM of Suwon-si (KR) for samsung electronics co., ltd., HYEONGMO KANG of Suwon-si (KR) for samsung electronics co., ltd., KYUNG-SUN KIM of Suwon-si (KR) for samsung electronics co., ltd., Daeun SON of Suwon-si (KR) for samsung electronics co., ltd., JUHO LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01J37/32
CPC Code(s): H01J37/32715
Abstract: a substrate treatment apparatus may include a chucking stage supporting a substrate, a sinusoidal generator supplying a sinusoidal wave to the chucking stage, a non-sinusoidal generator supplying a non-sinusoidal wave to the chucking stage, and a mixer between each of the sinusoidal and non-sinusoidal generators and the chucking stage. the chucking stage may include a chuck body and a plasma electrode in the chuck body. the mixer may include a high pass filter between the sinusoidal generator and the plasma electrode, a low pass filter between the non-sinusoidal generator and the plasma electrode, and a band stop filter between the low pass filter and the plasma electrode.
Inventor(s): Jongwoo Sun of Hwaseong-si (KR) for samsung electronics co., ltd., Kyohyeok Kim of Seoul (KR) for samsung electronics co., ltd., Taehwa Kim of Hwaseong-si (KR) for samsung electronics co., ltd., Haejoong Park of Yongin-si (KR) for samsung electronics co., ltd., Jewoo Han of Hwaseong-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01J37/32
CPC Code(s): H01J37/32724
Abstract: an apparatus for plasma etching having an electrostatic chuck including a base layer, a bonding layer, an adsorption layer including a plurality of protrusions on the bonding layer and contacting a lower surface of a substrate, and an edge ring spaced apart from and surrounding a lateral surface of the substrate; a plurality of coolant suppliers injecting a coolant between the plurality of protrusions; a plurality of pipes supplying the coolant to the plurality of coolant suppliers to circulate the coolant in a predetermined direction; a cooling device in which the plasma etching process includes first and second operations, wherein the coolant is injected to cause the electrostatic chuck to reach a first temperature during the first operation, and reach a second temperature during the second operation; and a controller controlling a valve connected to the plurality of pipes to determine a circulation direction of the coolant.
Inventor(s): Jinyong LEE of Suwon-si (KR) for samsung electronics co., ltd., Yungi CHOI of Suwon-si (KR) for samsung electronics co., ltd., Jihye KIM of Suwon-si (KR) for samsung electronics co., ltd., Taewon KIM of Suwon-si (KR) for samsung electronics co., ltd., Yun PARK of Suwon-si (KR) for samsung electronics co., ltd., Jaeyoung SEO of Suwon-si (KR) for samsung electronics co., ltd., Gyeore LEE of Suwon-si (KR) for samsung electronics co., ltd., Heesu EOM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L21/768, H01L23/522
CPC Code(s): H01L21/76814
Abstract: a wiring structure includes an etch stop film disposed on a substrate. a first insulating film is disposed on the etch stop film. a first wiring layer extends in a vertical direction perpendicular to an upper surface of the substrate and extends through the first insulating film and the etch stop film. a sidewall of the first wiring layer forms a first inclination angle of about 88 degrees to about 90 degrees with respect to a first horizontal direction parallel to the upper surface of the substrate. a surface of the first insulating film and a surface of the etch stop film in direct contact with the first wiring layer have a carbon (c) concentration less than or equal to about 3 at %.
Inventor(s): Minsu LEE of Suwon-si, Gyeonggi-do (KR) for samsung electronics co., ltd., Minsu KANG of Suwon-si, Gyeonggi-do (KR) for samsung electronics co., ltd., Sangho YUN of Suwon-si, Gyeonggi-do (KR) for samsung electronics co., ltd., Chan HWANG of Suwon-si, Gyeonggi-do (KR) for samsung electronics co., ltd.
IPC Code(s): H01L21/66
CPC Code(s): H01L22/12
Abstract: a method of detecting overlay of patterns includes forming a lower pattern and an upper pattern on a substrate. a sample pattern is drawn that has a common tangential line with the lower pattern. a position of a real center of gravity of the lower pattern is calculated using the common tangential line.
Inventor(s): Taehong Kwon of Suwon-si (KR) for samsung electronics co., ltd., Daeseok Byeon of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L21/66, H01L23/00, H01L23/48, H01L23/528, H01L25/065, H10B80/00
CPC Code(s): H01L22/30
Abstract: a semiconductor device includes a first semiconductor chip; a second semiconductor chip stacked on the first semiconductor chip, wherein a type of the second semiconductor chip is different from a type of the first semiconductor chip; and a crack detection circuit including: a first crack detection line repeatedly passing through an interface between the first semiconductor chip and the second semiconductor chip; a second crack detection line including a bonding pad or a through-via structure contacting a surface of the second semiconductor chip opposite to the interface; and a crack detector in the second semiconductor chip, the crack detector being configured to output a first test signal to the first crack detection line, receive a first reception signal from the first crack detection line, output a second test signal to the second crack detection line, and receive a second reception signal from the second crack detection line.
20240258203. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Seonhaeng LEE of Suwon-si (KR) for samsung electronics co., ltd., Hyunggyun NOH of Suwon-si (KR) for samsung electronics co., ltd., Sung-Mock HA of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/48, H01L23/498, H01L25/065
CPC Code(s): H01L23/481
Abstract: a semiconductor device may include a substrate having a first surface and a second surface opposite to the first surface, a protection layer on the first surface of the substrate, metal layers in the substrate, extending in a first direction parallel to the first surface, and spaced apart from each other in a second direction perpendicular to the first surface, a via structure vertically penetrating the metal layers and the substrate, a circuit layer on the second surface of the substrate, and a connection terminal on a bottom surface of the circuit layer. each of the metal layers may have a tetragonal or circular shape, when viewed in a plan view.
20240258204. SEMICONDUCTOR DEVICES_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Yeonggil KIM of Suwon-si (KR) for samsung electronics co., ltd., Hoonseok SEO of Suwon-si (KR) for samsung electronics co., ltd., Minchul AHN of Suwon-si (KR) for samsung electronics co., ltd., Wookyung YOU of Suwon-si (KR) for samsung electronics co., ltd., Woojin LEE of Suwon-si (KR) for samsung electronics co., ltd., Junghwan CHUN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/48, H01L29/06, H01L29/417, H01L29/423, H01L29/775, H01L29/786
CPC Code(s): H01L23/481
Abstract: a semiconductor device comprising: a substrate including an active region extending in a first direction; a gate structure extending in a second direction on the active region; source/drain regions on the active region and adjacent the gate structure; a backside insulating layer on a lower surface of the substrate; a vertical power structure between adjacent source/drain regions, wherein the vertical power structure extends through the substrate and the backside insulating layer and has an exposed lower surface exposed; an interlayer insulating layer on the backside insulating layer; a backside power structure that extends through the interlayer insulating layer and is connected to the vertical power structure; and a first alignment insulating layer between the backside insulating layer and the interlayer insulating layer, wherein the first alignment insulating layer has a first opening exposing the lower surface of the vertical power structure and contacts the backside power structure.
20240258205. INTEGRATED CIRCUIT DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Hoyun Jeon of SUWON-SI (KR) for samsung electronics co., ltd., Seungyong Yoo of SUWON-SI (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/48, H01L27/088, H01L29/06, H01L29/423, H01L29/66, H01L29/775, H01L29/786
CPC Code(s): H01L23/481
Abstract: an integrated circuit device includes a lower insulating structure disposed over a substrate, a lower wiring structure that passes through the lower insulating structure in a vertical direction, an upper insulating structure disposed on the lower insulating structure, and an upper wiring structure that passes through the upper insulating structure in the vertical direction and contacts the lower wiring structure. the upper wiring structure includes an upper metal plug and an upper conductive barrier structure that surrounds a sidewall and a lower surface of the upper metal plug. the upper conductive barrier structure includes a first barrier portion that faces a sidewall of the upper insulating structure, and a second barrier portion interposed between the lower wiring structure and the upper metal plug. the first barrier portion and the second barrier portion have different structures from each other.
Inventor(s): Choongbin YIM of Suwon-si (KR) for samsung electronics co., ltd., Jongkook KIM of Suwon-si (KR) for samsung electronics co., ltd., Chengtar WU of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L21/48, H01L21/56, H01L23/00, H01L23/31, H01L23/538, H01L25/00, H01L25/10
CPC Code(s): H01L23/49816
Abstract: a 3d integrated circuit structure includes a redistribution layer structure; a first semiconductor chip die on the redistribution layer structure; a plurality of core balls on the redistribution layer structure and adjacent the first semiconductor chip die; a molding material encapsulating the first semiconductor chip die and the plurality of core balls on the redistribution layer structure; an interconnection structure on the molding material; and a second semiconductor chip die on the interconnection structure. a footprint of the first semiconductor chip die and footprints of the plurality of core balls are within a footprint of the second semiconductor chip die.
Inventor(s): Chengtar WU of Suwon-si (KR) for samsung electronics co., ltd., Jongkook KIM of Suwon-si (KR) for samsung electronics co., ltd., Choongbin YIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L23/00, H01L25/065
CPC Code(s): H01L23/49822
Abstract: a 3d integrated circuit structure, comprising: a redistribution layer structure; a first semiconductor chip die on the redistribution layer structure; a plurality of sacrificial pads on the redistribution layer structure; a plurality of conductive posts disposed adjacent the first semiconductor chip die, wherein the plurality of conductive posts is on the plurality of sacrificial pads, respectively; a molding material that is on the first semiconductor chip die, the plurality of sacrificial pads, the plurality of conductive posts, and the redistribution layer structure; an interconnection structure on the molding material; and a second semiconductor chip die on the interconnection structure, wherein the second semiconductor chip die overlaps the first semiconductor chip die and the plurality of conductive posts in a vertical direction.
20240258224. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Seungryong Oh of Suwon-si (KR) for samsung electronics co., ltd., Seunghoon Yeon of Suwon-si (KR) for samsung electronics co., ltd., Junho Lee of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L23/00, H01L23/31, H01L25/065
CPC Code(s): H01L23/49827
Abstract: a semiconductor package includes a package-bottom redistribution structure at a lower side of a package and including a conductive line, an upper semiconductor chip at an upper side of the package, an upper back end of line (beol) layer, at a lower side of the upper semiconductor chip, and including a conductive line, a lower semiconductor chip below the upper semiconductor chip, where a horizontal width of the lower semiconductor chip is less than a horizontal width of the upper semiconductor chip, and where the upper semiconductor chip overlaps at least a portion of the lower semiconductor chip, a lower beol layer at a lower side of the lower semiconductor chip and including a conductive line, a passivation layer on an upper surface of the lower semiconductor chip, and a through silicon via (tsv) structure penetrating the passivation layer and the lower semiconductor chip.
20240258228. INTEGRATED CIRCUIT DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Juneyoung Park of Suwon-si (KR) for samsung electronics co., ltd., Heonjong Shin of Suwon-si (KR) for samsung electronics co., ltd., Jaeran Jang of Suwon-si (KR) for samsung electronics co., ltd., Doohyun Lee of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L23/00, H01L25/065
CPC Code(s): H01L23/49838
Abstract: an integrated circuit device includes a first substrate having a first surface and a second surface opposite to the first surface, and including an active device therein, beol structure disposed on the first surface of the first substrate and configured to route signals, a second substrate disposed on the first surface of the first substrate with the first beol structure disposed therebetween, and including a passive device therein, a power distribution structure disposed on the second surface of the first substrate, a first bonding structure positioned on the first beol structure, and a second bonding structure disposed between the first bonding structure and the second substrate.
20240258230. SEMICONDUCTOR DEVICES_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Sungkeun Lim of Suwon-si (KR) for samsung electronics co., ltd., Dohyun Go of Suwon-si (KR) for samsung electronics co., ltd., Unki Kim of Suwon-si (KR) for samsung electronics co., ltd., Hyohoon Byeon of Suwon-si (KR) for samsung electronics co., ltd., Yuyeong Jo of Suwon-si (KR) for samsung electronics co., ltd., Jinyeong Joe of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/522, H01L21/768, H01L23/29, H01L23/31
CPC Code(s): H01L23/5226
Abstract: a semiconductor device includes a substrate; an active region extending on the substrate in a first direction; a protective layer on a lower surface of the substrate; an etch stop layer on a lower surface of the protective layer; a device isolation layer defining the active region; a gate structure on the active region and extending in a second direction, intersecting the first direction; a source/drain region on the active region on both lateral sides of the gate structure; a contact structure connected to the source/drain region; and a power transmission structure electrically connected to the contact structure.
Inventor(s): SANGBONG LEE of Suwon-si (KR) for samsung electronics co., ltd., Seowoo Nam of Suwon-si (KR) for samsung electronics co., ltd., SUNGHO SEO of Suwon-si (KR) for samsung electronics co., ltd., SEOKMYEONG KANG of Suwon-si (KR) for samsung electronics co., ltd., KyuHoon Choi of Suwon-si (KR) for samsung electronics co., ltd., SEUNGSEOK HA of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/535, H01L21/768
CPC Code(s): H01L23/535
Abstract: a semiconductor device includes: a first interlayer insulating layer disposed on a substrate; a first conductive line disposed in the first interlayer insulating layer and having a protrusion protruding above an upper side of the first interlayer insulating layer; an etch stop layer disposed on the first interlayer insulating layer and the first conductive line; and a via passing through the etch stop layer and contacting the first conductive line, wherein the etch stop layer includes a first etch stop layer having a curved shape in a cross-sectional view and a second etch stop layer disposed on the first etch stop layer and having a thickness variation.
20240258242. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Kitae Park of Suwon-si (KR) for samsung electronics co., ltd., Chiwan Song of Suwon-si (KR) for samsung electronics co., ltd., Seungmin Baek of Suwon-si (KR) for samsung electronics co., ltd., Joohyung Lee of Suwon-si (KR) for samsung electronics co., ltd., Joonseok Oh of Suwon-si (KR) for samsung electronics co., ltd., Junghyun Cho of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L23/538, H01L23/00, H01L23/31, H01L25/10, H01L25/18, H10B80/00
CPC Code(s): H01L23/5386
Abstract: a semiconductor package includes a package body, a fan-in-chip structure (fics) in the package body, a first redistribution structure, and a second redistribution structure. the fics includes a first chip having a front surface and a rear surface, a bridge wiring structure including a bridge wiring layer on the rear surface of the first chip, and a bridge pad electrically connected to the bridge wiring layer. the first redistribution structure is on a bottom surface of the package body and the front surface of the first chip and includes a first redistribution element. the second redistribution structure is on a top surface of the package body and the rear surface of the first chip and includes a second redistribution element electrically connected to the bridge wiring structure.
Inventor(s): Sangkyu LEE of Suwon-si (KR) for samsung electronics co., ltd., Yi Eok KWON of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/065, H01L21/56, H01L23/00, H01L25/00
CPC Code(s): H01L25/0657
Abstract: provided is a semiconductor package including a redistribution layer, a three-dimensional integrated circuit (3d ic) structure on the redistribution layer, a plurality of conductive posts on the redistribution layer adjacent to the 3d ic structure, a molding material on the redistribution layer and encapsulating the 3d ic structure and the plurality of conductive posts, and a printed circuit board (pcb) on the molding material.
Inventor(s): Duhyoung AHN of Suwon-si (KR) for samsung electronics co., ltd., Minseok KANG of Suwon-si (KR) for samsung electronics co., ltd., Sungwook MOON of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/065, H01L21/66, H01L23/00
CPC Code(s): H01L25/0657
Abstract: a semiconductor package includes a first semiconductor chip, a second semiconductor chip stacked on the first semiconductor chip, and a plurality of external connection terminals electrically coupled to a lower surface of the first semiconductor chip. the first semiconductor chip includes a substrate including the lower surface and an opposite upper surface, a lower wiring layer in a lower portion of the lower surface including a first plurality of wiring patterns, an upper wiring layer in an upper portion of the upper surface including a second plurality of wiring patterns, a plurality of through structures electrically coupling the lower wiring layer to the upper wiring layer and penetrating the substrate, and a macro cell disposed between the plurality of through structures. at least one of the through structures partially overlaps a wiring pattern of the lower wiring layer in a vertical direction within an overlapping distance from the wiring pattern.
Inventor(s): Wooyoung Kim of Suwon-si (KR) for samsung electronics co., ltd., Sangkyu Lee of Suwon-si (KR) for samsung electronics co., ltd., Jingu Kim of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/065, H01L21/56, H01L23/00, H01L23/31, H01L23/48, H01L23/498, H01L25/10
CPC Code(s): H01L25/0657
Abstract: a semiconductor package may include: a front side redistribution layer; a three-dimensional integrated circuit (3d ic) structure on the front side redistribution layer, the 3d ic structure including a first semiconductor chip die and a second semiconductor chip die having through-silicon vias (tsvs), the first semiconductor chip die on the second semiconductor chip die and electrically coupled with the front side redistribution layer by the tsvs; a printed circuit board on the front side redistribution layer and surrounding the 3d ic structure; a molding material on the front side redistribution layer and at least partially encapsulating the 3d ic structure and the printed circuit board; and a back side redistribution layer on the molding material.
Inventor(s): YI EOK KWON of SUWON-SI (KR) for samsung electronics co., ltd., JINGU KIM of SUWON-SI (KR) for samsung electronics co., ltd., SANGKYU LEE of SUWON-SI (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/065, H01L21/56, H01L23/00, H01L23/538, H01L25/00
CPC Code(s): H01L25/0657
Abstract: a semiconductor package includes: a front side redistribution layer; a three-dimensional integrated circuit (3d ic) structure on the front side redistribution layer, the 3d ic structure including a first semiconductor chip die having through-silicon vias (tsvs) and a second semiconductor chip die disposed on the first semiconductor chip die, and the second semiconductor chip die being electrically coupled with the front side redistribution layer by the through-silicon vias (tsvs); a plurality of connection members between the first semiconductor chip die and the second semiconductor chip die; an insulating member disposed between the first semiconductor chip die and the second semiconductor chip die to surround the plurality of connection members; a molding material disposed on the front side redistribution layer to encapsulate the first semiconductor chip die, the second semiconductor chip die, and the insulating member; and a back side redistribution layer disposed on the molding material.
Inventor(s): Hyungchul SHIN of Suwon-si (KR) for samsung electronics co., ltd., Won IL LEE of Suwon-si (KR) for samsung electronics co., ltd., Hyuekjae LEE of Suwon-si (KR) for samsung electronics co., ltd., Enbin JO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/065, H01L23/00, H01L25/18, H10B80/00
CPC Code(s): H01L25/0657
Abstract: a semiconductor package includes a lower semiconductor chip, a first semiconductor chip, a first through-electrode vertically penetrating the first semiconductor substrate, a first upper pad connected to the first through electrode, a first circuit layer disposed on the lower surface of the first semiconductor substrate, and a first lower pad disposed on a lower surface of the first circuit layer. a second semiconductor chip includes a second through-electrode spaced apart from the first through-electrode and vertically penetrating the second semiconductor substrate. a second upper pad is connected to the second through electrode. a second circuit layer is disposed on the lower surface of the second semiconductor substrate, and a second lower pad is connected to the second through-electrode on the lower surface of the second circuit layer through the second circuit layer and is integrally formed with the first upper pad.
Inventor(s): Sungyong MIN of Suwon-si (KR) for samsung electronics co., ltd., Changjoon LEE of Suwon-si (KR) for samsung electronics co., ltd., Kyungwoon JANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L25/16, H01L23/00
CPC Code(s): H01L25/167
Abstract: a micro light emitting diode (led) chip includes: a first semiconductor layer doped with an n-type dopant; a second semiconductor layer provided at a lower surface of the first semiconductor layer, and doped with a p-type dopant; an active layer provided between the first semiconductor layer and the second semiconductor layer, and configured to emit light; and an electrode pad provided at a lower surface of the second semiconductor layer, wherein the electrode pad may include a groove structure having a depth that increases from an edge of the electrode pad towards a center of the electrode pad.
20240258313. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Bok Young LEE of Seoul (KR) for samsung electronics co., ltd., Young Mook OH of Hwaseong-si (KR) for samsung electronics co., ltd., Hyung Goo LEE of Seoul (KR) for samsung electronics co., ltd., Hae Geon JUNG of Yongin-si (KR) for samsung electronics co., ltd., Seung Mo HA of Seoul (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/088, H01L21/762, H01L21/8238, H01L27/092
CPC Code(s): H01L27/0886
Abstract: a semiconductor device is provided. the semiconductor device includes a substrate, a first base fin protruding from the substrate and extending in a first direction, and a first fin type pattern protruding from the first base fin and extending in the first direction. the first base fin includes a first sidewall and a second sidewall, the first and second sidewalls extending in the first direction, the first sidewall opposite to the second sidewall, the first sidewall of the first base fin at least partially defines a first deep trench, the second sidewall of the first base fin at least partially defines a second deep trench, and a depth of the first deep trench is greater than a depth of the second deep trench.
20240258316. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Kangyoo Song of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/092, H01L21/8238, H01L29/423
CPC Code(s): H01L27/0922
Abstract: provided is a semiconductor device including a substrate having a first region and a second region spaced apart from each other, a plurality of first gate structures disposed in the first region, spaced apart from each other in a first horizontal direction, extending in a second horizontal direction perpendicular to the first horizontal direction, and having a first width, a plurality of second gate structures disposed in the second region, spaced apart from each other in the first horizontal direction, extending in the second horizontal direction, and having a second width greater than the first width, a plurality of single diffusion breaks arranged between the plurality of first gate structures and extending in the second horizontal direction, and a plurality of dummy diffusion breaks arranged between the first region and the second region, extending in the second horizontal direction, and including the same material as the single diffusion breaks.
20240258328. INTEGRATED CIRCUIT DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Donghoon HWANG of Suwon-si (KR) for samsung electronics co., ltd., Inchan Hwang of Suwon-si (KR) for samsung electronics co., ltd., Hyojin Kim of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/12
CPC Code(s): H01L27/124
Abstract: an integrated circuit device is provided. the device includes: lower source/drain areas; lower contacts respectively on bottom surfaces of the lower source/drain areas; upper source/drain areas spaced apart from the lower source/drain areas in a vertical direction; upper contacts respectively on upper surfaces of the upper source/drain areas; and a first vertical conductive rail electrically connected to a first contact of the lower contacts and the upper contacts, the first vertical conductive rail extending in the vertical direction, and including a first portion having a first upper surface at a first vertical level and a second portion having a second upper surface at a second vertical level lower than the first vertical level. the second portion overlaps a first upper contact among the upper contacts in the vertical direction.
Inventor(s): Junghyun KIM of Suwon-si (KR) for samsung electronics co., ltd., Jonghoon PARK of Suwon-si (KR) for samsung electronics co., ltd., Yun Ki LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H01L27/1462
Abstract: an image sensor includes: a substrate; a plurality of photodiodes disposed in the substrate; an element isolation film disposed between the plurality of photodiodes; an anti-reflection layer disposed on the plurality of photodiodes and the element isolation film; a plurality of color filters disposed on the anti-reflection layer; a fence pattern disposed between the plurality of color filters and in the anti-reflection layer; and micro lenses disposed on the plurality of color filters, wherein the fence pattern includes a first layer and a second layer that is disposed on the first layer and that includes a material different from that of the first layer, the first layer is disposed in the anti-reflection layer, and the second layer includes a first part and a second part, wherein the first part is disposed in the plurality of color filters, and wherein the second part is disposed in the anti-reflection layer.
Inventor(s): Byungjun PARK of Suwon-si (KR) for samsung electronics co., ltd., Jieun KIM of Suwon-si (KR) for samsung electronics co., ltd., Woojae JANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H01L27/14623
Abstract: an image sensor may include a first semiconductor chip including a pixel area and a peripheral area, the pixel area including a plurality of pixels, and a second semiconductor chip coupled to a lower surface of the first semiconductor chip, the second semiconductor chip including a plurality of logic elements, the pixel area including a plurality of color filters and a fence in the pixel area, the plurality of color filters corresponding to the plurality of pixels, the fence having a grid pattern, and each of the color filters of the plurality of color filters separated from each other by the fence, the peripheral area including a shield area and a shield outer area, the shield area surrounding the pixel area, and a fence insulating layer included in the shield outer area, the fence insulating layer including a same material as the fence.
Inventor(s): Hyeyeon PARK of Suwon-si (KR) for samsung electronics co., ltd., Yunki LEE of Suwon-si (KR) for samsung electronics co., ltd., Jieun KIM of Suwon-si (KR) for samsung electronics co., ltd., Keosung PARK of Suwon-si (KR) for samsung electronics co., ltd., Hajin LIM of Suwon-si (KR) for samsung electronics co., ltd., Taeksoo JEON of Suwon-si (KR) for samsung electronics co., ltd., Hyunkyu CHOI of Suwon-si (KR) for samsung electronics co., ltd., Jaesung HUR of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H01L27/14625
Abstract: provided is an image sensor including a first substrate including a pixel area and a peripheral area adjacent to the pixel area, the pixel area including a plurality of pixels in a 2-dimensional array, a first wiring layer on a lower surface of the first substrate, an anti-reflective layer having a first refractive index, the anti-reflective layer being on an upper surface of the first substrate, and color filters on the anti-reflective layer corresponding to the pixel area and spaced apart from each other by a metal-free grid pattern.
Inventor(s): Taesung LEE of Hwaseong-si (KR) for samsung electronics co., ltd., Dongmin KEUM of Daegu (KR) for samsung electronics co., ltd., Bumsuk KIM of Hwaseong-si (KR) for samsung electronics co., ltd., Jinho KIM of Seoul (KR) for samsung electronics co., ltd., Junsung PARK of Hwaseong-si (KR) for samsung electronics co., ltd., Kwanghee LEE of Hwaseong-si (KR) for samsung electronics co., ltd., Dongkyu LEE of Suwon-si (KR) for samsung electronics co., ltd., Yunki LEE of Hwaseong-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/146, H04N23/67
CPC Code(s): H01L27/14627
Abstract: an image sensor includes a normal pixel, a first auto-focus (af) pixel, and a second af pixel, each of the normal pixel, the first af pixel and the second af pixel including a photodiode. the image sensor further includes a normal microlens disposed on the normal pixel, and a first af microlens disposed on the first af pixel and the second af pixel. the photodiode of the normal pixel, the photodiode of the first af pixel, and the photodiode of the second af pixel are respectively disposed in photo-detecting areas of a semiconductor substrate. a height of the first af microlens in a vertical direction from a top surface of the semiconductor substrate is greater than a height of the normal microlens in the vertical direction from the top surface of the semiconductor substrate.
20240258352. IMAGE SENSOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Dongchan KIM of Suwon-si (KR) for samsung electronics co., ltd., Byoungho KWON of Suwon-si (KR) for samsung electronics co., ltd., Beomsuk LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H01L27/14629
Abstract: an image sensor including a substrate including an active pixel region and a peripheral region surrounding the active pixel region; a metal layer on a peripheral region of the substrate; a lower reflective layer on the substrate and the metal layer; a resonance layer on the lower reflective layer; and an upper reflective layer on the resonance layer, wherein the resonance layer has a first thickness on the active pixel region in a vertical direction perpendicular to an upper surface of the substrate and a second thickness in the vertical direction on the peripheral region, and the first thickness is greater than the second thickness.
Inventor(s): EUN-JI LEE of Suwon-si (KR) for samsung electronics co., ltd., HYUNCHUL KIM of Seoul (KR) for samsung electronics co., ltd., TAE-HUN LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H01L27/1463
Abstract: an image sensor includes a substrate including a plurality of pixel regions, and a deep isolation pattern in the substrate between the pixel regions. the deep isolation pattern includes a semiconductor pattern penetrating at least a portion of the substrate, and a dielectric pattern disposed between the substrate and the semiconductor pattern. the dielectric pattern includes a first part disposed adjacent to the semiconductor pattern, and a second part disposed between the substrate and the first part. the semiconductor pattern includes a first semiconductor pattern and a second semiconductor pattern. the first semiconductor pattern is disposed between the dielectric pattern and the second semiconductor pattern. the first part of the dielectric pattern includes a material different from a material of the second part of the dielectric pattern. a thickness of the first part of the dielectric pattern is less than a thickness of the second part of the dielectric pattern.
Inventor(s): Jungsan Kim of Suwon-si (KR) for samsung electronics co., ltd., Kwansik Kim of Suwon-si (KR) for samsung electronics co., ltd., Jinyong Choi of Suwon-si (KR) for samsung electronics co., ltd., Gayoung Kim of Suwon-si (KR) for samsung electronics co., ltd., Taemin Kim of Suwon-si (KR) for samsung electronics co., ltd., Yongsoon Park of Suwon-si (KR) for samsung electronics co., ltd., Ingyu Baek of Suwon-si (KR) for samsung electronics co., ltd., Seungho Lee of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H01L27/14632
Abstract: an image sensor includes a lower insulating film arranged over a substrate and having a non-flat surface that has a concave-convex shape and includes a first surface, which extends in a horizontal direction parallel to a frontside surface of the substrate, and at least one second surface extending from the first surface toward the substrate, a capacitor arranged on the lower insulating film to contact the non-flat surface of the lower insulating film and conformally covering the non-flat surface of the lower insulating film along the contour of the non-flat surface of the lower insulating film, an upper insulating film covering the capacitor and the lower insulating film, and at least one air gap having a side facing the at least one second surface of the lower insulating film in the horizontal direction and having a height defined by the upper insulating film in a vertical direction.
Inventor(s): Jinhong KIM of Suwon-si (KR) for samsung electronics co., ltd., Changsoo LEE of Suwon-si (KR) for samsung electronics co., ltd., Cheheung KIM of Hwaseong-si (KR) for samsung electronics co., ltd., Jooho LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01G4/10, H01G4/008, H10B12/00
CPC Code(s): H01L28/75
Abstract: provided is a capacitor including a first thin film electrode layer, a second thin film electrode layer, a dielectric layer disposed between the first thin film electrode layer and the second thin film electrode layer, and an interlayer disposed between the second thin film electrode layer and the dielectric layer. due to the interlayer, the decrease in permittivity of the dielectric layer is small while leakage current may be effectively reduced.
Inventor(s): Changsoo LEE of Suwon-si (KR) for samsung electronics co., ltd., Jinhong KIM of Suwon-si (KR) for samsung electronics co., ltd., Cheheung KIM of Hwaseong-si (KR) for samsung electronics co., ltd., Jooho LEE of Suwon-si (KR) for samsung electronics co., ltd., Yong-Hee CHO of Hwaseong-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H01L28/90
Abstract: a capacitor is provided. the capacitor includes a first electrode, a second electrode disposed to face the first electrode, a dielectric layer of a rutile phase, disposed between the first electrode and the second electrode, and an interface layer between the first electrode and the dielectric layer, wherein the interface layer includes a first interface layer and a second interface layer, the first interface layer is adjacent to the first electrode, the second interface layer is adjacent to the dielectric layer, the first interface layer includes a conductive metal oxide having a work function in a range of about 4.8 ev to about 6.0 ev, the second interface layer includes a metal oxide having a rutile-phase crystal structure, and a thickness of the second interface layer is smaller than a thickness of the first interface layer.
Inventor(s): Kyoungwoo LEE of Suwon-si (KR) for samsung electronics co., ltd., Kyungmin KIM of Hwaseong-si (KR) for samsung electronics co., ltd., Gukhee KIM of Suwon-si (KR) for samsung electronics co., ltd., Beomjin KIM of Suwon-si (KR) for samsung electronics co., ltd., Youngwoo KIM of Hwaseong-si (KR) for samsung electronics co., ltd., Sangcheol NA of Suwon-si (KR) for samsung electronics co., ltd., Anthony Dongick LEE of Suwon-si (KR) for samsung electronics co., ltd., Minseung LEE of Suwon-si (KR) for samsung electronics co., ltd., Myeonggyoon CHAE of Suwon-si (KR) for samsung electronics co., ltd., Seungseok HA of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/417, H01L23/528, H01L27/088, H01L29/06, H01L29/423, H01L29/775, H01L29/786
CPC Code(s): H01L29/4175
Abstract: a semiconductor device includes an active pattern on a substrate, a source/drain pattern on the active pattern, a first metal layer on the source/drain pattern, the first metal layer comprising a power interconnection line, a through-via electrically connected to the power interconnection line, the through-via vertically extending to penetrate the substrate, a power delivery network layer on a bottom surface of the substrate, and a lower through-via between the power delivery network layer and the through-via. the through-via includes a first metal pattern connected to the lower through-via, and a second metal pattern stacked on the first metal pattern. a density of the first metal pattern is greater than a density of the second metal pattern. a resistivity of the first metal pattern is greater than a resistivity of the second metal pattern.
Inventor(s): Hyojung NOH of Suwon-si (KR) for samsung electronics co., ltd., Sungnam LYU of Suwon-si (KR) for samsung electronics co., ltd., Byounghoon LEE of Suwon-si (KR) for samsung electronics co., ltd., Jangeun LEE of Suwon-si (KR) for samsung electronics co., ltd., Eulji JEONG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/423, H10B12/00
CPC Code(s): H01L29/42372
Abstract: a gate structure includes a first conductive pattern including a first metal or a first metal compound and being doped with a second metal or silicon; a second conductive pattern on the first conductive pattern, the second conductive pattern including a third metal; and a gate insulation pattern covering a lower surface and a sidewall of the first conductive pattern and a sidewall of the second conductive pattern; wherein a work function of the second metal is smaller than a work function of the first metal and is smaller than a work function of the first metal compound.
20240258396. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jun Ki PARK of Suwon-si (KR) for samsung electronics co., ltd., Seon-Bae KIM of Suwon-si (KR) for samsung electronics co., ltd., Sung Hwan KIM of Suwon-si (KR) for samsung electronics co., ltd., Wan Don KIM of Suwon-si (KR) for samsung electronics co., ltd., Jin Young PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/45, H01L27/088, H01L29/06, H01L29/417, H01L29/423, H01L29/775, H01L29/786
CPC Code(s): H01L29/456
Abstract: a semiconductor device may include gate structures spaced apart from each other on an active pattern, where each of the gate structures includes gate spacers on sidewalls of a gate electrode, source/drain patterns between the gate structures, source/drain contacts on the source/drain patterns, and contact silicide films between the source/drain contacts and the source/drain patterns. outer surfaces of the contact silicide films may contact the source/drain patterns and inner surfaces of the contact silicide films may contact the source/drain contacts. a width in a first direction of the contact silicide films may be maximum at the uppermost portions of outer surfaces of the contact silicide films. parts of the outer surfaces of the contact silicide films may contact the gate spacers. the width in the first direction of the uppermost portions of the contact silicide films may be equal to a width in the first direction of the source/drain contacts.
Inventor(s): Junhyuk PARK of Suwon-si (KR) for samsung electronics co., ltd., Jaejoon OH of Suwon-si (KR) for samsung electronics co., ltd., Injun HWANG of Suwon-si (KR) for samsung electronics co., ltd., Boram KIM of Suwon-si (KR) for samsung electronics co., ltd., Jongseob KIM of Suwon-si (KR) for samsung electronics co., ltd., Joonyong KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/47, H01L29/20, H01L29/40, H01L29/66, H01L29/778
CPC Code(s): H01L29/475
Abstract: a high electron mobility transistor (hemt) includes a substrate, a channel layer on the substrate, a barrier layer on the channel layer, a p-type gallium nitride (gan) layer on the barrier layer, an n-type interfacial layer on the p-type gan layer, and a gate electrode on the n-type interfacial layer.
20240258399. INTEGRATED CIRCUIT DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Chaeho Na of SUWON-SI (KR) for samsung electronics co., ltd., Sangkoo Kang of SUWON-SI (KR) for samsung electronics co., ltd., Donghyun Roh of SUWON-SI (KR) for samsung electronics co., ltd., Dahye Kim of SUWON-SI (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/49, H01L21/02, H01L29/06, H01L29/40, H01L29/417, H01L29/423, H01L29/66, H01L29/775
CPC Code(s): H01L29/4983
Abstract: an integrated circuit device includes a gate line disposed on a fin-type active region, a source/drain region disposed on the fin-type active region, and an insulating spacer structure that covers the gate line and the source/drain region. the insulating spacer structure includes a first spacer portion that covers the sidewall of the gate line, a second spacer portion integrally connected to the first spacer portion, where the second spacer portion protrudes in a first lateral direction and covers a partial region of a sidewall of the source/drain region, and a spacer corner portion that fills a corner space defined by the gate line and the source/drain region between the first spacer portion and the second spacer portion. the insulating spacer structure has a single film structure that includes a sioc film doped with about 0 at % to about 5 at % of nitrogen atoms.
20240258410. SEMICONDUCTOR DEVICES_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Dongwoo Kim of Suwon-si (KR) for samsung electronics co., ltd., Jinbum Kim of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/732, H01L23/528, H01L29/66
CPC Code(s): H01L29/7325
Abstract: a semiconductor device includes a substrate having a recessed region, a first semiconductor region including a first semiconductor layer on a bottom surface and an inner side surface of the recessed region and a first protrusion on the first semiconductor layer, and having a first conductivity type, a second semiconductor region including a second semiconductor layer on the first semiconductor layer and a second protrusion on the second semiconductor layer, and having a second conductivity type, a third semiconductor region including a third semiconductor layer on the second semiconductor layer and a third protrusion on the third semiconductor layer, and having the first conductivity type, a epitaxial stopper layer covering the bottom surface of the recessed region between the first semiconductor region and the substrate and including a material different from materials of the first semiconductor region, and a dummy gate structure intersecting the first to third protrusions on the substrate.
Inventor(s): Minju AHN of Suwon-si (KR) for samsung electronics co., ltd., JONGMIN SHIN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/775, H01L29/06, H01L29/423, H01L29/66
CPC Code(s): H01L29/775
Abstract: a semiconductor device including a substrate; active patterns positioned on the substrate; a first isolation layer and a second isolation layer positioned between the active patterns; a first protection liner positioned on the first isolation layer; a second protection liner positioned on the second isolation layer; channel patterns positioned on the active patterns: source/drain patterns positioned on both sides of the channel patterns; and a first gate electrode positioned above the first protection liner and the second protection liner, and surrounding the channel patterns, wherein the first isolation layer has a first width, the second isolation layer has a second width wider than the first width, and a first height from the substrate to the first protection liner is greater than a second height from the substrate to the second protection liner.
Inventor(s): Joonyong KIM of Seoul (KR) for samsung electronics co., ltd., Sunkyu HWANG of Seoul (KR) for samsung electronics co., ltd., Jongseob KIM of Seoul (KR) for samsung electronics co., ltd., Junhyuk PARK of Pohang-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/778, H01L29/20, H01L29/40, H01L29/66
CPC Code(s): H01L29/7786
Abstract: provided are a power device and a method of manufacturing the same. the power device may include a channel layer; a source and a drain at respective sides of the channel layer; a gate on the channel layer between the source and the drain; a passivation layer covering the source, the drain, and the gate; and a plurality of field plates in the passivation layer. the plurality of field plates may have different thicknesses. the plurality of field plates may have different widths, different pattern shapes, or both different widths and different pattern shapes.
Inventor(s): Sung Il PARK of Suwon-si (KR) for samsung electronics co., ltd., Min Jun LEE of Suwon-si (KR) for samsung electronics co., ltd., Jae Hyun PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/78, H01L29/08, H01L29/423, H01L29/66
CPC Code(s): H01L29/7851
Abstract: disclosed is a semiconductor device including a first channel layer on a substrate, and a second channel layer on the first channel layer, the first and second channel layers extending in a first direction while being spaced apart from the substrate, and including a 2d semiconductor material, a gate structure on the substrate, the gate structure extending in a second direction, and being penetrated by the first and second channel layers, and source/drain contacts on side surfaces of the gate structure and being connected to the first and second channel layers. the gate structure includes a first gate portion between the substrate and the first channel layer and having a first gate length, a second gate portion between the first and second channel layers and having a second gate length, and a third gate portion on an upper surface of the second channel layer and having a third gate length.
Inventor(s): Jisoo PARK of Suwon-si (KR) for samsung electronics co., ltd., Donghoon HWANG of Suwon-si (KR) for samsung electronics co., ltd., Inchan HWANG of Suwon-si (KR) for samsung electronics co., ltd., Hyojin KIM of Suwon-si (KR) for samsung electronics co., ltd., Jaehyoung LIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L29/786, H01L29/06, H01L29/423, H01L29/775
CPC Code(s): H01L29/78696
Abstract: a 3d stacked fet may include a back-side wiring layer including a first back-side power line and a second back-side power line, a first fet on the back-side wiring layer, a second fet over the first fet, a front-side wiring layer over the second fet, a first through-electrode connecting the first fet to the second fet, and a second through-electrode connecting the front-side and back-side power lines. the front-side wiring layer may extend in a first direction and may include a front-side power line connected to the second back-side power line. the first fet and the second fet may share a gate extending in a second direction. each of the first fet and the second fet may include a source and a drain respectively on both sides of the gate in the first direction, and a channel between the source and the drain and surrounded by the gate.
Inventor(s): Insung JOE of Seoul (KR) for samsung electronics co., ltd., Jonghwa SHIN of Daejeon (KR) for samsung electronics co., ltd., Joonkyo JUNG of Daejeon (KR) for samsung electronics co., ltd., Jong Uk KIM of Hwaseong-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L31/0232, H01L31/102
CPC Code(s): H01L31/02327
Abstract: a light sensing device includes a semiconductor layer including a distributed bragg reflector including a first surface of the semiconductor layer, and a photoelectric conversion unit including a second surface of the semiconductor layer, and the distributed bragg reflector has a plurality of holes each having, in a cross-sectional view, a width gradually changing from a first width to a second width according to a width change period; a first electrode in one region of the semiconductor layer; and a second electrode on the second surface of the semiconductor layer and having a reflective metal.
20240258489. DISPLAY DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Woon Bae KIM of Suwon-si (KR) for samsung electronics co., ltd., Ye Chung CHUNG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01L33/62, H01L25/075, H01L33/64
CPC Code(s): H01L33/62
Abstract: a display device is provided. the display device includes a substrate including a display region and a non-display region adjacent to the display region in a first horizontal direction, a light-emitting element layer on an upper surface of the substrate in the display region, a thin-film substrate connected to the upper surface of the substrate in the non-display region, a first semiconductor chip on a lower surface of the substrate, at least a portion of the first semiconductor chip overlapping with the thin-film substrate in a vertical direction, and a first through-via in the non-display region, the first through-via extending through the substrate in the vertical direction, the first through-via electrically connecting the thin-film substrate and the first semiconductor chip to each other.
Inventor(s): Dongwook SHIN of Suwon-si (KR) for samsung electronics co., ltd., Sukgi HONG of Seongnam-si (KR) for samsung electronics co., ltd., Jinhwan PARK of Seoul (KR) for samsung electronics co., ltd., Byungjin CHOI of Seoul (KR) for samsung electronics co., ltd.
IPC Code(s): H01M4/525, C01G53/00, H01M4/02, H01M4/04, H01M4/131, H01M4/36, H01M4/505, H01M10/0525
CPC Code(s): H01M4/525
Abstract: a composite cathode active material, a cathode and a lithium battery each including the composite cathode active material, and a method of manufacturing the composite cathode active material. the composite cathode active material includes a core including a plurality of primary particles, and a shell disposed on the core, wherein a primary particle of the plurality of primary particles includes a lithium nickel transition metal oxide, the shell includes a first composition and a second composition, wherein the first composition contains a first metal and the second composition contains a second metal, wherein the first metal includes a metal of groups 2, 4, 5, and 7 to 15, the second metal includes a metal of group 3, and the first composition includes a first phase and the second composition includes a second phase that is distinguishable from the first phase.
Inventor(s): Myungjin Lee of Suwon-si, Gyeonggi-do, (KR) for samsung electronics co., ltd., Jirae Kim of Suwon-si, Gyeonggi-do, (KR) for samsung electronics co., ltd., Jeongkuk Shon of Suwon-si, Gyeonggi-do, (KR) for samsung electronics co., ltd., Yongsu Kim of Suwon-si, Gyeonggi-do, (KR) for samsung electronics co., ltd., Jusik Kim of Suwon-si, Gyeonggi-do, (KR) for samsung electronics co., ltd., Changhoon Jung of Suwon-si, Gyeonggi-do, (KR) for samsung electronics co., ltd.
IPC Code(s): H01M4/80, H01M4/02, H01M4/587, H01M4/66
CPC Code(s): H01M4/808
Abstract: an anode for a solid-state secondary battery, the anode including: a three-dimensional porous current collector including a plurality of pores having a lithiophilic property, and having a porosity of about 10 percent to about 99 percent, based on a total volume of the three-dimensional current collector, wherein pores of the plurality of the pores have a size and a pitch, and a ratio of the size to the pitch is about 0.1 to about 0.9; and a first anode active material layer disposed on a first side of the three-dimensional porous current collector, wherein the first anode active material layer is disposed in at least a portion of the pores of the three-dimensional porous current collector.
Inventor(s): Ruoming WANG of Shenzhen (CN) for samsung electronics co., ltd., Jindong GUO of Shenzhen (CN) for samsung electronics co., ltd.
IPC Code(s): H01P1/20, H01P3/16
CPC Code(s): H01P1/2002
Abstract: a dual-mode dielectric waveguide filter and a filtering apparatus are provided. the dual-mode dielectric waveguide filter includes a first dielectric cavity including a first dielectric body, a second dielectric cavity including a second dielectric body, electric field directions of the first dielectric cavity and the second dielectric cavity being perpendicular to each other, and a coupling portion connected with the first dielectric body and the second dielectric body to provide a coupling of the first dielectric cavity and the second dielectric cavity, where the first dielectric body and the second dielectric body are both formed in a rectangular parallelepiped shape, the first dielectric body and the second dielectric body are arranged in a stacked manner in a first direction, and two end faces of the first dielectric cavity and the second dielectric cavity in the third direction are formed as a coupling end face.
Inventor(s): Sumin YUN of Suwon-si (KR) for samsung electronics co., ltd., Hosaeng KIM of Suwon-si (KR) for samsung electronics co., ltd., Seongjin PARK of Suwon-si (KR) for samsung electronics co., ltd., Woomin JANG of Suwon-si (KR) for samsung electronics co., ltd., Jehun JONG of Suwon-si (KR) for samsung electronics co., ltd., Jaehoon JO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H01Q9/04, H01Q1/24, H01Q1/44
CPC Code(s): H01Q9/0421
Abstract: an electronic device is provided that includes a housing, an antenna structure, an electronic component, and a wireless communication circuit. the antenna structure includes a substrate, at least one conductive patch disposed at the substrate, at least one power feeder disposed at a position of the at least one conductive patch, and at least one electrical connection structure. the at least one electrical connection structure includes a first conductive via disposed to pass through the at least one conductive patch and a ground layer of the substrate, and a second conductive via passing through the at least one conductive patch and electrically connected to the ground layer. the electronic component is disposed to overlap at least in part with the at least one conductive patch when the substrate is viewed from above, and is electrically connected to a main board through the at least one electrical connection structure. the wireless communication circuit is electrically connected to the at least one power feeder, and is configured to form a beam pattern in a first direction through the at least one conductive patch.
Inventor(s): Aditya Dave of Plano TX (US) for samsung electronics co., ltd., Jiantong Li of McKinney TX (US) for samsung electronics co., ltd., Alireza Foroozesh of Los Angeles CA (US) for samsung electronics co., ltd., Won Suk Choi of McKinney TX (US) for samsung electronics co., ltd., Gang Xu of Allen TX (US) for samsung electronics co., ltd.
IPC Code(s): H01Q9/04, H01Q21/06
CPC Code(s): H01Q9/0464
Abstract: an apparatus includes a substrate and a plurality of antenna elements on the substrate and arranged according to an antenna configuration. the antenna configuration includes a rectangular antenna patch, and first and second pairs of circular antenna patches. the first pair of circular antenna patches supports a first angular polarization, wherein the circular antenna patches of the first pair are coupled to opposite corners of the rectangular antenna patch. the second pair of circular antenna patches supports a second angular polarization that is orthogonal to the first angular polarization, wherein the antenna patches of the second pair are coupled to opposite corners of the rectangular antenna patch, wherein each of the antenna patches of the first pair are positioned on corners adjacent to both of the antenna patches of the second pair.
Inventor(s): Kwanyeob CHAE of Seoul (KR) for samsung electronics co., ltd., Chulwoo KIM of Seoul (KR) for samsung electronics co., ltd., Yoonjae CHOI of Seoul (KR) for samsung electronics co., ltd., Kyeongkeun KANG of Seoul (KR) for samsung electronics co., ltd.
IPC Code(s): H03K7/02, G06F13/16, G11C11/4076, H03K3/037, H03K19/20
CPC Code(s): H03K7/02
Abstract: a 4-level pulse amplitude modulation (pam-4) decoder including: a comparator configured to receive first input data, second input data, and a clock signal and output first comparison data and second comparison data, wherein the first comparison data and the second comparison data are comparison results for the first input data and the second input data; a clock delay circuit configured to delay the clock signal and generate a delayed clock signal; and a time-windowed least significant bit (lsb) decoder configured to receive the first comparison data, the second comparison data, and the delayed clock signal, wherein the time-windowed lsb decoder is configured to perform a decoding when the delayed clock signal is at a first level.
20240259008. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jin Heo of Suwon-si (KR) for samsung electronics co., ltd., Jongkyu Song of Suwon-si (KR) for samsung electronics co., ltd., Minho Kim of Suwon-si (KR) for samsung electronics co., ltd., Jooyoung Song of Suwon-si (KR) for samsung electronics co., ltd., Chanhee Jeon of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H03K17/08
CPC Code(s): H03K17/08
Abstract: a semiconductor device is provided. the semiconductor device includes: a first power pad; a second power pad; a signal pad; a clamping circuit connected between the first power pad and the second power pad; a driving circuit connected to the signal pad and including a pull-up circuit and a pull-down circuit; and a first gate-off circuit connected to the pull-down circuit. the first gate-off circuit is configured to connect a gate of the pull-down circuit and a source of the pull-down circuit to each other during an electrostatic discharge (esd) event in which a high voltage is applied to the signal pad, and control a current generated by the high voltage to flow to the clamping circuit.
Inventor(s): Sooyeon JUNG of Suwon-si (KR) for samsung electronics co., ltd., Mingyu LEE of Suwon-si (KR) for samsung electronics co., ltd., Taeyoung HA of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04B1/7163, H04W72/0446
CPC Code(s): H04B1/7163
Abstract: a first electronic device according to various embodiments of the present disclosure may: determine a location of the first electronic device via an out of band (oob) connection; select, on the basis of information regarding the determined location, an applet within the first electronic device; and carry out, by using the selected applet, ultra-wideband (uwb) communication with a second electronic device adjacent to the determined location.
Inventor(s): Sripada KADAMBAR of Bangalore (IN) for samsung electronics co., ltd., Ashok Kumar Reddy CHAVVA of Bangalore (IN) for samsung electronics co., ltd., Anirudh Reddy GODALA of Bangalore (IN) for samsung electronics co., ltd., Ashok Kumar SAHOO of Bangalore (IN) for samsung electronics co., ltd., Ankur GOYAL of Bangalore (IN) for samsung electronics co., ltd., Anusha GUNTURU of Bangalore (IN) for samsung electronics co., ltd., Divpreet SINGH of Bangalore (IN) for samsung electronics co., ltd., Ashwini KUMAR of Bangalore (IN) for samsung electronics co., ltd., Chaiman LIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04B7/06
CPC Code(s): H04B7/0626
Abstract: a method for performing a channel state information (csi) prediction by a user equipment (ue) is provided. the method includes receiving a plurality of reference signals from a base station, obtaining a channel quality information (cqi) estimation for an interval based on the received plurality of reference signals, wherein obtaining the cqi estimation includes obtaining at least one of mean mutual information per bit (mmib) or effective exponential signal to noise ratio mapping (eesm), predicting the csi based on the cqi estimation, and reporting the predicted csi to the base station.
Inventor(s): Himke VAN DER VELDE of Staines (GB) for samsung electronics co., ltd., Sangbum KIM of Suwon-si (KR) for samsung electronics co., ltd., Seungbeom JEONG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04L5/00, H04W72/231
CPC Code(s): H04L5/0035
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. disclosed is a method of quality of experience, qoe, reporting, whereby a user equipment, ue, transfers qoe data to a connected telecommunication network, wherein ue push mode, u mode, is employed in all circumstances to transfer qoe information from the ue to the telecommunication network.
Inventor(s): Di SU of Beijing (CN) for samsung electronics co., ltd., Chen QIAN of Beijing (CN) for samsung electronics co., ltd., Yi WANG of Beijing (CN) for samsung electronics co., ltd., Sa ZHANG of Beijing (CN) for samsung electronics co., ltd.
IPC Code(s): H04L5/00, H04L1/1812, H04W72/0457
CPC Code(s): H04L5/0048
Abstract: a terminal, a base station and a method performed by the same in a wireless communication system are provided. the method includes receiving one or more messages from abase station, where the one or more messages include first configuration information for configuring at least one first uplink bandwidth part (bwp) as an active uplink bwp and/or second configuration information for configuring at least one first downlink bwp as an active downlink bwp, and determining the active uplink bwp for an uplink transmission and/or the active downlink bwp for a downlink reception based on at least the first configuration information and/or the second configuration information. the invention can improve transmission quality and transmission rate of communication.
Inventor(s): Aris Papasakellariou of Houston TX (US) for samsung electronics co., ltd.
IPC Code(s): H04L5/00, H04W72/044, H04W72/23
CPC Code(s): H04L5/0055
Abstract: enhancing reception reliability for control information or data information includes receiving: a first configuration for a coreset and a second configuration for a second coreset; a first pdcch, in the first coreset or the second coreset, including a first dci format; and a first pdsch, scheduled by the first dci format, including a tb. the method further includes transmitting a first pucch including a first harq-ack codebook and a second pucch including a second harq-ack codebook. harq-ack information, in response to receiving the tb, is included in: the first harq-ack codebook when the first pdcch is received in the first coreset and the second harq-ack codebook when the first pdcch is received in the second coreset.
Inventor(s): Seunghoon CHOI of Suwon-si (KR) for samsung electronics co., ltd., Youngbum KIM of Suwon-si (KR) for samsung electronics co., ltd., Hyunseok RYU of Suwon-si (KR) for samsung electronics co., ltd., Sungjin PARK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04L5/00, H04L27/26, H04W88/14
CPC Code(s): H04L5/0092
Abstract: the disclosure relates to a 5generation (5g) or 6generation (6g) communication system for supporting a higher data transmission rate. a method of operating an integrated access and backhaul (iab) donor node in a wireless communication system is provided. the method includes transmitting frequency division multiplexing (fdm)-related information or spatial division multiplexing (sdm)-related information to an iab node, receiving necessary information from the iab node, and transmitting or receiving backhaul data with respect to the iab node by applying the fdm or the smd, based on the fdm-related information or the smd-related information.
[[20240259173. METHOD AND APPARATUS FOR ACTIVATING AND REACTIVATING SCELL CONSIDERING CURRENTLY ACTIVATED BANDWIDTH PART AND BANDWIDTH PART CONFIGURATION INFORMATION IN NEXT-GENERATION MOBILE COMMUNICATION SYSTEM_simplified_abstract_(samsung electronics co., ltd.)]]
Inventor(s): Donggun KIM of Suwon-si (KR) for samsung electronics co., ltd., Jaehyuk JANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04L5/00, H04W24/08, H04W52/36, H04W72/0453, H04W72/23, H04W72/54
CPC Code(s): H04L5/0098
Abstract: the present disclosure relates to a communication method and system for converging a 5-generation (5g) communication system for supporting higher data rates beyond a 4-generation (4g) system with a technology for internet of things (iot). the present disclosure may be applied to intelligent services based on the 5g communication technology and the iot-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. a method of introducing a new dormant bandwidth part (bwp) and operating the dormant bwp in units of bwps (bandwidth part-level) is provided.
Inventor(s): Byungwook CHO of Suwon-si (KR) for samsung electronics co., ltd., Subin YIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04L7/00
CPC Code(s): H04L7/0025
Abstract: a receiving device includes a delay buffer configured to receive an analog signal and output a delayed analog signal, a phase interpolator configured to output a clock signal based on a phase compensation code signal and a reference clock signal, an analog-to-digital converter group configured to output a slope type determination signal indicating a slope of the analog signal based on the analog signal and the delayed analog signal, and a clock data restorer. the clock data restorer is configured to determine a curve type associated with a plurality of digital samples from the analog-to-digital converter group. the clock data restorer also evaluates a timing of the clock signal based on the curve type and the slope type determination signal, and outputs the phase compensation code signal to move the sample timing closer to an optimum timing.
Inventor(s): Federico PENNA of San Diego CA (US) for samsung electronics co., ltd., Sili LU of San Diego CA (US) for samsung electronics co., ltd., Yuansheng CHENG of San Diego CA (US) for samsung electronics co., ltd., Jang Wook MOON of San Diego CA (US) for samsung electronics co., ltd., Jung Hyun BAE of San Diego CA (US) for samsung electronics co., ltd., Dongwoon BAI of San Diego CA (US) for samsung electronics co., ltd.
IPC Code(s): H04L25/02, H04L27/26
CPC Code(s): H04L25/024
Abstract: a method and system include a symbol processing block to generate log likelihood ratios (llrs) associated with one or more data symbols. the method and system include a channel estimation (ce) module to receive the llrs from the symbol processing block, and to process iterative ce (itce) for new radio (nr) based at least on reference signals and the llrs. the ce module can process the itce with a granularity of one or more resource blocks (rbs) based at least on pilot resource elements (res) and virtual pilot res obtained from the llrs. the ce module can process the itce based at least on a frequency domain orthogonal cover codes (fd-occ) structure of the reference signals. the reference signals can be demodulation reference signals (dmrs) configured in 5g nr. the ce module can process the itce by updating a ce result by adding a quantity that represents a contribution obtained from virtual pilot res.
Inventor(s): Jungsoo Kim of Suwon-si (KR) for samsung electronics co., ltd., Hyunjoon Yoo of Suwon-si (KR) for samsung electronics co., ltd., Bumjun Kim of Suwon-si (KR) for samsung electronics co., ltd., Mehee Yun of Suwon-si (KR) for samsung electronics co., ltd., Sang-Hwa Jin of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04L45/00, H04L45/302, H04L47/2425
CPC Code(s): H04L45/38
Abstract: a routing method that may be performed by a system on chip of a backplane that is connected between a plurality of hosts and a plurality of devices. the routing method may include: monitoring traffic of the plurality of devices; determining mode types of the plurality of devices according to the monitored traffic; and performing routing to allocate lanes between the plurality of devices and the backplane according to the mode types.
Inventor(s): Jina HAM of Suwon-si (KR) for samsung electronics co., ltd., Jaewon KIM of Suwon-si (KR) for samsung electronics co., ltd., Yewon PARK of Suwon-si (KR) for samsung electronics co., ltd., Dongil YANG of Suwon-si (KR) for samsung electronics co., ltd., Jiyeon LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04L51/02, G06F3/0482, H04L51/04
CPC Code(s): H04L51/02
Abstract: a server and a control method thereof are provided. the method for controlling the server includes obtaining information of an activity of a user using a service system, determining a user intent based on the information on the activity of the user, transmitting a question text to a chatbot system by obtaining the question text corresponding to the user intent based on the user intent, receiving a first response text to the question text from the chatbot system, determining whether to transmit the first response text to a user terminal of the user based on the first response text, and transmitting the first response text to the user terminal.
Inventor(s): Aneesh DESHMUKH of Bangalore (IN) for samsung electronics co., ltd., Nayan OSTWAL of Bangalore (IN) for samsung electronics co., ltd., Neha SHARMA of Bangalore (IN) for samsung electronics co., ltd., Mahantesh KOTHIWALE of Bangalore (IN) for samsung electronics co., ltd., Anshuman NIGAM of Bangalore (IN) for samsung electronics co., ltd., Mayank SONU of Bangalore (IN) for samsung electronics co., ltd., M Sasank SAI of Bangalore (IN) for samsung electronics co., ltd., Jiyoung CHA of Suwon-si (KR) for samsung electronics co., ltd., Dongmyoung KIM of Boram-ro (KR) for samsung electronics co., ltd.
IPC Code(s): H04L69/324, H04W80/04
CPC Code(s): H04L69/324
Abstract: a method for processing at least one internet protocol (ip) packet performed by a converged layer 2 (l2) in a wireless communication system is provided. the method includes receiving, by the converged l2, at least one internet protocol (ip) packet as a service data unit (sdu) from an ip layer, assigning, by the converged l2, a sequence number to the received at least one ip packet, adding, by the converged l2, at least one l2 header to the received at least one ip packet to process a protocol data unit (pdu), and transmitting, by the converged l2, the processed at least one pdu to at least one medium access control (mac) lower layer.
Inventor(s): Jaeho KANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04M1/02, G06F1/16
CPC Code(s): H04M1/022
Abstract: an electronic device is provided. the electronic device includes a first housing, a second housing, and a hinge structure connected to the first housing and the second housing such that the first housing rotates about a first axis of rotation parallel to a first axial direction and the second housing rotates about a second axis of rotation parallel to the first axial direction. the first housing and the second housing form an angle. the hinge structure includes a first arm shaft configured to operate based on rotation of the first housing, the first arm shaft being parallel to the first axial direction, a second arm shaft configured to operate based on rotation of the second housing, the second arm shaft being parallel to the first axial direction, and a torque structure.
Inventor(s): Daehyun JO of Suwon-si (KR) for samsung electronics co., ltd., Wooyoung KIM of Suwon-si (KR) for samsung electronics co., ltd., Wonhee LEE of Suwon-si (KR) for samsung electronics co., ltd., Heejun CHOI of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04M1/72466, G06F3/0346, G06F3/038, G06F3/14, H04M1/02
CPC Code(s): H04M1/72466
Abstract: an electronic device is provided. the electronic device includes a first housing including a first surface and a second surface facing the first surface and spaced apart therefrom, a second housing including a third surface and a fourth surface facing the third surface and spaced apart therefrom, a folding housing which pivotably connects a side surface of the first housing and a side surface of the second housing facing the side surface of the first housing, at least one inertial sensor in at least one of the first housing and the second housing, a first display disposed on the first surface and the third surface across the folding housing, a second display disposed on the second surface or the fourth surface, memory storing one or more computer programs and one or more processors, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors, cause the electronic device to while the second display is disabled in a folding state in which the first surface faces the third surface, obtain, through the at least one inertial sensor, first data indicating a posture of the electronic device and second data indicating a movement state of the electronic device, based on detecting, while identifying the electronic device being moved in a specified posture based on the first data and the second data, a specified event, change, based on a reception of a touch input on an enabled second display, a time duration in which the second display is enabled in accordance with the specified event, and based on detecting the specified event, while identifying the electronic device being moved in a posture different from the specified posture based on the first data and the second data, maintain, independently from the reception of the touch input, the time duration.
20240259521. DISPLAY APPARATUS_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Yonghwan PARK of Suwon-si (KR) for samsung electronics co., ltd., Minkeun Kim of Suwon-si (KR) for samsung electronics co., ltd., Junki Noh of Suwon-si (KR) for samsung electronics co., ltd., Dongmun Park of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N5/645, F16M11/04
CPC Code(s): H04N5/645
Abstract: a display apparatus includes: a display panel; a rear support member at a rear of the display panel and including a stud protruding rearward; a stand configured to be coupled to the rear support member and including a key hole into which the stud is inserted in a first direction, wherein the stand is configured to be moved in a second direction relative to the stud; and a holder configured to be coupled to the stand and move the stand in the second direction so that the stud inserted into the key hole is locked in the key hole.
Inventor(s): Juhee JEONG of Suwon-si (KR) for samsung electronics co., ltd., Minjin SONG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N7/18, G06V10/56, G06V20/68, H04N23/60
CPC Code(s): H04N7/183
Abstract: a cooking device includes a camera and a processor configured to: based on identifying a first event related to acquiring an image of a food ingredient arranged in the cooking device, adjust a set value for a parameter related to the camera and acquire a first set value, acquire, based on the first set value, an image of the food ingredient, based on identifying a second event while the image is being acquired, acquire a second set value, acquire a first image of the food ingredient based on the second set value, and provide the first image to a user, acquire a second image wherein the second set value used in acquiring the first image is changed to the first set value, and input the second image into an object recognition model configured to recognize the food ingredient, and acquire information on the food ingredient based on the second image.
Inventor(s): Hyungchul Kim of Suwon-si (KR) for samsung electronics co., ltd., Seunghyun Moon of Suwon-si (KR) for samsung electronics co., ltd., Sungho Chae of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N9/31, G06T7/70, G06V20/50
CPC Code(s): H04N9/3185
Abstract: an electronic apparatus includes a projection unit, a sensor assembly; and a processor configured to: acquire state information including at least one of horizontal inclination information, vertical inclination information, or horizontal distortion information based on sensing data acquired through the sensor assembly, based on acquiring at least one of the horizontal inclination information or the vertical inclination information in the state information, perform a keystone function, based on acquiring the horizontal distortion information in the state information, perform a leveling function, and control the projection unit to output a projection image onto a projection surface.
Inventor(s): Minsoo Park of Suwon-si (KR) for samsung electronics co., ltd., Minwoo Park of Suwon-si (KR) for samsung electronics co., ltd., Kiho Choi of Suwon-si (KR) for samsung electronics co., ltd., Yinji Piao of Suwon-si (KR) for samsung electronics co., ltd., Seungsoo Jeong of Suwon-si (KR) for samsung electronics co., ltd., Narae Choi of Suwon-si (KR) for samsung electronics co., ltd., Woongil Choi of Suwon-si (KR) for samsung electronics co., ltd., Anish Tamse of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N19/119, H04N19/176
CPC Code(s): H04N19/119
Abstract: a video decoding method includes obtaining information indicating a first difference between a maximum size of a coding unit having a 1:4 ratio and a size of a largest coding unit, determining the maximum size of the coding unit of having the 1:4 ratio by using the size of the largest coding unit and the first difference, determining a minimum size of the coding unit having the 1:4 ratio based on a minimum size of a coding unit, determining whether a coding having the 1:4 ratio may be generated by splitting a first coding unit based on the maximum size and the minimum size of the coding unit having the 1:4 ratio, and determining a second coding unit including the coding unit having the 1:4 ratio, from the first coding unit, and decoding the second coding unit.
Inventor(s): Minwoo PARK of Suwon-si (KR) for samsung electronics co., ltd., Minsoo PARK of Suwon-si (KR) for samsung electronics co., ltd., Narae CHOI of Suwon-si (KR) for samsung electronics co., ltd., Seungsoo JEONG of Suwon-si (KR) for samsung electronics co., ltd., Anish TAMSE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N19/137, H04N19/132, H04N19/159, H04N19/176
CPC Code(s): H04N19/137
Abstract: a video decoding method includes, determining a center motion vector of a current block by using a base motion vector of the current block based on affine model-based inter-prediction being performed in the current block, determining a reference range of an area to be referred to, with respect to the current block, based on a size of the current block, based on a reference area having a size of the reference range with respect to a point in a reference picture of the current block, the point being indicated by a central motion vector of the current block, deviating from or including a boundary of the reference picture, changing the reference area by parallelly translating the reference area into a current picture, and determining prediction samples of sub-blocks of the current block in the changed reference area from the reference picture.
Inventor(s): Minwoo PARK of Suwon-si (KR) for samsung electronics co., ltd., Minsoo PARK of Suwon-si (KR) for samsung electronics co., ltd., Kwangpyo CHOI of Suwon-si (KR) for samsung electronics co., ltd., Kiho CHOI of Suwon-si (KR) for samsung electronics co., ltd., Yinji PIAO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N19/139, H04N19/105, H04N19/11, H04N19/172, H04N19/176, H04N19/52
CPC Code(s): H04N19/139
Abstract: a method, performed by an image decoding apparatus, of decoding a motion vector, including obtaining information indicating a motion vector resolution of a current block from a bitstream; selecting a first neighboring block from among neighboring blocks adjacent to the current block, by using the obtained information indicating the motion vector resolution of the current block; based on the current block referring to a reference picture in a list 0, and the first neighboring block referring to the reference picture in the list 0, determining a prediction motion vector of the current block using a motion vector of the first neighboring block; based on the current block referring to the reference picture in the list 0 and the first neighboring block referring to a reference picture in a list 1, selecting a motion vector of a second neighboring block among the neighboring blocks as a basic motion vector, and determining the prediction motion vector of the current block using the determined basic motion vector; and determining a motion vector of the current block using the prediction motion vector of the current block.
Inventor(s): Jaehyoung PARK of () for samsung electronics co., ltd., Dongsoo Kim of Suwon-si (KR) for samsung electronics co., ltd., Kawang Kang of Suwon-si (KR) for samsung electronics co., ltd., Yunjeong Kim of Suwon-si (KR) for samsung electronics co., ltd., Inah Moon of Suwon-si (KR) for samsung electronics co., ltd., Byeongjoo Song of Suwon-si (KR) for samsung electronics co., ltd., Shuichi Shimokawa of Suwon-si (KR) for samsung electronics co., ltd., Yeotak Youn of Suwon-si (KR) for samsung electronics co., ltd., Hyeoncheol Jo of Suwon-si (KR) for samsung electronics co., ltd., Youngbae Son of Suwon-si (KR) for samsung electronics co., ltd., Jonghoon Won of Suwon-si (KR) for samsung electronics co., ltd., Suhyog Kwon of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N23/667, G06T3/4015, G06T3/4038, H04N23/55, H04N25/46
CPC Code(s): H04N23/667
Abstract: an electronic device is configured to determine a mode corresponding to a first resolution of an image; output a first raw image data corresponding to a first data read out from the first photo diode; acquire a first image corresponding to the first resolution, based on a result of inputting the first raw image data to a machine learning model; output a second raw image data acquired by performing an image processing operation about a second data which is read out from the set of second photo diodes, based on the determined mode corresponding to a second resolution which is lower than the first resolution; and acquire a second image corresponding to the second resolution by performing a second image signal processing of the second raw image data.
Inventor(s): Anurag Mithalal JAIN of Bangalore (IN) for samsung electronics co., ltd., Gaurav Kumar JAIN of Bangalore (IN) for samsung electronics co., ltd., Praveen R. JADHAV of Bangalore (IN) for samsung electronics co., ltd., Kiran NATARAJU of Bangalore (IN) for samsung electronics co., ltd.
IPC Code(s): H04N23/951, H04N23/667
CPC Code(s): H04N23/951
Abstract: a method of performing interested event based image capture by an electronic device includes receiving a plurality of image frames, storing the plurality of image frames in a high-resolution buffer, converting the plurality of image frames into a plurality of low-resolution image frames, detecting an interested event in at least one low-resolution image frame of the plurality of low-resolution image frames, determining a visual score of the interested event in the at least one detected low-resolution image frame, and obtaining at least one image frame corresponding to the at least one detected low-resolution image frame from the high-resolution buffer, based on the visual score.
Inventor(s): CHANGHOON CHOI of SUWON-SI (KR) for samsung electronics co., ltd., SEUNGWON CHOI of SUWON-SI (KR) for samsung electronics co., ltd., HYUNCHEOL KIM of SUWON-SI (KR) for samsung electronics co., ltd., JONGSEONG CHOI of SUWON-SI (KR) for samsung electronics co., ltd.
IPC Code(s): H04N25/61, H04N23/71, H04N23/72, H04N23/75, H04N23/76, H04N25/51
CPC Code(s): H04N25/61
Abstract: a lens shading correction circuit includes an elliptical gain generation circuit configured to extract a position of a pixel and generate an elliptical gain value using elliptical gain parameters and the extracted position and a multiplier configured to output an output value by multiplying the elliptical gain value by a weight for the pixel. the lens shading correction circuit corrects the lens shading based on the first output value and a gain increment value.
Inventor(s): Ho Yong NA of Suwon-si (KR) for samsung electronics co., ltd., Kyung Min KIM of Suwon-si (KR) for samsung electronics co., ltd., Min Sun KEEL of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N25/772
CPC Code(s): H04N25/772
Abstract: in some embodiments, an image sensing device includes a pixel array including a capacitor, a read circuit, and a plurality of pixels including a first and a second photodiode. the image sensing device further includes a driver configured to generate control signals for the plurality of pixels, an analog-to-digital converter (adc) block configured to generate a digital signal, and a controller configured to control the driver and the adc block. at least one of the plurality of pixels is configured to sequentially output a first and a second sub-output signal obtained by converting charges accumulated in the first photodiode, a third sub-output signal obtained by converting charges accumulated in the second photodiode, a fourth sub-output signal obtained by converting third charges stored in the capacitor, a first reset signal corresponding to the fourth sub-output signal, and a second reset signal corresponding to the third sub-output signal.
20240259712. IMAGE SENSOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Sungyong KIM of Suwon-si (KR) for samsung electronics co., ltd., Ji-Yong KIM of Suwon-si (KR) for samsung electronics co., ltd., Jaejin JUNG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N25/76, H04N25/78
CPC Code(s): H04N25/7795
Abstract: an image sensor includes: a first substrate including a plurality of pixels; and a second substrate including a clock signal generator configured to generate a first clock signal, at least one buffer configured to receive the first clock signal from the clock signal generator and generate a buffered clock signal, a ramp signal generator configured to receive the buffered clock signal and generate a ramp signal based on the buffered clock signal, wherein a time length of an on-duty period of the first clock signal is different from a time length of an on-duty period of the buffered clock signal.
Inventor(s): Injun Park of Suwon-si (KR) for samsung electronics co., ltd., Jaehong Kim of Suwon-si (KR) for samsung electronics co., ltd., Jinwoo Kim of Suwon-si (KR) for samsung electronics co., ltd., Daehwa Paik of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N25/78, H03K5/24, H04N25/709
CPC Code(s): H04N25/78
Abstract: provided are a comparator and an image sensor including the same. the comparator includes a first input transistor including a gate connected to a first input node, a second input transistor including a gate connected to a second input node, a first load transistor including a drain connected to the first input transistor, a second load transistor including a drain connected to the second input transistor, a first shift transistor including a drain connected to the first load transistor, a second shift transistor including a drain connected to the second load transistor, a first bottom switch connected to the first load transistor in parallel, a second bottom switch connected to the second load transistor in parallel, a first top switch connected to the first shift transistor in parallel, and a second top switch connected to the second shift transistor in parallel.
20240259715. IMAGE SENSOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Changhyung CHOI of Suwon-si (KR) for samsung electronics co., ltd., Jaehong KIM of Suwon-si (KR) for samsung electronics co., ltd., Jinwoo KIM of Suwon-si (KR) for samsung electronics co., ltd., Daehwa PAIK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04N25/78, H03M1/56, H04N17/00
CPC Code(s): H04N25/78
Abstract: an image sensor is provided. the image sensor according to an example embodiment includes a pixel array including a plurality of pixels, a ramp signal generator configured to generate a ramp signal that increases or decreases with a constant slope, a signal selector configured to output the ramp signal and one of a pixel signal and a test signal output from the pixel array, and a comparison circuit configured to receive the ramp signal and the test signal from the signal selector during a first period, output a first comparison result of the ramp signal and the test signal, receive the pixel signal and the ramp signal from the signal selector during a second period after the first period, and output a second comparison result of the pixel signal and the ramp signal.
Inventor(s): Taehyung LIM of Suwon-si (KR) for samsung electronics co., ltd., Kangjin YOON of Suwon-si (KR) for samsung electronics co., ltd., Jonghoe KOO of Suwon-si (KR) for samsung electronics co., ltd., Duckey LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W8/18, H04L41/0806, H04L67/303, H04L67/306
CPC Code(s): H04W8/183
Abstract: the disclosure relates to a communication technique for combining an iot technology with a 5g communication system for supporting a higher data transmission rate than that of a beyond-4g system, and a system therefor. the disclosure may be applied to intelligent services (for example, smart homes, smart buildings, smart cities, smart cars or connected cars, health care, digital education, retail businesses, security and safety related services, and the like) based on 5g communication technologies and iot-related technologies. the disclosure provides a method and apparatus for recovering a profile in the case of a profile movement failure during a movement of a profile between smart security media.
Inventor(s): Kisuk KWEON of Gyeonggi-do (KR) for samsung electronics co., ltd.
IPC Code(s): H04W8/20, H04W8/02
CPC Code(s): H04W8/20
Abstract: the present disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate and, more specifically, to a method for controlling transmission of non-internet protocol (non-ip) address data of a roaming terminal in unified data management (udm) of a wireless communication system.
Inventor(s): Donggun KIM of Suwon-si (KR) for samsung electronics co., ltd., Soenghun KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W12/0433, H04W12/037, H04W12/106, H04W12/45, H04W76/11, H04W76/27
CPC Code(s): H04W12/0433
Abstract: the disclosure relates to a communication scheme and system for converging a 5generation (5g) communication system for supporting a data rate higher than that of a 4generation (4g) system with an internet of things (iot) technology. the disclosure is applicable to intelligent services (e.g., smart home, smart building, smart city, smart car or connected car, health care, digital education, retail, and security and safety-related services) based on the 5g communication technology and the iot-related technology. the disclosure relates to a method and apparatus for allowing a base station to identify a ciphering key (count value) for security enhancement.
Inventor(s): Ravi SURANA of Bangalore (IN) for samsung electronics co., ltd., Naveen KOLATI of Bangalore (IN) for samsung electronics co., ltd., Hoonjae LEE of Suwon-si (KR) for samsung electronics co., ltd., Bhavin SHAH of Bangalore (IN) for samsung electronics co., ltd., Yongtae KIM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W24/02, G06N20/00, H04W8/22, H04W24/10, H04W80/10
CPC Code(s): H04W24/02
Abstract: embodiments herein disclose methods for handling a data driven model in a wireless communication network. the method includes identifying, by a first electronic device, a common data driven model capability between a capability information of one or more first data driven model and a capability information of one or more second data driven model. the one or more first data driven model is associated with the first electronic device and the one or more second data driven model is associated with the second electronic device. further, the method includes performing, by the first electronic device, one of: storing the common data driven model capability in the first electronic device on identifying the common data driven model capability, and disabling a data driven model capability in the first electronic device on not identifying the common data driven model capability.
Inventor(s): Dalin Zhu of Allen TX (US) for samsung electronics co., ltd., Emad Nader Farag of Flanders NJ (US) for samsung electronics co., ltd., Eko Onggosanusi of Coppell TX (US) for samsung electronics co., ltd.
IPC Code(s): H04W24/08, H04L1/1812, H04W72/1268, H04W72/1273, H04W72/232, H04W76/20
CPC Code(s): H04W24/08
Abstract: methods and apparatuses for beam failure declaration, new beam identification, and recovery in multi transmission and reception point (trp) operation. a method performed by a user equipment (ue) includes transmitting a physical uplink shared channel (pusch) including a first reference signal (rs) index for a first beam failure recovery request associated with a first beam failure detection (bfd) rs set; receiving a response to the first beam failure recovery request; receiving first information for reception of a physical downlink control channel (pdcch); and receiving second information for reception of a physical downlink shared channel (pdsch). the method further includes determining, based on the response and the first information, whether to apply a first spatial domain filter according to the first rs index for reception of the pdcch and determining, based on the response and the second information, whether to apply a second spatial domain filter according to the first rs index for reception of the pdsch.
Inventor(s): June HWANG of Suwon-si (KR) for samsung electronics co., ltd., Hyunjeong KANG of Suwon-si (KR) for samsung electronics co., ltd., Taeseop LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W28/02, H04W64/00
CPC Code(s): H04W28/0226
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transfer rate. a method performed by an access and mobility management function (amf) entity in a wireless communication system is provided. the method comprises: receiving a first message for requesting information on a location of a target user equipment (ue); transmitting, to a location management function (lmf) entity, a second message for requesting the information on the location of the target ue; and receiving, from the lmf entity, a third message including the information on the location of the target ue, wherein the second message includes identification information about a serving cell for the target ue, and information about whether the serving cell is a moving cell.
Inventor(s): Lixiang XU of Beijing (CN) for samsung electronics co., ltd., Hong WANG of Beijing (CN) for samsung electronics co., ltd., Weiwei WANG of Beijing (CN) for samsung electronics co., ltd.
IPC Code(s): H04W36/00, H04W36/08
CPC Code(s): H04W36/0022
Abstract: the present disclosure relates to a communication method and system for converging a 5th-generation (5g) communication system for supporting higher data rates beyond a 4th-generation (4g) system with a technology for internet of things (iot). the present disclosure may be applied to intelligent services based on the 5g communication technology and the iot-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. according to an aspect of the embodiments of the present disclosure, a method for supporting handover is provided, comprising: receiving a message from a central unit control plane entity of a target base station; receiving a data packet from a source base station; and discarding a packet data convergence protocol (pdcp) service data unit (sdu) including the pdcp sequence number (sn) in the received data packet according to the indication of the message.
Inventor(s): Mehrdad SHARIAT of Staines (GB) for samsung electronics co., ltd., Mahmoud WATFA of Staines (GB) for samsung electronics co., ltd.
IPC Code(s): H04W48/04, H04W48/16
CPC Code(s): H04W48/04
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. this disclosure discloses a method of controlling a 5g network performed by a network entity in a wireless communication, the method comprising defining a proximity services, prose, behaviour of at least one of first ue or the second ue in respect of a restricted service area.
Inventor(s): Nishithkumar D. Tripathi of Parker TX (US) for samsung electronics co., ltd., Kyeongin Jeong of Allen TX (US) for samsung electronics co., ltd.
IPC Code(s): H04W48/16, H04B17/318, H04W48/04, H04W48/20
CPC Code(s): H04W48/16
Abstract: methods and apparatuses of ue for an efficient neighbor cell search in a wireless communication network. a method of a ue comprises: receiving system information including time instance information for performing measurements on neighboring cells; identifying a time instance included in the time instance information; determining, based on a comparison between a current absolute time and the time instance, whether to perform the measurements on the neighboring cells; and skipping performing the measurements on the neighboring cells based on a determination that the current absolute time is before the time instance.
Inventor(s): Lalith KUMAR of Bangalore (IN) for samsung electronics co., ltd., Alok Kumar JANGID of Bangalore (IN) for samsung electronics co., ltd., Kailash Kumar JHA of Bangalore (IN) for samsung electronics co., ltd., Danish Ehsan HASHMI of Bangalore (IN) for samsung electronics co., ltd., Govind Irappa UTTUR of Bangalore (IN) for samsung electronics co., ltd.
IPC Code(s): H04W48/16, H04W8/08, H04W36/00, H04W60/04, H04W60/06, H04W76/11, H04W76/25, H04W84/04, H04W88/06
CPC Code(s): H04W48/16
Abstract: embodiments herein achieve a method for handling registration and session management in a wireless communication system. the method includes registering, by a user equipment (ue), with a first core network entity over a 3gpp access network and a non-3gpp access network. further, the method includes triggering, by the ue, a registration procedure to a second core network over the 3gpp access network when a periodic timer of the ue expires in an oos state. further, the method includes receiving, by the ue, a non-access stratum (nas) message, over the 3gpp access network, with an indication to register for the non-3gpp access network with the second core network entity. further, the method includes reinitiating the registration procedure to register again for the non-3gpp access with the second core network entity through the non-3gpp access network.
20240259941. TRIGGERING A MAIN RECEIVER_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Hongbo Si of Allen TX (US) for samsung electronics co., ltd.
IPC Code(s): H04W52/02, H04W76/27
CPC Code(s): H04W52/0229
Abstract: apparatuses and methods for triggering a main receiver (mr). a method of a user equipment (ue) in a wireless communication system is provided. the method includes receiving a low-power wake up signal (lp-wus) using a low-power receiver (lr); determining, based on the lp-wus, an indication on whether to trigger a transceiver of the ue to receive a physical downlink control channel (pdcch); and receiving, using the transceiver, the pdcch based on the indication.
Inventor(s): Jinyong LEE of Suwon-si (KR) for samsung electronics co., ltd., Jungwoon LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W56/00, H04L5/00, H04L27/20
CPC Code(s): H04W56/0015
Abstract: a method of performing synchronization and frequency offset estimation for an input signal includes receiving an input signal through a wireless channel, and performing a frequency compensation operation on the input signal based on a reference signal to generate a compensated input signal. the reference signal corresponds to an access code associated with the input signal. the method includes determining a synchronization timing and a frequency offset for the input signal by comparing the reference signal with the compensated input signal.
Inventor(s): Hoda SHAHMOHAMMADIAN of San Diego CA (US) for samsung electronics co., ltd., Jung Hyun BAE of San Diego CA (US) for samsung electronics co., ltd., Mohamed AWADIN of San Diego CA (US) for samsung electronics co., ltd.
IPC Code(s): H04W56/00, H04B7/024, H04W74/00, H04W74/0833
CPC Code(s): H04W56/0045
Abstract: a system and a method are provided in which a user equipment (ue) acquires, from a base station (bs), a first timing advance (ta) value for a first transmission and reception point (trp) and a second ta value for a second trp via random access channel (rach) signaling based on an identifier. the ue manages the first ta value and the second ta value during multi-trp transmission within a cell having the first trp and the second trp.
Inventor(s): Kyungjoo SUH of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W60/00, H04W24/04, H04W84/04
CPC Code(s): H04W60/00
Abstract: the present disclosure relates to a device and an operating method of a terminal in a wireless communication system. the operating method of the terminal may include receiving, from a first access and mobility management function (amf) corresponding to a first public land mobile network (plmn), a first registration accept message including information related to a disaster plmn (dplmn), selecting a second plmn based on the first registration accept message, transmitting, to a second amf corresponding to the second plmn, a registration request message in which a disaster-related indication is configured, and receiving, from the second amf, a second registration accept message, based on the registration request message.
Inventor(s): June HWANG of Suwon-si (KR) for samsung electronics co., ltd., Hyunjeong KANG of Suwon-si (KR) for samsung electronics co., ltd., Beomsik BAE of Suwon-si (KR) for samsung electronics co., ltd., Taeseop LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W64/00, H04W24/10, H04W88/08
CPC Code(s): H04W64/006
Abstract: the disclosure relates to a fifth generation (5g) or sixth generation (6g) communication system for supporting a higher data transmission rate. a method performed by a base station in a wireless communication system is provided. the method includes receiving, from a location management function (lmf) entity, a transmission reception point (trp) information request message including at least one trp identification (id), and transmitting, to the lmf entity, a trp information response message including first indication information indicating that a trp corresponding to the trp id is a moving cell.
Inventor(s): June HWANG of Suwon-si (KR) for samsung electronics co., ltd., Soenghun KIM of Suwon-si (KR) for samsung electronics co., ltd., Sangyeob JUNG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W68/00, H04W24/08, H04W72/23, H04W76/11, H04W76/27, H04W80/02
CPC Code(s): H04W68/005
Abstract: a communication technique for convergence of internet of thing (iot) technology and a 5th generation (5g) communication system for supporting a higher data transfer rate beyond a 4th generation (4g) system, and a system therefor are provided. the disclosure can be applied to intelligent services (e.g., smart homes, smart buildings, smart cities, smart or connected cars, health care, digital education, retail business, and services associated with security and safety) on the basis of 5g communication technology and iot-related technology. the disclosure provides a paging monitoring method according to a state of a terminal and a method for reporting a connection setup failure in consideration of an inactive state of the terminal.
Inventor(s): Mohamed AWADIN of San Diego CA (US) for samsung electronics co., ltd., Jung Hyun BAE of San Diego CA (US) for samsung electronics co., ltd., Yuan-sheng CHENG of San Diego CA (US) for samsung electronics co., ltd.
IPC Code(s): H04W72/0453, H04W28/26, H04W72/0457, H04W72/232
CPC Code(s): H04W72/0453
Abstract: a system and a method are disclosed. the method includes configuring the ue with a first ul subband configuration for communicating with an external device, wherein the first ul subband configuration designates a first set of one or more resource blocks (rbs) inside of a carrier for the ue to perform ul transmission, receiving a downlink (dl) signal indication, and overriding the first ul subband configuration with a second subband configuration based on the dl signal indication, wherein the second subband configuration designates a first communication configuration of the first set of one or more rbs inside of a subband and a second communication configuration of a second set of rbs outside of the subband.
Inventor(s): Buseop JUNG of Suwon-si (KR) for samsung electronics co., ltd., Hyejung Bang of Suwon-si (KR) for samsung electronics co., ltd., Wonjun Jang of Suwon-si (KR) for samsung electronics co., ltd., Sunkee Lee of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W72/0453, H04W4/80
CPC Code(s): H04W72/0453
Abstract: there is provide an electronic device and an operation method of the electronic device. the operation method of the electronic device includes performing discovery of an external electronic device to be connected to the electronic device via short-range wireless communication, receiving performance information of the external electronic device during a group owner (go) negotiation procedure performed between the external electronic device and the electronic device, the performance information corresponding to whether simultaneous transmission and reception of signals of different frequency bands is supported by the external electronic device, and based on an attribute of an application executed on the electronic device and performance information of the external electronic device, selecting a first frequency band or a first channel for connection to the external electronic device.
Inventor(s): Sungjin PARK of Suwon-si (KR) for samsung electronics co., ltd., Hyunseok RYU of Suwon-si (KR) for samsung electronics co., ltd., Jeongho YEO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W72/11, H04L1/1812, H04L5/14, H04W72/115, H04W72/1273, H04W72/51
CPC Code(s): H04W72/11
Abstract: the present invention provides a method and device in which: a first set of unicast pdsch and a second set of multicast pdsch are confirmed on the basis of sps configuration; if the pdsch is associated with c-rnti, the received pdsch and a pdsch overlapping the received pdsch are excluded from the first set; and, if the pdsch is not associated with c-rnti, the received pdsch and a pdsch overlapping the received pdsch are excluded from the second set.
Inventor(s): Seungil PARK of Suwon-si (KR) for samsung electronics co., ltd., Sunhyun KIM of Suwon-si (KR) for samsung electronics co., ltd., Byounghoon JUNG of Suwon-si (KR) for samsung electronics co., ltd., Jungsoo JUNG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W72/1268, H04W72/0446, H04W72/21, H04W84/06
CPC Code(s): H04W72/1268
Abstract: according to an embodiment of the disclosure, a method by which a user equipment (ue) transmits uplink (ul) data to a base station (bs) to handle traffic which occurs in a communication system includes obtaining, from the bs, resource map information relating to an available contention-based resource, transmitting, to the bs, a scheduling request message, control information and at least a portion of the ul data based on the resource map information, and determining whether the at least a portion of the ul data is successfully transmitted, wherein the control information includes information relating to a contention-based resource used to transmit the at least a portion of the ul data.
Inventor(s): Deokhui LEE of Suwon-si (KR) for samsung electronics co., ltd., Dongmyung KIM of Suwon-si (KR) for samsung electronics co., ltd., Sunhyun KIM of Suwon-si (KR) for samsung electronics co., ltd., Bongsung SEO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W72/1273, H04L1/00, H04L1/1812, H04W72/23
CPC Code(s): H04W72/1273
Abstract: the present disclosure relates to a 5g communication system or a 6g communication system for supporting higher data rates beyond a 4g communication system such as long term evolution (lte). a method performed by a terminal for physical downlink shared channel (pdsch) repetition in the 5g or 6g communication system is provided. the method includes receiving downlink control information (dci) which schedules a plurality of pdschs from a base station on a physical downlink control channel (pdcch), receiving a first pdsch of a first modulation and coding scheme (mcs) level from the base station based on the dci, and, if failing in decoding the first pdsch, receiving a second pdsch of a second mcs level from the base station based on the dci.
Inventor(s): Sungjin PARK of Suwon-si (KR) for samsung electronics co., ltd., Youngbum KIM of Suwon-si (KR) for samsung electronics co., ltd., Hyunseok RYU of Suwon-si (KR) for samsung electronics co., ltd., Jeongho YEO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W72/23, H04L1/1812, H04L1/1867, H04W72/121
CPC Code(s): H04W72/23
Abstract: the disclosure relates to a communication technique that converges a 5generation (5g) communication system for supporting a higher data rate after a 4generation (4g) system with internet of things (iot) technology, and a system thereof. the disclosure can be applied to intelligent services (e.g., smart home, smart building, smart city, smart or connected car, healthcare, digital education, retail, security and safety related services, etc.) based on 5g communication technology and iot-related technology. a method and apparatus for performing unauthorized-based communication and hybrid automatic repeat request acknowledgement (harq-ack) information transmission therefor are provided.
Inventor(s): Ahmed A. ABOTABL of San Diego CA (US) for samsung electronics co., ltd., Jung Hyun BAE of San Diego CA (US) for samsung electronics co., ltd.
IPC Code(s): H04W74/0808, H04W24/08, H04W72/23
CPC Code(s): H04W74/0808
Abstract: various aspects include a method of providing, by a network to a ue device, a transmission grant. the method includes initiating a process to provide the transmission grant for a transmission within a particular time. the method includes verifying that there is no cancellation indication that overlaps the particular time. the method includes providing, based on the verification, the transmission grant to the ue device. the method includes determining whether there is no transmission that overlaps with a cancellation window associated with a monitoring occasion, and based on the determination, skipping the monitoring occasion. also disclosed a system for providing a transmission grant to the ue device.
Inventor(s): Rubayet Shafin of Allen TX (US) for samsung electronics co., ltd., Boon Loong Ng of Plano TX (US) for samsung electronics co., ltd.
IPC Code(s): H04W76/15, H04W8/24, H04W76/14
CPC Code(s): H04W76/15
Abstract: methods and apparatuses for facilitating the use of enhanced multi-link single radio (emlsr) operation for peer-to-peer (p2p) communications between peer multi-link devices (mlds). a first non-access point (ap) mld comprises first stations (stas), each comprising a transceiver configured to form a p2p link with a corresponding second sta of a second non-ap mld, and a processor. the processor is configured to generate a capability indication message that includes a capability indication that indicates that the first non-ap mld is capable of emlsr mode operation for p2p communication over the p2p links. at least one of the transceivers is further configured to transmit the capability indication message to the second non-ap mld.
Inventor(s): Beomsik BAE of Suwon-si (KR) for samsung electronics co., ltd., Sangyeob JUNG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W76/25, H04W36/00, H04W76/27
CPC Code(s): H04W76/25
Abstract: the present disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. a method performed by a secondary node (sn) base station in a wireless communication system according to one embodiment of the present disclosure comprises the steps of: receiving a first message comprising gap configuration auxiliary information from a multiple universal subscriber identity module user equipment (musim ue) having configured dual connectivity with the sn base station and a master node (mn) base station; generating scheduling gap configuration information for controlling scheduling for the musim ue, on the basis of the gap configuration auxiliary information; and transmitting a second message comprising the generated scheduling gap configuration information to the musim ue.
Inventor(s): Anil AGIWAL of Suwon-si (KR) for samsung electronics co., ltd., Hyunjeong KANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H04W76/28, H04W72/232, H04W72/40
CPC Code(s): H04W76/28
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. a method performed by a user equipment (ue) in a communication system includes: receiving a discontinuous transmission (dtx) configuration associated with a dtx duration; identifying that the ue is configured with sidelink resource allocation mode 1; in case that the ue is configured with a resource pool for sidelink communication during the dtx duration: switching to sidelink resource allocation mode 2 based on entering the dtx duration; and performing the sidelink communication during the dtx duration based on a resource of the resource pool selected by the ue.
Inventor(s): Jungkyu KOOK of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H05K5/00, H01R12/71, H01R12/72, H05K1/14
CPC Code(s): H05K5/0069
Abstract: provided is an electronic device system including a first electronic device including a first substrate, a second electronic device including a second substrate, and a data transferer including a first connector and a second connector, the data transferer configured to connect the first electronic device and the second electronic device, the first substrate including the first recess area and the second recess area spaced apart from the first recess area, and the first recess area and the second recess area are at a same depth.
20240260213. DISPLAY DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Pilyong OH of Suwon-si (KR) for samsung electronics co., ltd., Seungjae KIM of Suwon-si (KR) for samsung electronics co., ltd., Kwangjae LEE of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H05K5/02, H04R1/02
CPC Code(s): H05K5/0217
Abstract: a display apparatus includes: a display panel; a rear cover covering a rear of the display panel; a front chassis including: a side exterior part covering a side of the display panel and including a chassis emitting hole, and a rear flange extending from the side exterior part and forming an accommodation space between the display panel and the side exterior part, the rear flange facing and being coupled to the rear cover; a speaker module including a module emitting hole configured to emit sound to a side edge of the speaker module, wherein at least a portion of the speaker module is in the accommodation space such that the module emitting hole is adjacent to and faces the chassis emitting hole; and a module mount configured to be coupled to the front chassis and the speaker module to prevent the speaker module from being separated from the accommodation space.
Inventor(s): Jinseong Lee of Suwon-si (KR) for samsung electronics co., ltd., Jihye Kwon of Suwon-si (KR) for samsung electronics co., ltd., Jihun Kim of Suwon-si (KR) for samsung electronics co., ltd., Kyosuk Chae of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/0335
Abstract: a semiconductor device includes a substrate including an active region. a gate structure is disposed in the substrate and extends to traverse the active region in a first horizontal direction. bit line structures traverse the gate structure and extend in a second horizontal direction, intersecting the first horizontal direction. fence structures are disposed between the bit line structures. the fence structures are spaced apart from each other in the second horizontal direction. a contact plug is disposed between the bit line structures and between the fence structures. the contact plug includes first and second side surfaces that are spaced apart from each other in the second horizontal direction and third and fourth side surfaces that are spaced apart from each other in the first horizontal direction. a doping concentration of the first side surface is higher than a doping concentration of the third side surface.
Inventor(s): Taeyoung EOM of Suwon si (KR) for samsung electronics co., ltd., Sunghoon Bae of Suwon si (KR) for samsung electronics co., ltd., Halim Noh of Suwon si (KR) for samsung electronics co., ltd., Heecheol Shin of Suwon si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/482
Abstract: a semiconductor device includes a substrate having an active region defined by a device separation layer, a plurality of bit lines on the substrate, a buried contact disposed on the substrate between adjacent bit lines among the plurality of bit lines and connected to the active region, an intermediate conductive layer disposed on the buried contact, a landing pad disposed on the intermediate conductive layer, and an insulating pattern on a sidewall of the landing pad and contacting at least a portion of a top surface of the intermediate conductive layer.
Inventor(s): Taeyoon HONG of Suwon-si (KR) for samsung electronics co., ltd., Janggn YUN of Suwon-si (KR) for samsung electronics co., ltd., Hyunho KIM of Suwon-si (KR) for samsung electronics co., ltd., Jeehoon HAN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B43/27, H10B41/27, H10B41/35, H10B41/50, H10B43/35, H10B43/50
CPC Code(s): H10B43/27
Abstract: a field effect transistor includes a horizontal channel layer, an interlayer insulating layer on the horizontal channel layer, a gate electrode layer on the interlayer insulating layer, a first vertical channel structure passing through the gate electrode layer and the interlayer insulating layer in a vertical direction, in contact with the horizontal channel layer, and connected to one of a source terminal or a drain terminal, and a second vertical channel structure apart from the first vertical channel structure in a horizontal direction, passing through the gate electrode layer and the interlayer insulating layer in the vertical direction, in contact with the horizontal channel layer, and connected to another of the source terminal or the drain terminal.
Inventor(s): Dukhyun CHOE of Suwon-si (KR) for samsung electronics co., ltd., Jinseong HEO of Suwon-si (KR) for samsung electronics co., ltd., Hyunjae LEE of Suwon-si (KR) for samsung electronics co., ltd., Seunggeol NAM of Suwon-si (KR) for samsung electronics co., ltd., Yoonsang PARK of Suwon-si (KR) for samsung electronics co., ltd., Sijung YOO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B51/20, H01L21/28, H01L29/51, H01L29/78, H10B53/20
CPC Code(s): H10B51/20
Abstract: provided are a memory device implementing multi-bit functionality and a memory apparatus including the memory device. the memory device includes a semiconductor substrate, a gate electrode on the semiconductor substrate, and a plurality of ferroelectric layers laminated between the semiconductor substrate and the gate electrode in a first direction perpendicular to a surface of the semiconductor substrate and including at least one first ferroelectric layer and at least one second ferroelectric layer. the first ferroelectric layer has a doping concentration gradient in which a doping concentration increases in the first direction, and the second ferroelectric layer has a doping concentration gradient in which a doping concentration decreases in the first direction. the memory device is configured to implement multi-bit functionality according to an operating voltage.
Inventor(s): Youngji NOH of Suwon-si (KR) for samsung electronics co., ltd., Jongho WOO of Suwon-si (KR) for samsung electronics co., ltd., Joo-Heon KANG of Suwon-si (KR) for samsung electronics co., ltd., Myunghun WOO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10B63/00
CPC Code(s): H10B63/845
Abstract: a semiconductor device including a cell array structure on a semiconductor substrate, the cell array structure including an electrode structure including electrodes and insulating layers vertically and alternately stacked on the semiconductor substrate, and a vertical structure and a penetration contact plug penetrating the electrode structure may be provided. the vertical structure may include a first inner layer, a first outer layer, and a first intermediate layer, and the penetration contact plug may include a second inner layer, a second outer layer, and a second intermediate layer. the electrodes may include a doped semiconductor material, and the first and second outer layers may include the same material. the first and second intermediate layers may include the same material, and the first and second inner layers may include materials different from each other.
Inventor(s): Sungyoung SHIN of Suwon-si (KR) for samsung electronics co., ltd., Minsuk UHM of Suwon-si (KR) for samsung electronics co., ltd., Yilin WU of Suwon-si (KR) for samsung electronics co., ltd., Dongseop LEE of Suwon-si (KR) for samsung electronics co., ltd., Haechang LEE of Suwon-si (KR) for samsung electronics co., ltd., Kwangtai KIM of Suwon-si (KR) for samsung electronics co., ltd., Donghyun YEOM of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10K59/80, G06F3/044, H10K59/122, H10K59/35, H10K59/38, H10K59/40
CPC Code(s): H10K59/8792
Abstract: a display device may include a display panel and a display driving circuit operatively coupled to the display panel. the display panel may include: a pixel layer including a first set of a plurality of first pixels and a second set of a plurality of second pixels providing a viewing angle that is narrower than a viewing angle provided through the plurality of first pixels; a conductive pattern disposed on the pixel layer; and an organic insulating layer disposed between a transparent member and the conductive pattern, and including a light blocking member in contact with the transparent member and having openings dividing each of sub-pixels included in each of the plurality of second pixels. various other embodiments are possible.
Inventor(s): Jae Hoon KIM of Suwon-si (KR) for samsung electronics co., ltd., Hyeonwoo SEO of Suwon-si (KR) for samsung electronics co., ltd., YoungJun CHO of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10N50/01, H10B61/00, H10N50/10
CPC Code(s): H10N50/01
Abstract: a method of manufacturing a magnetic memory device may include forming a bottom electrode layer on a substrate; forming a block structure on the bottom electrode layer; performing a first deposition process on the bottom electrode layer to form a pinned magnetic layer, a tunnel barrier layer, and a free magnetic layer on the bottom electrode layer; performing a second deposition process on the free magnetic layer to form a capping layer on the free magnetic layer; and performing an etching process after forming a hard mask on the capping layer to form magnetic tunnel junction patterns. the first deposition process may include irradiating a first beam toward the substrate. the second deposition process may include irradiating a second beam toward the substrate. the second beam may have a greater angle than the first beam with respect to a normal line perpendicular to an upper surface of the substrate.
Inventor(s): Daeseok HAN of Suwon-si (KR) for samsung electronics co., ltd., Jaehyeong LEE of Suwon-si (KR) for samsung electronics co., ltd., Jinhyoun KANG of Suwon-si (KR) for samsung electronics co., ltd., Daeyun KIM of Suwon-si (KR) for samsung electronics co., ltd., Jaeho SHIN of Suwon-si (KR) for samsung electronics co., ltd., Daeho YANG of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10N60/12, H10N60/01, H10N60/80
CPC Code(s): H10N60/124
Abstract: a device including a josephson junction device including a first superconductor layer, a first oxide layer disposed on a first upper surface of the first superconductor layer, a second superconductor layer disposed to partially overlap the first superconductor layer, a second oxide layer disposed on a second upper surface of the second superconductor layer, and a third superconductor layer including a first portion facing the first upper surface of the first superconductor layer and a second portion facing the second upper surface of the second superconductor layer, and a first thickness of a first portion of the first oxide layer between a lower surface of the first portion of the third superconductor layer and a third upper surface of the first superconductor layer is less than a second thickness of a second portion of the first oxide layer.
20240260485. QUANTUM PROCESSING ARCHITECTURE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Hyeokshin KWON of Suwon-si (KR) for samsung electronics co., ltd., Jinhyoun KANG of Suwon-si (KR) for samsung electronics co., ltd., Insu JEON of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10N60/81, G06N10/40, H01L25/04, H01P3/12, H01Q1/22, H10N69/00
CPC Code(s): H10N60/815
Abstract: a quantum processing device includes a first qubit chip including a first qubit device, a second qubit chip including a second qubit device, and a coupler configured to electrically connect the first qubit chip to the second qubit chip by using resonance.
Inventor(s): Jaehyeong LEE of Suwon-si (KR) for samsung electronics co., ltd., Jinhyoun KANG of Suwon-si (KR) for samsung electronics co., ltd., Insu JEON of Suwon-si (KR) for samsung electronics co., ltd., Jaeho SHIN of Suwon-si (KR) for samsung electronics co., ltd.
IPC Code(s): H10N69/00
CPC Code(s): H10N69/00
Abstract: a qubit chip device includes: a substrate; a superconducting qubit on the substrate; and a readout circuit on the substrate and electrically connected to the superconducting qubit, the readout circuit including: a signal line on a surface of the substrate; a ground plate on the surface of the substrate, the ground plate including a pattern forming a coplanar waveguide along the signal line and offset from the signal line; and a conductive bridge embedded in the substrate and connecting two portions of the ground plate in a direction crossing the signal line.
Samsung Electronics Co., Ltd. patent applications on August 1st, 2024
- Samsung Electronics Co., Ltd.
- A61B5/16
- A61B5/00
- A61B5/11
- G08B21/18
- CPC A61B5/165
- Samsung electronics co., ltd.
- A61H3/00
- A61H1/02
- CPC A61H3/00
- A63B24/00
- B22F3/14
- G01N29/14
- CPC B22F3/14
- B65G1/04
- CPC B65G1/0457
- B65G1/137
- CPC B65G1/0464
- C09K11/88
- B82Y20/00
- B82Y40/00
- C09K11/02
- H05B33/14
- H10K50/115
- H10K50/15
- H10K50/16
- H10K50/17
- CPC C09K11/883
- C23C16/448
- C23C16/455
- CPC C23C16/448
- D06F34/04
- D06F33/32
- D06F33/47
- D06F34/05
- D06F34/24
- D06F34/28
- D06F37/42
- D06F101/20
- D06F103/16
- D06F105/00
- D06F105/58
- G06Q50/10
- G08B5/22
- H04L12/28
- H04L67/12
- H04L67/306
- H04M1/72403
- H04Q9/00
- CPC D06F34/04
- D06F39/02
- D06F23/04
- D06F39/12
- CPC D06F39/02
- CPC D06F39/022
- F25D23/12
- F25D23/02
- F25D23/04
- CPC F25D23/126
- G01B11/06
- G01B11/24
- G01B15/04
- CPC G01B11/06
- G01K7/42
- CPC G01K7/42
- G01N21/95
- G01N21/31
- G06N20/00
- CPC G01N21/9501
- G01R31/26
- CPC G01R31/2635
- G11C16/04
- G11C16/16
- H01L23/00
- H01L25/065
- H01L25/18
- H10B80/00
- CPC G01R31/2637
- G01R31/367
- G01R31/36
- G01R31/3842
- G01R31/387
- G01R31/392
- CPC G01R31/367
- G01R31/55
- G01R19/165
- H02H1/00
- H02H3/12
- H05K1/14
- CPC G01R31/55
- G03F7/004
- C07F7/22
- CPC G03F7/0042
- G03F7/039
- CPC G03F7/0045
- C07F9/6596
- G03F7/075
- G03F7/16
- G03F7/38
- H01L21/027
- G06F1/16
- H04M1/02
- H05K1/18
- H05K5/02
- CPC G06F1/1681
- G06F3/04842
- G06F3/04886
- G06V40/16
- CPC G06F3/04842
- G06F3/06
- CPC G06F3/061
- CPC G06F3/0616
- G06F11/30
- CPC G06F3/0631
- CPC G06F3/0656
- CPC G06F3/0659
- G06F8/34
- G06F3/0482
- G06F9/451
- CPC G06F8/34
- G06F8/654
- CPC G06F8/654
- G06F9/30
- CPC G06F9/3004
- G06F9/38
- G06F9/32
- CPC G06F9/3851
- G06F11/14
- G06F1/30
- CPC G06F11/1417
- G06F12/08
- CPC G06F12/08
- G06F12/0811
- G06F12/0891
- CPC G06F12/0811
- G06F30/13
- G06F111/20
- CPC G06F30/13
- G06F30/398
- CPC G06F30/398
- G06N3/04
- G06F17/15
- G06F17/16
- G06N3/08
- G06T9/00
- CPC G06N3/04
- G06N3/045
- CPC G06N3/045
- G06N3/0495
- CPC G06N3/0495
- G06N3/065
- H01L21/28
- H01L29/423
- H01L29/66
- H01L29/788
- H01L29/808
- H10B41/30
- CPC G06N3/065
- CPC G06N3/08
- G06N3/098
- CPC G06N3/098
- G06N5/02
- G06F40/295
- CPC G06N5/02
- G06T5/50
- G06T5/70
- CPC G06T5/50
- G06T7/20
- G06T5/00
- CPC G06T5/92
- G06T3/40
- G06T15/50
- CPC G06T5/94
- G06T7/00
- CPC G06T7/0004
- G06T7/11
- G02B27/00
- G02B27/01
- G06T7/194
- G06V10/25
- G09G5/391
- CPC G06T7/11
- G06T19/00
- G16Y40/30
- CPC G06T19/003
- G06T5/20
- G06V10/44
- CPC G06T19/006
- G06V10/764
- G06V10/30
- G06V10/77
- CPC G06V10/764
- G06V10/774
- G06T7/50
- G06T7/70
- G06T7/90
- G06T17/00
- G06V10/82
- CPC G06V10/774
- G09G3/20
- G01S13/42
- CPC G09G3/2092
- G10L15/06
- G10L15/30
- CPC G10L15/063
- G11C7/22
- G11C7/10
- G11C8/18
- CPC G11C7/222
- G06F13/16
- CPC G11C7/225
- G11C8/06
- G11C8/04
- CPC G11C8/06
- G11C11/22
- G11C5/06
- H10B51/10
- H10B51/20
- H10B51/40
- CPC G11C11/2257
- G11C11/4091
- G11C11/408
- G11C11/4094
- CPC G11C11/4091
- G11C29/02
- G11C29/00
- CPC G11C29/022
- G11C29/44
- G11C29/18
- CPC G11C29/44
- CPC G11C29/702
- H01J37/32
- CPC H01J37/32715
- CPC H01J37/32724
- H01L21/768
- H01L23/522
- CPC H01L21/76814
- H01L21/66
- CPC H01L22/12
- H01L23/48
- H01L23/528
- CPC H01L22/30
- H01L23/498
- CPC H01L23/481
- H01L29/06
- H01L29/417
- H01L29/775
- H01L29/786
- H01L27/088
- H01L21/48
- H01L21/56
- H01L23/31
- H01L23/538
- H01L25/00
- H01L25/10
- CPC H01L23/49816
- CPC H01L23/49822
- CPC H01L23/49827
- CPC H01L23/49838
- H01L23/29
- CPC H01L23/5226
- H01L23/535
- CPC H01L23/535
- CPC H01L23/5386
- CPC H01L25/0657
- H01L25/16
- CPC H01L25/167
- H01L21/762
- H01L21/8238
- H01L27/092
- CPC H01L27/0886
- CPC H01L27/0922
- H01L27/12
- CPC H01L27/124
- H01L27/146
- CPC H01L27/1462
- CPC H01L27/14623
- CPC H01L27/14625
- H04N23/67
- CPC H01L27/14627
- CPC H01L27/14629
- CPC H01L27/1463
- CPC H01L27/14632
- H01G4/10
- H01G4/008
- H10B12/00
- CPC H01L28/75
- CPC H01L28/90
- CPC H01L29/4175
- CPC H01L29/42372
- H01L29/45
- CPC H01L29/456
- H01L29/47
- H01L29/20
- H01L29/40
- H01L29/778
- CPC H01L29/475
- H01L29/49
- H01L21/02
- CPC H01L29/4983
- H01L29/732
- CPC H01L29/7325
- CPC H01L29/775
- CPC H01L29/7786
- H01L29/78
- H01L29/08
- CPC H01L29/7851
- CPC H01L29/78696
- H01L31/0232
- H01L31/102
- CPC H01L31/02327
- H01L33/62
- H01L25/075
- H01L33/64
- CPC H01L33/62
- H01M4/525
- C01G53/00
- H01M4/02
- H01M4/04
- H01M4/131
- H01M4/36
- H01M4/505
- H01M10/0525
- CPC H01M4/525
- H01M4/80
- H01M4/587
- H01M4/66
- CPC H01M4/808
- H01P1/20
- H01P3/16
- CPC H01P1/2002
- H01Q9/04
- H01Q1/24
- H01Q1/44
- CPC H01Q9/0421
- H01Q21/06
- CPC H01Q9/0464
- H03K7/02
- G11C11/4076
- H03K3/037
- H03K19/20
- CPC H03K7/02
- H03K17/08
- CPC H03K17/08
- H04B1/7163
- H04W72/0446
- CPC H04B1/7163
- H04B7/06
- CPC H04B7/0626
- H04L5/00
- H04W72/231
- CPC H04L5/0035
- H04L1/1812
- H04W72/0457
- CPC H04L5/0048
- H04W72/044
- H04W72/23
- CPC H04L5/0055
- H04L27/26
- H04W88/14
- CPC H04L5/0092
- H04W24/08
- H04W52/36
- H04W72/0453
- H04W72/54
- CPC H04L5/0098
- H04L7/00
- CPC H04L7/0025
- H04L25/02
- CPC H04L25/024
- H04L45/00
- H04L45/302
- H04L47/2425
- CPC H04L45/38
- H04L51/02
- H04L51/04
- CPC H04L51/02
- H04L69/324
- H04W80/04
- CPC H04L69/324
- CPC H04M1/022
- H04M1/72466
- G06F3/0346
- G06F3/038
- G06F3/14
- CPC H04M1/72466
- H04N5/645
- F16M11/04
- CPC H04N5/645
- H04N7/18
- G06V10/56
- G06V20/68
- H04N23/60
- CPC H04N7/183
- H04N9/31
- G06V20/50
- CPC H04N9/3185
- H04N19/119
- H04N19/176
- CPC H04N19/119
- H04N19/137
- H04N19/132
- H04N19/159
- CPC H04N19/137
- H04N19/139
- H04N19/105
- H04N19/11
- H04N19/172
- H04N19/52
- CPC H04N19/139
- H04N23/667
- G06T3/4015
- G06T3/4038
- H04N23/55
- H04N25/46
- CPC H04N23/667
- H04N23/951
- CPC H04N23/951
- H04N25/61
- H04N23/71
- H04N23/72
- H04N23/75
- H04N23/76
- H04N25/51
- CPC H04N25/61
- H04N25/772
- CPC H04N25/772
- H04N25/76
- H04N25/78
- CPC H04N25/7795
- H03K5/24
- H04N25/709
- CPC H04N25/78
- H03M1/56
- H04N17/00
- H04W8/18
- H04L41/0806
- H04L67/303
- CPC H04W8/183
- H04W8/20
- H04W8/02
- CPC H04W8/20
- H04W12/0433
- H04W12/037
- H04W12/106
- H04W12/45
- H04W76/11
- H04W76/27
- CPC H04W12/0433
- H04W24/02
- H04W8/22
- H04W24/10
- H04W80/10
- CPC H04W24/02
- H04W72/1268
- H04W72/1273
- H04W72/232
- H04W76/20
- CPC H04W24/08
- H04W28/02
- H04W64/00
- CPC H04W28/0226
- H04W36/00
- H04W36/08
- CPC H04W36/0022
- H04W48/04
- H04W48/16
- CPC H04W48/04
- H04B17/318
- H04W48/20
- CPC H04W48/16
- H04W8/08
- H04W60/04
- H04W60/06
- H04W76/25
- H04W84/04
- H04W88/06
- H04W52/02
- CPC H04W52/0229
- H04W56/00
- H04L27/20
- CPC H04W56/0015
- H04B7/024
- H04W74/00
- H04W74/0833
- CPC H04W56/0045
- H04W60/00
- H04W24/04
- CPC H04W60/00
- H04W88/08
- CPC H04W64/006
- H04W68/00
- H04W80/02
- CPC H04W68/005
- H04W28/26
- CPC H04W72/0453
- H04W4/80
- H04W72/11
- H04L5/14
- H04W72/115
- H04W72/51
- CPC H04W72/11
- H04W72/21
- H04W84/06
- CPC H04W72/1268
- H04L1/00
- CPC H04W72/1273
- H04L1/1867
- H04W72/121
- CPC H04W72/23
- H04W74/0808
- CPC H04W74/0808
- H04W76/15
- H04W8/24
- H04W76/14
- CPC H04W76/15
- CPC H04W76/25
- H04W76/28
- H04W72/40
- CPC H04W76/28
- H05K5/00
- H01R12/71
- H01R12/72
- CPC H05K5/0069
- H04R1/02
- CPC H05K5/0217
- CPC H10B12/0335
- CPC H10B12/482
- H10B43/27
- H10B41/27
- H10B41/35
- H10B41/50
- H10B43/35
- H10B43/50
- CPC H10B43/27
- H01L29/51
- H10B53/20
- CPC H10B51/20
- H10B63/00
- CPC H10B63/845
- H10K59/80
- G06F3/044
- H10K59/122
- H10K59/35
- H10K59/38
- H10K59/40
- CPC H10K59/8792
- H10N50/01
- H10B61/00
- H10N50/10
- CPC H10N50/01
- H10N60/12
- H10N60/01
- H10N60/80
- CPC H10N60/124
- H10N60/81
- G06N10/40
- H01L25/04
- H01P3/12
- H01Q1/22
- H10N69/00
- CPC H10N60/815
- CPC H10N69/00
