STMicroelectronics International N.V. patent applications on March 27th, 2025
Patent Applications by STMicroelectronics International N.V. on March 27th, 2025
STMicroelectronics International N.V.: 22 patent applications
STMicroelectronics International N.V. has applied for patents in the areas of G05F3/26 (3), G06N3/0464 (2), H01L23/00 (2), G01J5/80 (1), H03H11/04 (1) G01J5/80 (1), G08B21/18 (1), H10D8/60 (1), H04L7/0033 (1), H04B5/20 (1)
With keywords such as: circuit, signal, device, current, substrate, sensor, output, data, configured, and control in patent application abstracts.
Patent Applications by STMicroelectronics International N.V.
Inventor(s): Carlo GUADALUPI of Sedriano IT for stmicroelectronics international n.v., Stefano Paolo RIVOLTA of Desio IT for stmicroelectronics international n.v., Andrea LABOMBARDA of Milano IT for stmicroelectronics international n.v.
IPC Code(s): G01J5/80, G01J5/00, G01S17/08
CPC Code(s): G01J5/80
Abstract: provided is a measuring device for measuring a distance between the measuring device and a user. the measuring device includes a distance sensor configured to generate a distance signal indicative of the distance, an ir radiation sensor configured to generate a temperature signal indicative of the ir radiation emitted by the user, and a control unit. the control unit is configured to: in a calibration mode, acquire the distance signal and the temperature signal respectively through the distance sensor and the ir radiation sensor and, on the basis of the distance signal and the temperature signal, generate a calibration curve which associates to each other values of the temperature signal with respective value of the distance; and in a calibrated mode, acquire the temperature signal through the ir radiation sensor and, on the basis of the temperature signal and the calibration curve, determine the distance.
Inventor(s): Luca GUERINONI of Alzano Lombardo IT for stmicroelectronics international n.v., Gianfranco Javier YALLICO SANCHEZ of Rozzano IT for stmicroelectronics international n.v., Davide BERNABUCCI of Ravenna IT for stmicroelectronics international n.v., Carlo VALZASINA of Gessate IT for stmicroelectronics international n.v., Claudia COMI of Milano IT for stmicroelectronics international n.v., David FARACI of Colverde IT for stmicroelectronics international n.v.
IPC Code(s): G01K7/34
CPC Code(s): G01K7/34
Abstract: a mems metamaterial has a substrate and a suspended structure having an elementary cell which extends at a distance from the substrate along a first direction. the elementary cell has a first structural region having a first material with a first coefficient of thermal expansion. the first structural region has a first side facing the substrate and a second side opposite to the first side. the elementary cell also has a second structural region having a second material different from the first material and with a second coefficient of thermal expansion different from the first coefficient of thermal expansion. the second structural region extends on at least part of the first structural region, on the first side, the second side, or both the first and second side of the first structural region.
20250102391. PRESSURE SENSOR WITH FLANGE_simplified_abstract_(stmicroelectronics international n.v.)
Inventor(s): Luca MAGGI of Garlate IT for stmicroelectronics international n.v., Marco DEL SARTO of Monza IT for stmicroelectronics international n.v., Alex GRITTI of Vimercate IT for stmicroelectronics international n.v.
IPC Code(s): G01L19/14, G01L19/00, G01L19/06
CPC Code(s): G01L19/143
Abstract: a sensor module includes an organic substrate, a mems pressure sensor mounted to the organic substrate, and a unitary lid mounted on the substrate. the unitary lid includes a central elevated portion housing the mems pressure sensor, an aperture in the central elevated portion, and a flat flange extending from the central elevated portion to an edge of the organic substrate.
Inventor(s): Davide Giuseppe PATTI of Mascalucia (CT) IT for stmicroelectronics international n.v.
IPC Code(s): G01R15/18, G01R19/00
CPC Code(s): G01R15/181
Abstract: an integrated system for electric-current monitoring includes a package and a mems sensor device arranged inside the package to provide an output electrical signal indicative of the electric current to be monitored. a sensing coil is provided within the package. the electric current to be monitored flows through the sensing coil. the mems sensor device is arranged relative to the sensing coil so as to be affected by flux lines of a magnetic field generated as a whole by the sensing coil as a function of the electric current to be monitored.
Inventor(s): Sandeep Jain of Noida IN for stmicroelectronics international n.v., Akshay Kumar Jain of Bhopal IN for stmicroelectronics international n.v., Jeena Mary George of Kattappana IN for stmicroelectronics international n.v.
IPC Code(s): G01R31/319, G01R31/317, G01R31/3193
CPC Code(s): G01R31/31901
Abstract: according to an embodiment, a digital circuit with n number of redundant flip-flops is provided, each having a data input coupled to a common data signal. the digital circuit operates in a functional mode and a test mode. during test mode, a first flip-flop is arranged as part of a test path and n-1 flip-flops are arranged as shadow logic. a test pattern at the common data signal is provided and a test output signal is observed at an output terminal of the first flip-flop to determine faults within a test path of the first flip-flop. at the same cycle, the test output signals of each of the n-1 number of redundant flip-flops is observed through the functional path to determine faults.
Inventor(s): Francesco Rundo of Gravina di Catania IT for stmicroelectronics international n.v., Michele Calabretta of Giarre (CT) IT for stmicroelectronics international n.v., Marco Maria Branciforte of Catania IT for stmicroelectronics international n.v., Concetto Spampinato of Catania IT for stmicroelectronics international n.v., Salvatore Coffa of Milano IT for stmicroelectronics international n.v.
IPC Code(s): G01R31/40, G06N3/084
CPC Code(s): G01R31/40
Abstract: a method of characterizing a parameter (e.g., threshold voltage) of a power electronic device using an artificial intelligence (ai) model includes sampling measured parameter values (e.g., voltage, current) of the power electronic device during operation and characterizing the parameter of the power electronic device using the ai model in inference mode with the measured parameter values as inputs. the ai model is trained using a joint loss function including a jacobian regularization term. the jacobian regularization term may depend on the norm of at least one jacobian of a corresponding set of training inputs. a power electronics system configured to perform the method includes the power electronic device and a computing system with a processor and memory storing the ai model. the computing system may be a microcontroller. the system may also include an analog-to-digital converter (adc) circuit, such as in the microcontroller.
Inventor(s): Marc SABUT of Eybens FR for stmicroelectronics international n.v., Emmanuel ALLIER of Grenoble FR for stmicroelectronics international n.v., Matthieu DESVERGNE of Claix FR for stmicroelectronics international n.v., Denis COTTIN of Crolles FR for stmicroelectronics international n.v.
IPC Code(s): G05F1/46, G05F1/575, G05F3/26
CPC Code(s): G05F1/468
Abstract: a bandgap voltage generator circuit is formed using only bipolar transistors. the bandgap voltage generator circuit includes an output node at which a bandgap reference voltage is generated. a transconductance amplifier circuit in a current control feedback loop has a differential input which receives a base current. a compensation current sink circuit operates to sink a compensation current from the output node corresponding to the base current received at the differential input of the transconductance amplifier.
Inventor(s): Jean-Pierre BLANC of Theys FR for stmicroelectronics international n.v., Sarah VERHAEREN of Le Versoud FR for stmicroelectronics international n.v.
IPC Code(s): G05F3/26
CPC Code(s): G05F3/262
Abstract: the present description concerns a correction circuit for a bandgap circuit comprising a first bipolar transistor and a second bipolar transistor, the bandgap circuit being configured to deliver a temperature-stable dc voltage based on the first and second bipolar transistors, the correction circuit being configured to generate a correction current equal to a difference in the base currents of said first and second transistors, and inject the correction current on the emitter of one of said first and second bipolar transistors to correct an error on the temperature-stable voltage resulting from a current gain difference between said first and second bipolar transistors.
Inventor(s): Marc SABUT of Eybens FR for stmicroelectronics international n.v., Emmanuel ALLIER of Grenoble FR for stmicroelectronics international n.v., Matthieu DESVERGNE of Claix FR for stmicroelectronics international n.v.
IPC Code(s): G05F3/26, H03F3/45
CPC Code(s): G05F3/267
Abstract: a bandgap voltage generator circuit is formed using only bipolar transistors. the bandgap voltage generator circuit includes output nodes generating first and second bandgap reference currents. a transconductance amplifier circuit in a current control feedback loop of the bandgap voltage generator circuit has differential inputs which receive base currents. a differential amplifier circuit has inputs configured to receive the first and second bandgap reference currents and includes a compensation current sink circuit configured to sink compensation currents from the first and second bandgap reference currents which correspond to the base current received at the differential inputs of the transconductance amplifier circuit.
Inventor(s): Thomas JOUANNEAU of ST-EGREVE FR for stmicroelectronics international n.v., Lea Sandrina Frédérique ENGINGER of Grenoble FR for stmicroelectronics international n.v.
IPC Code(s): G06F1/04, H03K5/135
CPC Code(s): G06F1/04
Abstract: the present disclosure provides a circuit for supplying a clock signal. an example circuit for supplying a clock signal comprises a selector of one signal out of a plurality of clock signals; a switch between the selector and a node for outputting the selected clock signal, the circuit being configured so that the application of a control signal for selecting one of the clock signals causes, in the order, the turning off of the switch, the selection of the signal via the selector, and the turning on of the switch.
Inventor(s): Antonio ANASTASIO of Napoli IT for stmicroelectronics international n.v.
IPC Code(s): G06F15/82, G06F1/10, G06F13/40
CPC Code(s): G06F15/82
Abstract: disclosed herein a method for transforming a single processor system into an effective multicore system with few modifications to the existing processor. the transformation is achieved by wrapping the processor with a cpu manager module, which intercepts all cpu transactions, remaps addresses, manages interrupt lines, and controls the cpu clock using clock gating. the transformation to n effective multicore system brings about reduced area and power impacts compared to a full duplication of the whole system, while still reusing the existing program in a multicore environment.
Inventor(s): Federico RIZZARDINI of SETTIMO MILANESE IT for stmicroelectronics international n.v., Giacomo TURATI of Cusano Milanino IT for stmicroelectronics international n.v.
IPC Code(s): G06N3/0464
CPC Code(s): G06N3/0464
Abstract: a device includes a sensor and processing circuitry. the sensor, in operation, generates a sequence of data samples. the processing circuitry, in operation, implements a sliding convolutional neural network (scnn) having a plurality of layers to generate classification results based on the sequence of data samples. the scnn sequentially processes the sequence of data samples, the sequentially processing the sequence of data samples including, for each received sample of a set of received data samples of the sequence of data samples, iteratively updating partial results of an inference of a first layer of the plurality of layers based on a respective patch of data samples of the sequence of data samples. the respective patch of data samples includes the received data sample. the classification results may be used to generate control signals, such as by the sensing device or a host processor coupled to the sensing device.
Inventor(s): Stefano Paolo RIVOLTA of Desio IT for stmicroelectronics international n.v.
IPC Code(s): G08B21/18, G06N3/0464, G06N20/20, H04W4/02
CPC Code(s): G08B21/18
Abstract: a device includes one or more motion sensors and processing circuitry coupled to the one or more motion sensors. the one or more sensors, in operation, generate motion sensor signals. the processing circuitry, in operation, classifies a user-activity type based on the motion sensor signals, the user-activity type being selected from a plurality of user-activity types including one or more moving activity types, detects a tilt angle of the device based on the motion sensor signals, and classifies a use-condition of the device as used or not used based on the detected tilt angle. the processing circuitry generates a use-warning signal based on whether the classification of the user-activity type is a moving activity type and on whether the classification of the use-condition is used. the device may include an integrated circuit including the motion sensors and the processing circuitry, and the integrated circuit may be embedded in a display.
Inventor(s): Alin RAZAFINDRAIBE of Saint Martin d'Heres FR for stmicroelectronics international n.v., Thomas JOUANNEAU of St-Egreve FR for stmicroelectronics international n.v., Xavier LECOQ of Voiron FR for stmicroelectronics international n.v.
IPC Code(s): G11C7/10, G11C11/54
CPC Code(s): G11C7/1096
Abstract: a non-volatile memory includes a first area with first storage elements configured to store values associated with first neurons of a network and a second area with second storage elements. a control circuit applies one or more first input values to first read paths, each first read path including one among the first storage elements. a computing circuit adds currents supplied by the first read paths to generate an output current. a programming circuit converts the output current into a programming current, and uses the programming current to program a second storage element.
Inventor(s): Björn MAGNUSSON LINDGREN of Norrköping SE for stmicroelectronics international n.v., Niclas KARLSSON of Linköping SE for stmicroelectronics international n.v., Esa HÄMÄLÄINEN of Norrköping SE for stmicroelectronics international n.v., Alexandre ELLISON of Linkoping SE for stmicroelectronics international n.v.
IPC Code(s): H01L21/02, C30B28/14, C30B29/36
CPC Code(s): H01L21/02378
Abstract: a polycrystalline sic wafer or substrate with a high resistivity benefits functionality of a high power electronic or system in which the polycrystalline sic wafer or substrate is present or is utilized in manufacturing the high power electronic or system. at least one embodiment of a wafer includes a polycrystalline sic wafer or substrate that has a high resistivity (e.g., equal to or greater than 1*10{circumflex over ( )}5 or 1e+5 ohm-centimeters) and low warpage. electronic devices or components made with or from the wafer including the high resistivity polycrystalline sic wafer or substrate are further optimized when in use and have fewer to no crystal defects. the wafer formed according to the embodiments of the present disclosure has a high or very high resistivity as compared to existing polycrystalline sic wafers or substrate.
Inventor(s): Mohamed BOUFNICHEL of Monnaie FR for stmicroelectronics international n.v.
IPC Code(s): H01L23/00, H01L23/48, H01L25/065
CPC Code(s): H01L24/13
Abstract: the present description relates to an electronic circuit comprising a semiconductor substrate having opposed first and second faces and electrically conductive pillars, intended to be connected to an element external to the electronic circuit, extending through the semiconductor substrate from the second face to the first face and projecting from the first face.
20250105227. ELECTRONIC CIRCUIT_simplified_abstract_(stmicroelectronics international n.v.)
Inventor(s): Jonathan GODILLON of Ramonville-Saint-Agne FR for stmicroelectronics international n.v.
IPC Code(s): H01L25/16, H01L23/00, H01L23/64
CPC Code(s): H01L25/16
Abstract: an electronic circuit includes a first die, having a gan transistor, and a second die, stacked so that an element of the second die electrically connects a first node and a second nodes of the first die respectively coupled to a conduction node and to a control node of the gan transistor.
Inventor(s): Guido DOSSI of Usmate Velate, Monza Brianza IT for stmicroelectronics international n.v.
IPC Code(s): H03K5/1536, H03H11/04, H03K5/156
CPC Code(s): H03K5/1536
Abstract: a circuit detects zero crosses in an input-signal and includes a low-pass-filter (lpf) receiving the input-signal and introducing a phase-shift dependent on the frequency thereof. filter circuitry receives the output of the lpf, applies a fixed phase-shift thereto, and adjusts phase and dc-offset thereof based on control signals to produce a filtered output-signal. control circuitry has a zero-crossing detector receiving the input-signal and the filtered output-signal, detecting zero-crossings of the input-signal and the filtered output-signal, asserting a digital zero cross signal at each zero crossing, and determining a phase-shift and dc-offset between the input-signal and filtered output-signal. the control circuitry has a controller generating the control signals, based upon the phase-shift and dc-offset, so a total phase-shift between the input-signal and the filtered output-signal is constant and there is a same duty-cycle between the input-signal and the filtered output-signal, providing for accurate zero-crossing detection.
Inventor(s): Marc HOUDEBINE of Crolles FR for stmicroelectronics international n.v., Sylvain MAJCHERCZAK of St. Pierre D'Allevard FR for stmicroelectronics international n.v., Florent SIBILLE of Grenoble FR for stmicroelectronics international n.v.
IPC Code(s): H04B5/20, H04B5/48
CPC Code(s): H04B5/20
Abstract: a device of contactless communication by active load modulation includes a receive circuit configured to receive as an input a reception signal originating from an electromagnetic field intended to be received by an antenna and to deliver as an output a first clock signal. a transmit circuit includes an output coupled to the antenna and operates to deliver on its output a modulation signal in phase with the reception signal. a compensation circuit is configured to compensate for a first delay of the first clock signal due to the receive circuit and to the amplitude of the reception signal. the compensation circuit operates to determine a phase-shift value to be applied to an input signal of the transmit circuit to compensate for the first delay.
Inventor(s): Marc HOUDEBINE of Crolles FR for stmicroelectronics international n.v., Bruno LEDUC of Voiron FR for stmicroelectronics international n.v., Florent SIBILLE of Grenoble FR for stmicroelectronics international n.v.
IPC Code(s): H04L7/00, G06K19/07, H04B5/77
CPC Code(s): H04L7/0033
Abstract: a device of contactless communication by active load modulation includes a receive circuit configured to receive as an input a reception signal originating from a magnetic field intended to be received by an antenna. a transmit circuit has an output coupled to the antenna with a modulation signal in phase with the reception signal intended to be delivered thereon. a circuit compensates for a delay of the modulation signal due to the transmit circuit and to the amplitude of the reception signal. the compensation circuit determines a phase-shift value to be applied to an input signal of the transmit circuit to compensate for the delay.
Inventor(s): Gabriele BELLOCCHI of Catania IT for stmicroelectronics international n.v., Simone RASCUNÁ of Catania IT for stmicroelectronics international n.v., Valeria PUGLISI of Catania IT for stmicroelectronics international n.v., Paolo BADALÁ of Acireale IT for stmicroelectronics international n.v.
IPC Code(s): H01L29/872, H01L21/04, H01L29/16, H01L29/47, H01L29/66
CPC Code(s): H10D8/60
Abstract: method of forming a metal-semiconductor contact, comprising the steps of: forming, on a semiconductor body having a first electrical conductivity, a first metal layer; performing a thermal treatment of at least a portion of the first metal layer by a laser beam having an incidence direction on the first metal layer, including heating the portion of the first metal layer, along said incidence direction, at a temperature between 1500� c. and 3000� c.
Inventor(s): Franck JULIEN of La Penne sur Huveaune FR for stmicroelectronics international n.v.
IPC Code(s): H01L27/12, H01L21/84
CPC Code(s): H10D86/201
Abstract: a transistor device comprising a silicon-on-insulator (soi) substrate having a plurality of polysilicon gates including a plurality of recessed gates and a plurality of non-recessed gates. the plurality of recessed gates being recessed in a top silicon layer of the soi substrate and the plurality of non-recessed gates being on the top silicon layer. the plurality of recessed gates comprising an upper cap portion on a bottom buried portion that is in a recess of the soi substrate. methods of manufacturing the device are provided.
STMicroelectronics International N.V. patent applications on March 27th, 2025
- STMicroelectronics International N.V.
- G01J5/80
- G01J5/00
- G01S17/08
- CPC G01J5/80
- Stmicroelectronics international n.v.
- G01K7/34
- CPC G01K7/34
- G01L19/14
- G01L19/00
- G01L19/06
- CPC G01L19/143
- G01R15/18
- G01R19/00
- CPC G01R15/181
- G01R31/319
- G01R31/317
- G01R31/3193
- CPC G01R31/31901
- G01R31/40
- G06N3/084
- CPC G01R31/40
- G05F1/46
- G05F1/575
- G05F3/26
- CPC G05F1/468
- CPC G05F3/262
- H03F3/45
- CPC G05F3/267
- G06F1/04
- H03K5/135
- CPC G06F1/04
- G06F15/82
- G06F1/10
- G06F13/40
- CPC G06F15/82
- G06N3/0464
- CPC G06N3/0464
- G08B21/18
- G06N20/20
- H04W4/02
- CPC G08B21/18
- G11C7/10
- G11C11/54
- CPC G11C7/1096
- H01L21/02
- C30B28/14
- C30B29/36
- CPC H01L21/02378
- H01L23/00
- H01L23/48
- H01L25/065
- CPC H01L24/13
- H01L25/16
- H01L23/64
- CPC H01L25/16
- H03K5/1536
- H03H11/04
- H03K5/156
- CPC H03K5/1536
- H04B5/20
- H04B5/48
- CPC H04B5/20
- H04L7/00
- G06K19/07
- H04B5/77
- CPC H04L7/0033
- H01L29/872
- H01L21/04
- H01L29/16
- H01L29/47
- H01L29/66
- CPC H10D8/60
- H01L27/12
- H01L21/84
- CPC H10D86/201