Qualcomm incorporated (20240321729). INTEGRATED REDISTRIBUTION LAYER INDUCTORS simplified abstract

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INTEGRATED REDISTRIBUTION LAYER INDUCTORS

Organization Name

qualcomm incorporated

Inventor(s)

Abhijeet Paul of Escondido CA (US)

Ravi Pramod Kumar Vedula of San Diego CA (US)

Yufei Wu of San Diego CA (US)

INTEGRATED REDISTRIBUTION LAYER INDUCTORS - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240321729 titled 'INTEGRATED REDISTRIBUTION LAYER INDUCTORS

The abstract describes an integrated circuit (IC) with an inductor formed from redistribution layers (RDLs) and an airgap in an interlayer dielectric (ILD) under the bottommost RDL to achieve a high Q value in the inductor and improve inductor isolation.

  • Inductor formed from redistribution layers (RDLs)
  • Airgap provided in interlayer dielectric (ILD) under bottommost RDL
  • High Q value achieved in the inductor
  • Improved inductor isolation
  • Allows circuits to be placed under the inductor for a smaller die size

Potential Applications: - Integrated circuits - Electronics manufacturing - Semiconductor industry

Problems Solved: - Achieving high Q value in inductors - Improving inductor isolation - Reducing die size in circuits

Benefits: - Enhanced performance of inductors - Improved integration of circuits - Space-saving design for smaller devices

Commercial Applications: Title: "Advanced Integrated Circuits with High-Q Inductors" This technology can be used in various electronic devices such as smartphones, tablets, and IoT devices to improve performance and reduce overall size, making it attractive for manufacturers looking to enhance their products.

Questions about the technology: 1. How does the airgap under the inductor contribute to achieving a high Q value? 2. What are the specific advantages of using redistribution layers for inductor formation?


Original Abstract Submitted

disclosed is an integrated circuit (ic) with an inductor formed from redistribution layers (rdls). an airgap is provided in an interlayer dielectric (ild) under the bottom most rdl that makes up the inductor. in this way, an inductor with high q value is achieved. also, inductor isolation is improved. thus, circuits may be placed under the inductor resulting is a smaller die.