Qualcomm incorporated (20240266217). SELF-ALIGNED SMALL CONTACT STRUCTURE simplified abstract
Contents
SELF-ALIGNED SMALL CONTACT STRUCTURE
Organization Name
Inventor(s)
Junjing Bao of San Diego CA (US)
Haining Yang of San Diego CA (US)
Hyunwoo Park of San Diego CA (US)
Kwanyong Lim of San Diego CA (US)
Ming-Huei Lin of New Taipei City (TW)
SELF-ALIGNED SMALL CONTACT STRUCTURE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240266217 titled 'SELF-ALIGNED SMALL CONTACT STRUCTURE
The semiconductor structure described in the patent application includes a gate structure, gate spacer, source/drain structure, dielectric layers, etch stop spacer, etch stop layer, and source/drain contact.
- The gate structure is positioned on a substrate.
- The gate spacer is located next to the gate structure.
- The source/drain structure is adjacent to the gate spacer.
- A first dielectric layer is placed on the substrate and the source/drain structure.
- An etch stop spacer is positioned over the first dielectric layer and next to the gate spacer.
- An etch stop layer covers the gate structure, gate spacer, and etch stop spacer.
- The semiconductor structure also includes a source/drain contact that extends through the etch stop layer and the first dielectric layer to connect with the source/drain structure.
Potential Applications: This semiconductor structure could be used in the manufacturing of advanced integrated circuits for various electronic devices.
Problems Solved: This technology addresses the need for improved performance and reliability in semiconductor devices by providing a more efficient structure.
Benefits: The benefits of this semiconductor structure include enhanced functionality, increased speed, and reduced power consumption in electronic devices.
Commercial Applications: This technology could be applied in the production of high-performance processors, memory chips, and other semiconductor components for consumer electronics, telecommunications, and automotive industries.
Questions about the Semiconductor Structure: 1. How does the gate spacer contribute to the overall performance of the semiconductor structure? 2. What are the advantages of using an etch stop layer in this semiconductor design?
Original Abstract Submitted
disclosed are techniques for a semiconductor structure. in an aspect, a semiconductor structure includes a gate structure disposed on a substrate, a gate spacer adjacent to the gate structure, a source/drain structure adjacent to the gate spacer, a first dielectric layer disposed on the substrate and the source/drain structure, an etch stop spacer over the first dielectric layer and adjacent to the gate spacer, and an etch stop layer over the gate structure, the gate spacer, and the etch stop spacer. the semiconductor structure further includes a source/drain contact extending through the etch stop layer and the first dielectric layer and in contact with the source/drain structure, a sidewall of the source/drain contact adjoining a sidewall of the etch stop layer and a sidewall of the etch stop spacer.
