Qualcomm incorporated (20240195297). VOLTAGE BOOSTER INCLUDING CIRCUITRY TO REDUCE OVERVOLTAGE STRESS ON DISCHARGE PROTECTION DEVICE simplified abstract

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VOLTAGE BOOSTER INCLUDING CIRCUITRY TO REDUCE OVERVOLTAGE STRESS ON DISCHARGE PROTECTION DEVICE

Organization Name

qualcomm incorporated

Inventor(s)

Xiaopeng Zhong of San Diego CA (US)

Dinesh Jagannath Alladi of San Diego CA (US)

VOLTAGE BOOSTER INCLUDING CIRCUITRY TO REDUCE OVERVOLTAGE STRESS ON DISCHARGE PROTECTION DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240195297 titled 'VOLTAGE BOOSTER INCLUDING CIRCUITRY TO REDUCE OVERVOLTAGE STRESS ON DISCHARGE PROTECTION DEVICE

The patent application describes an apparatus with a boost voltage generator, a field effect transistor (FET), a discharging circuit, and a gate voltage boost circuit.

  • Boost voltage generator generates boost voltage
  • FET with drain/source terminal connected to boost voltage output
  • Discharging circuit discharges boost voltage via FET in response to signal
  • Gate voltage boost circuit boosts gate voltage of FET in response to signal
  • Current injection circuit may inject current into discharging circuit

Potential Applications: - Power management systems - Voltage regulation circuits - Battery charging systems

Problems Solved: - Efficient boost voltage generation - Controlled discharging of voltage - Enhanced gate voltage for FET operation

Benefits: - Improved power efficiency - Enhanced voltage regulation - Increased control over voltage discharging

Commercial Applications: Title: "Advanced Power Management Systems for Enhanced Efficiency" This technology can be used in various industries such as electronics, automotive, and renewable energy for improved power management and voltage regulation.

Questions about the technology: 1. How does the boost voltage generator work in this apparatus? 2. What are the advantages of using a gate voltage boost circuit in conjunction with the discharging circuit?


Original Abstract Submitted

an apparatus including: a boost voltage generator configured to generate a boost voltage at an output; a first field effect transistor (fet) including a drain/source terminal coupled to the output of the boost voltage generator; a discharging circuit coupled to a source/drain terminal of the first fet, wherein the discharging circuit is configured to discharge the output of the boost voltage generator via the first fet in response to an asserted discharging signal; and a gate voltage boost circuit configured to generate a gate voltage for a gate of the first fet, wherein the gate voltage boost circuit is configured to boost the gate voltage in response to the asserted discharging signal. another implementation may include a current injection circuit configured to generate and inject a current into the discharging circuit in lieu of or in addition to the gate voltage boost circuit.