NVIDIA Corporation patent applications published on October 10th, 2024
Summary of the patent applications from NVIDIA Corporation on October 10th, 2024
1. **Summary**: The recent patents filed by the organization describe innovative technologies in receiver systems for data transmission, clock signal monitoring, path perception ensemble for autonomous driving, and anisotropic filter kernel generation for virtual environments. These patents focus on improving signal quality, accuracy, and reliability in various applications such as telecommunications, gaming, autonomous vehicles, and graphics rendering.
2. **Key Points of Patents**: - Receiver System: Utilizes PR and DFFE systems to equalize received signals and cancel ISI for enhanced data transmission. - Clock Signal Monitoring: Adjusts pulse counts to detect abnormalities in clock signals for improved system performance. - Path Perception Ensemble: Enhances understanding of driving surfaces and paths for accurate lane mapping and navigation. - Anisotropic Filter Kernel: Generates filter kernels based on spatial properties to enhance realism in virtual environments.
3. **Notable Applications**: - Receiver System: Telecommunications, data transmission systems, wireless communication networks. - Clock Signal Monitoring: Communication systems, data processing units, industrial automation equipment. - Path Perception Ensemble: Autonomous vehicles, driver assistance systems, robotics for navigation. - Anisotropic Filter Kernel: Video game graphics rendering, virtual reality simulations, computer-aided design software.
Contents
- 1 Patent applications for NVIDIA Corporation on October 10th, 2024
- 1.1 EFFICIENT SAFETY AWARE PATH SELECTION AND PLANNING FOR AUTONOMOUS MACHINE APPLICATIONS (18745919)
- 1.2 LOW POWER AND AREA CLOCK MONITORING CIRCUIT USING RING DELAY ARRANGEMENT (18295493)
- 1.3 TENSOR DIMENSION ORDERING TECHNIQUES (18141917)
- 1.4 APPLICATION PROGRAMMING INTERFACE TO CAUSE GRAPH CODE TO UPDATE A SEMAPHORE (18745851)
- 1.5 APPLICATION PROGRAMMING INTERFACE TO CAUSE GRAPH CODE TO WAIT ON A SEMAPHORE (18745855)
- 1.6 APPLICATION PROGRAMMING INTERFACE TO LOCATE INCOMPLETE GRAPH CODE (18749220)
- 1.7 CONCURRENT DATASET UPDATES USING HASH MAPS (18745388)
- 1.8 TECHNIQUES FOR TRAINING MACHINE LEARNING MODELS USING ROBOT SIMULATION DATA (18606938)
- 1.9 CONTEXT-AWARE SYNTHESIS AND PLACEMENT OF OBJECT INSTANCES (18746911)
- 1.10 SHADOW DENOISING IN RAY-TRACING APPLICATIONS (18746536)
- 1.11 PATH PERCEPTION DIVERSITY AND REDUNDANCY IN AUTONOMOUS MACHINE APPLICATIONS (18745370)
- 1.12 LOW POWER AND AREA CLOCK MONITORING CIRCUIT USING RING DELAY ARRANGEMENT FOR CLOCK SIGNAL HAVING PHASE-TO-PHASE VARIATION (18295537)
- 1.13 DECISION FEED FORWARD EQUALIZATION FOR PARTIAL RESPONSE EQUALIZED SIGNAL INCLUDING PRE-CURSOR CANCELATION (18745229)
Patent applications for NVIDIA Corporation on October 10th, 2024
EFFICIENT SAFETY AWARE PATH SELECTION AND PLANNING FOR AUTONOMOUS MACHINE APPLICATIONS (18745919)
Main Inventor
Julia Ng
LOW POWER AND AREA CLOCK MONITORING CIRCUIT USING RING DELAY ARRANGEMENT (18295493)
Main Inventor
Kedar Rajpathak
TENSOR DIMENSION ORDERING TECHNIQUES (18141917)
Main Inventor
Paul Martin Springer
APPLICATION PROGRAMMING INTERFACE TO CAUSE GRAPH CODE TO UPDATE A SEMAPHORE (18745851)
Main Inventor
David Anthony Fontaine
APPLICATION PROGRAMMING INTERFACE TO CAUSE GRAPH CODE TO WAIT ON A SEMAPHORE (18745855)
Main Inventor
David Anthony Fontaine
APPLICATION PROGRAMMING INTERFACE TO LOCATE INCOMPLETE GRAPH CODE (18749220)
Main Inventor
David Anthony Fontaine
CONCURRENT DATASET UPDATES USING HASH MAPS (18745388)
Main Inventor
Pascal Gautron
TECHNIQUES FOR TRAINING MACHINE LEARNING MODELS USING ROBOT SIMULATION DATA (18606938)
Main Inventor
Caelan Reed GARRETT
CONTEXT-AWARE SYNTHESIS AND PLACEMENT OF OBJECT INSTANCES (18746911)
Main Inventor
Donghoom LEE
SHADOW DENOISING IN RAY-TRACING APPLICATIONS (18746536)
Main Inventor
Shiqui Liu
PATH PERCEPTION DIVERSITY AND REDUNDANCY IN AUTONOMOUS MACHINE APPLICATIONS (18745370)
Main Inventor
Davide Marco Onofrio
LOW POWER AND AREA CLOCK MONITORING CIRCUIT USING RING DELAY ARRANGEMENT FOR CLOCK SIGNAL HAVING PHASE-TO-PHASE VARIATION (18295537)
Main Inventor
Kedar Rajpathak
DECISION FEED FORWARD EQUALIZATION FOR PARTIAL RESPONSE EQUALIZED SIGNAL INCLUDING PRE-CURSOR CANCELATION (18745229)
Main Inventor
Vishnu Balan
