NVIDIA Corporation patent applications on October 3rd, 2024

Patent Applications by NVIDIA Corporation on October 3rd, 2024

NVIDIA Corporation: 5 patent applications

NVIDIA Corporation has applied for patents in the areas of G05D1/00 (1), G06T17/00 (1), H01L23/00 (1), H01L23/64 (1), G06F40/279 (1) G05D1/0221 (1), G06F9/5016 (1), G06T17/00 (1), G06V20/46 (1), H01L23/642 (1)

With keywords such as: vehicle, substrate, surface, edge, point, text, data, game, control, and terminals in patent application abstracts.

Patent Applications by NVIDIA Corporation

20240329639. GUIDING VEHICLES THROUGH VEHICLE MANEUVERS USING MACHINE LEARNING MODELS_simplified_abstract_(nvidia corporation)

Inventor(s): Chenyi Chen of Fremont CA (US) for nvidia corporation, Artem Provodin of Highlands NJ (US) for nvidia corporation, Urs Muller of Keyport NJ (US) for nvidia corporation

IPC Code(s): G05D1/00, B60W30/00, B60W30/18, B62D15/02, G06N3/045, G06N3/08, G06N20/00, G06V10/764, G06V10/82, G06V20/56

CPC Code(s): G05D1/0221

Abstract: in various examples, a trigger signal may be received that is indicative of a vehicle maneuver to be performed by a vehicle. a recommended vehicle trajectory for the vehicle maneuver may be determined in response to the trigger signal being received. to determine the recommended vehicle trajectory, sensor data may be received that represents a field of view of at least one sensor of the vehicle. a value of a control input and the sensor data may then be applied to a machine learning model(s) and the machine learning model(s) may compute output data that includes vehicle control data that represents the recommended vehicle trajectory for the vehicle through at least a portion of the vehicle maneuver. the vehicle control data may then be sent to a control component of the vehicle to cause the vehicle to be controlled according to the vehicle control data.

20240330056. ASYNCHRONOUS MEMORY ALLOCATION_simplified_abstract_(nvidia corporation)

Inventor(s): Vivek Belve Kini of San Jose CA (US) for nvidia corporation, Steven Arthur Gurfinkel of San Francisco CA (US) for nvidia corporation, Fnu Vishnuswaroop Ramesh of Sunnyvale CA (US) for nvidia corporation, Houston Thompson Hoffman of San Jose CA (US) for nvidia corporation, Michael Christopher Delorme of San Jose CA (US) for nvidia corporation, Alicia Xiao Hu of Santa Clara CA (US) for nvidia corporation, Stephen Anthony Bernard Jones of San Francisco CA (US) for nvidia corporation, Vladislav Zhurba of San Jose CA (US) for nvidia corporation, William Young Fiser of San Jose CA (US) for nvidia corporation, Reza Mokhtari of Toronto (CA) for nvidia corporation

IPC Code(s): G06F9/50, G06F9/38

CPC Code(s): G06F9/5016

Abstract: apparatuses, systems, and techniques to allocate processor memory. in at least one embodiment, an application programming interface is used to execute instructions to asynchronously allocate memory locations to processors.

20240331280. GENERATION OF 3D OBJECTS USING POINT CLOUDS AND TEXT_simplified_abstract_(nvidia corporation)

Inventor(s): Yehonatan Kasten of Hinanit (IL) for nvidia corporation, Gal Chechik of Ramat Hasharon (IL) for nvidia corporation

IPC Code(s): G06T17/00, H04N13/279

CPC Code(s): G06T17/00

Abstract: embodiments of the present disclosure relate to controlling generation of 3d objects using point clouds and text. systems and methods are disclosed that leverage a pre-trained text-to-image diffusion model to reconstruct a complete 3d model of an object from a sensor-captured incomplete point cloud for the object and a textual description of the object. the complete 3d model of the object may be represented as a neural surface (signed distance function), polygonal mesh, radiance field (neural surface and volumetric coloring function), and the like. the signed distance function (sdf) measures the distance of any 3d point from the nearest surface point, where positive or negative signs indicate that the point is outside or inside the object respectively. the sdf enables use of the incomplete point cloud for constraining the surface location by simply encouraging the signed distance function to be zero in the point cloud locations.

20240331382. EVENT INFORMATION EXTRACTION FROM GAME LOGS USING NATURAL LANGUAGE PROCESSING_simplified_abstract_(nvidia corporation)

Inventor(s): James Lewis van Welzen of Sandy UT (US) for nvidia corporation, Prakash Yadav of Pune (IN) for nvidia corporation, Charu Kalani of Bothell WA (US) for nvidia corporation, Jonathan White of Fort Collins CO (US) for nvidia corporation

IPC Code(s): G06V20/40, A63F13/45, A63F13/53, G06F16/783, G06F40/279

CPC Code(s): G06V20/46

Abstract: in various examples, natural language processing may be performed on text generated by a game to extract one or more in-game events from the game. the system (e.g., a client device and/or server) may receive the text in the form of one or more strings generated by a game application. the system may then extract one or more in-game events from the text using natural language processing. the game may include the text in a message it sends to the system (e.g., using an application programming interface (api)) and/or in a game log entry or notification. the text may be generated based at least on the game determining one or more conditions are satisfied in the gameplay (e.g., victory, points scored, milestones, eliminations, item acquisition, etc.). the text may be mapped to event templates, which may then be used to extract parameters of events therefrom.

20240332223. Chip Die Substrate with Edge-Mounted Capacitors_simplified_abstract_(nvidia corporation)

Inventor(s): Tracy Fu of Shenzhen (CN) for nvidia corporation, Tiger Yan of Shenzhen (CN) for nvidia corporation, Joey Cai of Shenzhen (CN) for nvidia corporation, Zach Wang of Shenzhen (CN) for nvidia corporation

IPC Code(s): H01L23/64, H01L23/00, H01L23/50

CPC Code(s): H01L23/642

Abstract: an integrated circuit die substrate has one or more capacitors attached to an edge surface of the substrate. the substrate has a top surface and a bottom surface, at least one of which includes a die mounting area, and at least one of which includes system interconnect terminals. a substrate edge surface is disposed along a peripheral end of the substrate and is oriented substantially orthogonally to the top and bottom surfaces. a pair of conductive edge terminals is disposed on the substrate edge surface. each of the edge terminals is electrically coupled to a respective substrate conductor disposed on or inside the substrate. a capacitor is attached exteriorly to the substrate at the substrate edge surface such that terminals of the capacitor are electrically coupled to respective ones of the edge terminals. an integrated circuit die is attached at the die mounting area.

NVIDIA Corporation patent applications on October 3rd, 2024