Murata Manufacturing Co., Ltd. patent applications on February 20th, 2025

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Patent Applications by Murata Manufacturing Co., Ltd. on February 20th, 2025

Murata Manufacturing Co., Ltd.: 15 patent applications

Murata Manufacturing Co., Ltd. has applied for patents in the areas of H01M10/0525 (3), H03H9/13 (2), H01G4/008 (2), H01G4/232 (2), H01G4/30 (2) E03C1/057 (1), H01F27/22 (1), H01G4/0085 (1), H01G4/012 (1), H01G4/1209 (1)

With keywords such as: electrode, circuit, including, layer, terminal, surface, control, signal, outer, and amplifier in patent application abstracts.



Patent Applications by Murata Manufacturing Co., Ltd.

20250059745. CONTROL DEVICE AND CONTROL METHOD OF FAUCET DEVICE, AND FAUCET DEVICE_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Kosei ASANO of Nagaokakyo-shi (JP) for murata manufacturing co., ltd.

IPC Code(s): E03C1/05, G01S13/88

CPC Code(s): E03C1/057



Abstract: to provide a faucet device and its control device and control method capable of appropriately determining the presence or absence of a detection target around the discharge portion in a small size and at a low price. a control device of a faucet device includes a radar, a calculator, and a control unit. the radar includes a transmission antenna and a reception antenna. the transmission antenna transmits a radio wave. the reception antenna receives a reflected wave of the radio wave that hits water and is reflected by the water. a calculation unit calculates a signal intensity distribution of the reflected wave for each arrival angle and arrival distance. a determination unit outputs a supply signal to the control unit when the reflected wave has a signal intensity exceeding a threshold, and outputs a stop signal to the control unit when the reflected wave no longer exceeds the threshold.


20250062064. HYBRID CONSTRUCTION TRANSFORMER_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Kapila WARNAKULASURIYA of Milton Keynes (GB) for murata manufacturing co., ltd.

IPC Code(s): H01F27/22, H01F27/02, H01F27/24, H01F27/28

CPC Code(s): H01F27/22



Abstract: an electrical transformer includes a transformer core; a winding arranged around the transformer core, the winding including a primary coil and a secondary coil encased in a potting material; and a housing surrounding the transformer core and the winding. the housing includes a plurality of thermal conductors in thermal contact with the winding and/or the transformer core, and the housing including one or more open sides such that the winding is exposed.


20250062070. MULTILAYER CERAMIC CAPACITOR AND METHOD FOR MANUFACTURING MULTILAYER CERAMIC CAPACITOR_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Kazunori USUI of Nagaokakyo-shi (JP) for murata manufacturing co., ltd., Tatsunori YASUDA of Nagaokakyo-shi (JP) for murata manufacturing co., ltd.

IPC Code(s): H01G4/008, H01G4/232, H01G4/30

CPC Code(s): H01G4/0085



Abstract: a multilayer ceramic capacitor include a multilayer body including internal electrode layers including first and second internal electrode layers facing each other and separated from each other, and a dielectric layer between the first and second internal electrode layers and including a ceramic material, and an outer electrode selectively connected to the first and second internal electrode layers. each of the first and second internal electrode layers includes a rare earth oxide distributed along at least one of a pair of interfaces with the dielectric layer.


20250062073. MULTILAYER CERAMIC CAPACITOR_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Hiroaki SUGITA of Nagaokakyo-shi (JP) for murata manufacturing co., ltd.

IPC Code(s): H01G4/012, H01G4/12, H01G4/232, H01G4/30

CPC Code(s): H01G4/012



Abstract: a multilayer ceramic capacitor includes a multilayer body, first internal electrode layers exposed at a first end surface of the multilayer body, and second internal electrode layers exposed at a second end surface of the multilayer body. the first internal electrode layers are exposed at a first lateral surface and a second lateral surface of the multilayer body. the second internal electrode layers are exposed at the first lateral surface and the second lateral surface of the multilayer body.


20250062074. CERAMIC ELECTRONIC CHIP COMPONENT AND METHOD FOR MANUFACTURING THE SAME_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Kota ZENZAI of Nagaokakyo-shi (JP) for murata manufacturing co., ltd.

IPC Code(s): H01G4/12, H01B1/16, H01G4/008

CPC Code(s): H01G4/1209



Abstract: an outer electrode includes a glass-free sintered layer containing no glass. a glass-free conductive paste is provided and includes a conductive metal powder and a thermosetting resin, the conductive metal powder including an alloy of tin and at least one of copper and nickel, and the glass-free conductive paste containing no glass. this composition is applied to cover a portion of a surface of a ceramic body. then the ceramic body to which the glass-free conductive paste has been applied is subjected to heat treatment at a temperature of about 600� c., higher than or equal to a temperature about 400� c. higher than the curing temperature of the thermosetting resin. by the heat treatment, the thermosetting resin is subjected to thermal decomposition or combustion and thus little of the thermosetting resin remains, and the conductive metal powder is sintered to form a unified sintered metal body.


20250062091. AC Pulse Control of PCM Switch_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Jean-Luc Erb of San Diego CA (US) for murata manufacturing co., ltd., Bryan Lee Hash of Lake Zurich IL (US) for murata manufacturing co., ltd., Jeffrey A. Dykstra of Woodstock IL (US) for murata manufacturing co., ltd.

IPC Code(s): H01H35/00, H03K17/687, H10N70/00, H10N70/20

CPC Code(s): H01H35/00



Abstract: circuits and methods for increasing the long-term reliability and performance of phase change material (pcm) switches. to overcome the effects of electromigration damage of the resistive heater(s) of a pcm switch and of the pcm itself, and thus improve long-term performance and reliability, embodiments apply an ac control pulse of equal power to a conventional dc control pulse. an embodiment encompasses a pcm switch, including a pcm region including first and second signal ports configured to be coupled to a signal source; a resistive heater adjacent the pcm region and including first and second heater control signal ports; and a source of ac control pulses coupled to the first and second heater control signal ports, the ac control pulses having a first power profile to transform the pcm region into a low resistance state and a second power profile to transform the pcm region into a high resistance state.


20250062157. Shallow Trench Isolation using Porous Semiconductor_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Kouassi Sebastien Kouassi of San Diego CA (US) for murata manufacturing co., ltd., Sinan Goktepeli of Austin TX (US) for murata manufacturing co., ltd.

IPC Code(s): H01L21/762, H01L27/092

CPC Code(s): H01L21/76224



Abstract: fabrication methods and structures for forming integrated circuit (ic) porous semiconductor (�-semi) isolation structures such as shallow trench isolation (sti) and/or deep trench isolation (dti) structures. the methods speed up ic front-end-of-line processing and decrease the cost of ic fabrication. in general, exposed portions of a semiconductor layer are subjected to an electrochemical etching to form �-semi isolation structures; in essence, the in situ semiconductor is restructured to �-semi. the characteristics of �-semi, particularly mesoporous �-semi and microporous �-semi, include good electrical insulation as well as hole trapping capability. accordingly, �-semi used for sti and/or dti structures provides excellent electrical isolation. a first embodiment comprises a “pre-fet” �-semi isolation structure, fabricated before formation of gate, drain, and source structures or regions of a field-effect transistor (fet). a second embodiment comprises a “post-fet” �-semi isolation structure, fabricated after formation of gate, drain, and source structures or regions of a fet.


20250062345. POSITIVE ELECTRODE FOR SECONDARY BATTERY AND SECONDARY BATTERY_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Yuichiro HASHIZUME of Kyoto (JP) for murata manufacturing co., ltd.

IPC Code(s): H01M4/58, H01M4/02, H01M4/36, H01M4/62, H01M10/0525

CPC Code(s): H01M4/5825



Abstract: a secondary battery includes: a positive electrode including a positive electrode active material layer; a negative electrode; and an electrolytic solution, in which the positive electrode active material layer includes: a plurality of positive electrode active material particles; and a dispersant. each of the plurality of positive electrode active material particles includes an olivine type iron-containing phosphate compound, and the dispersant includes a carboxymethylcellulose salt. the plurality of positive electrode active material particles has a volume-based average particle size of 0.6 �m or more, and the dispersant has a weight average molecular weight in terms of polyethylene oxide/polyethylene glycol that satisfies a relationship represented by a formula (1).


20250062345. POSITIVE ELECTRODE FOR SECONDARY BATTERY AND SECONDARY BATTERY_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Yuichiro HASHIZUME of Kyoto (JP) for murata manufacturing co., ltd.

IPC Code(s): H01M4/58, H01M4/02, H01M4/36, H01M4/62, H01M10/0525

CPC Code(s): H01M4/5825



Abstract:

≤135106�+548936  (1)


20250062418. SECONDARY BATTERY AND METHOD OF MANUFACTURING THE SAME_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Takuya HORIE of Kyoto (JP) for murata manufacturing co., ltd., Hikaru KUJIRADA of Kyoto (JP) for murata manufacturing co., ltd.

IPC Code(s): H01M10/0585, H01M10/0525, H01M50/46, H01M50/463

CPC Code(s): H01M10/0585



Abstract: a secondary battery is provided and includes a battery element including a positive electrode and a negative electrode that are stacked with a separator interposed therebetween; and an exterior body housing the battery element, and the separator has two or more first recesses and one or more second recesses disposed between two first recesses adjacent to each other among the two or more first recesses in one periphery facing region (including outer regions x and y) facing a periphery of the positive electrode.


20250062507. SECONDARY BATTERY_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Kenta EGUCHI of Kyoto (JP) for murata manufacturing co., ltd.

IPC Code(s): H01M50/559, H01M10/0525, H01M50/109, H01M50/181, H01M50/184, H01M50/188, H01M50/342, H01M50/55, H01M50/564

CPC Code(s): H01M50/559



Abstract: provided is a secondary battery including: an electrode assembly; an outer case accommodating the electrode assembly; and an electrode terminal disposed on the outer case, the electrode terminal being electrically connected to the electrode assembly via a conductive member. in such a secondary battery, the electrode terminal and the outer case are adhered to each other by an insulating seal member interposed between the electrode terminal and the outer case and provided around an opening of the outer case through which the conductive member passes, and a plan view outline of the electrode terminal on a surface of the electrode terminal in contact with the insulating seal member includes both a linear portion and a curved portion, a plan view outline of the outer case on a surface of the outer case in contact with the insulating seal member includes a curve, and the curved portion of the electrode terminal and a part of the curve of the outer case face each other.


20250062724. AMPLIFIER CIRCUIT AND COMMUNICATION DEVICE_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Naoki MORIKAWA of Kyoto (JP) for murata manufacturing co., ltd., Daisuke WATANABE of Kyoto (JP) for murata manufacturing co., ltd.

IPC Code(s): H03F1/26, H03F1/30

CPC Code(s): H03F1/26



Abstract: an amplifier circuit includes a low-noise amplifier configured to amplify a radio-frequency signal, a switching circuit coupled between the low-noise amplifier and an antenna connection terminal, and a bias circuit configured to supply a direct-current bias voltage to the low-noise amplifier . the switching circuit includes a terminal coupled to the low-noise amplifier and a terminal coupled to the antenna connection terminal, and a transistor including a gate terminal and a p-type first substrate, configured to alternate the connection and disconnection between the terminals and in response to a voltage applied to the gate terminal. the bias circuit, the terminal, and the first substrate are coupled for direct-current conduction.


20250062726. SENSOR AMPLIFIER CIRCUIT_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Aritsugu YAJIMA of Nagaokakyo-shi (JP) for murata manufacturing co., ltd.

IPC Code(s): H03F1/32, G01R15/20, H03F3/45

CPC Code(s): H03F1/3211



Abstract: a sensor amplifier circuit includes a differential amplifier circuit and a compensation circuit. the differential amplifier circuit is configured to amplify a difference voltage between a pair of output signals from a sensor circuit and generate an output voltage. the compensation circuit is configured to generate a compensation signal based on the output voltage to compensate for a non-linear distortion of the output voltage. the differential amplifier circuit includes a current feedback instrumentation amplifier (cfia). the compensation circuit includes one or more operational transconductance amplifiers (otas) configured to output one or more electric currents based on the output voltage and outputs a sum of the one or more electric currents from the one or more operational transconductance amplifiers as the compensation signal. the compensation signal from the compensation circuit is input to a current feedback loop in the current feedback instrumentation amplifier.


20250062739. SOLIDLY-MOUNTED TRANSVERSELY-EXCITED FILM BULK ACOUSTIC RESONATOR WITH RECESSED INTERDIGITAL TRANSDUCER FINGERS_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Viktor Plesski of Gorgier (CH) for murata manufacturing co., ltd.

IPC Code(s): H03H9/02, H03H3/02, H03H9/13, H03H9/54

CPC Code(s): H03H9/02157



Abstract: an acoustic resonator is provided that includes a substrate; an acoustic bragg reflector supported by the substrate; a piezoelectric layer above the acoustic bragg reflector and opposite the substrate, the piezoelectric plate having at least one groove extending into a surface thereof; and an interdigital transducer (idt) having a plurality of interleaved fingers with at least one finger is disposed in the at least one groove of the piezoelectric plate, respectively.


20250062747. TRANSVERSELY-EXCITED FILM BULK ACOUSTIC RESONATORS WITH MULTIPLE PIEZOELECTRIC MEMBRANE THICKNESSES ON THE SAME CHIP_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Andrew KAY of Provo UT (US) for murata manufacturing co., ltd., Patrick TURNER of Portola Valley CA (US) for murata manufacturing co., ltd., Albert CARDONA of Santa Barbara CA (US) for murata manufacturing co., ltd.

IPC Code(s): H03H9/54, H03H3/02, H03H9/02, H03H9/13, H03H9/17, H03H9/205, H03H9/56

CPC Code(s): H03H9/54



Abstract: a filter device is provided that includes a substrate having a surface; and a piezoelectric layer over a first cavity and a second cavity. the piezoelectric layer is attached to the surface of the substrate either directly or via one or more intermediate layers. an area of the piezoelectric layer has a first thickness for at least one first resonator that forms at least one first membrane over the first cavity. moreover, an area of the piezoelectric layer has a second thickness for at least one second resonator that forms at least one second membrane over the second cavity, the second thickness being thinner than the first thickness. a bottom of the first cavity that is opposite from the at least one first membrane extends farther down away from the piezoelectric layer than a bottom of the second cavity that is opposite from the at least one second membrane.


20250063780. Vertical Nano-Pillar Transistor Structures for 3-D ICS_simplified_abstract_(murata manufacturing co., ltd.)

Inventor(s): Sinan Goktepeli of Austin TX (US) for murata manufacturing co., ltd., Kouassi Sebastien Kouassi of San Diego CA (US) for murata manufacturing co., ltd.

IPC Code(s): H01L29/06, H01L29/08, H01L29/66, H01L29/78

CPC Code(s): H01L29/0673



Abstract: nano-pillar field-effect transistor (fet) structure that include one or more of the following characteristics: vertical device structure and vertical current flow; vertically displaced source and drain regions; different nanowire/nanosheet geometries and dimensions for different nano-pillar embodiments; and/or body contacts made through wide nano-pillar structures. in addition, by utilizing layer transfer techniques, direct access to drain contacts of a nano-pillar fet structure is available, which enables a significant improvement in transistor performance (e.g., lower rresistance, faster switching speed). an additional advantage of the novel nano-pillar fet structures is that available top and bottom contacts may be used in various 3-d integrated circuit structures, such as by using layer transfer and/or hybrid bonding.


Murata Manufacturing Co., Ltd. patent applications on February 20th, 2025