Micron technology, inc. (20240231617). MEMORY DEVICE PROGRAMMING TECHNIQUE FOR INCREASED BITS PER CELL simplified abstract

MEMORY DEVICE PROGRAMMING TECHNIQUE FOR INCREASED BITS PER CELL

Organization Name

micron technology, inc.

Inventor(s)

Tomoharu Tanaka of Yokohama (JP)

Huai-Yuan Tseng of San Ramon CA (US)

Dung V. Nguyen of San Jose CA (US)

Kishore Kumar Muchherla of Fremont CA (US)

Eric N. Lee of San Jose CA (US)

Akira Goda of Tokyo (JP)

James Fitzpatrick of Laguna Niguel CA (US)

Dave Ebsen of Minnetonka MN (US)

MEMORY DEVICE PROGRAMMING TECHNIQUE FOR INCREASED BITS PER CELL - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240231617 titled 'MEMORY DEVICE PROGRAMMING TECHNIQUE FOR INCREASED BITS PER CELL

The memory device described in the abstract is capable of storing data in memory cells and merging subsets of data from different memory cells without erasing the target cell.

• The controller in the memory device can program different numbers of bits to different memory cells.
• After programming data to multiple memory cells, the controller can merge a subset of data from one cell to another without erasing the target cell.
• This process allows for efficient data storage and management within the memory device.
• By merging data without erasing cells, the memory device can optimize storage capacity and access speed.
• This innovation enhances the functionality and performance of memory devices in various applications.

Potential Applications: - Data storage systems - Embedded systems - Mobile devices - Internet of Things (IoT) devices

Problems Solved: - Efficient data storage and management - Optimized memory usage - Enhanced performance of memory devices

Benefits: - Increased storage capacity - Improved data access speed - Enhanced overall performance of memory devices

Commercial Applications: Title: "Enhanced Memory Device for Efficient Data Storage" This technology can be used in various commercial applications such as: - Consumer electronics - Automotive systems - Industrial automation - Cloud computing services

Questions about the technology: 1. How does the memory device ensure data integrity during the merging process? 2. What are the potential limitations of merging data in memory cells without erasing them?

Frequently Updated Research: Stay updated on the latest advancements in memory device technology to leverage the benefits of efficient data storage and management.

Original Abstract Submitted

a memory device includes an array of memory cells and a controller configured to access the array of memory cells. the controller is further configured to program a first number of bits to a first memory cell of the array of memory cells and program a second number of bits to a second memory cell of the array of memory cells. the controller is further configured to following a period after programming the second number of bits to the second memory cell, merge at least a subset of the first number of bits stored in the first memory cell to the second number of bits stored in the second memory cell without erasing the second memory cell such that the second number of bits plus at least the subset of the first number of bits are stored in the second memory cell.