Micron technology, inc. (20240224825). LOW RESISTANCE CROSSPOINT ARCHITECTURE simplified abstract

LOW RESISTANCE CROSSPOINT ARCHITECTURE

Organization Name

micron technology, inc.

Inventor(s)

Rajasekhar Venigalla of Boise ID (US)

Patrick M. Flynn of Boise ID (US)

Josiah Jebaraj Johnley Muthuraj of Meridian ID (US)

Efe Sinan Ege of Boise ID (US)

Kevin Lee Baker of Boise ID (US)

Tao Nguyen of Boise ID (US)

Davis Weymann of Boise ID (US)

LOW RESISTANCE CROSSPOINT ARCHITECTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240224825 titled 'LOW RESISTANCE CROSSPOINT ARCHITECTURE

The patent application describes methods, systems, and devices for a low resistance crosspoint architecture. A manufacturing system deposits a thermal barrier material, followed by a first layer of a first conductive material, on a layered assembly including electrode materials and a memory material. The system then etches a gap in the assembly and deposits a second conductive material to form a conductive via.

• Manufacturing system deposits thermal barrier material and conductive materials on a layered assembly.
• Etching process forms a gap in the assembly.
• Second conductive material is deposited to create a conductive via.
• The conductive via extends above the thermal barrier material.
• This architecture aims to reduce resistance in crosspoint structures.

Potential Applications: - Memory devices - Integrated circuits - Nanoelectronics

Problems Solved: - High resistance in crosspoint architectures - Improving performance of memory devices

Benefits: - Enhanced conductivity - Improved efficiency - Increased data storage capacity

Commercial Applications: Title: "Innovative Crosspoint Architecture for Enhanced Memory Devices" This technology can be utilized in the production of memory devices, integrated circuits, and nanoelectronics, leading to improved performance and efficiency in various electronic applications.

Questions about the technology: 1. How does the low resistance crosspoint architecture improve the performance of memory devices? - The architecture reduces resistance, allowing for faster data transfer and increased efficiency in memory devices.

2. What are the potential commercial implications of implementing this technology in integrated circuits? - Implementing this technology in integrated circuits can lead to improved functionality and performance, making them more competitive in the market.

Original Abstract Submitted

methods, systems, and devices for a low resistance crosspoint architecture are described. a manufacturing system may deposit a thermal barrier material, followed by a first layer of a first conductive material, on a layered assembly including a patterned layer of electrode materials and a patterned layer of a memory material. the manufacturing system may etch a first area of the layered assembly to form a gap in the first layer of the first conductive material, the thermal barrier material, the patterned layer of the memory material, and the patterned layer of electrode materials. the manufacturing system may deposit a second conductive material to form a conductive via in the gap, where the conductive via extends to a height within the layered assembly that is above the thermal barrier material.