Micron technology, inc. (20240203496). Memory Array Comprising Strings Of Memory Cells And Methods Including A Method Used In Forming A Memory Array Comprising Strings Of Memory Cells simplified abstract
Memory Array Comprising Strings Of Memory Cells And Methods Including A Method Used In Forming A Memory Array Comprising Strings Of Memory Cells
Organization Name
Inventor(s)
John D. Hopkins of Meridian ID (US)
Alyssa N. Scarbrough of Boise ID (US)
Memory Array Comprising Strings Of Memory Cells And Methods Including A Method Used In Forming A Memory Array Comprising Strings Of Memory Cells - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240203496 titled 'Memory Array Comprising Strings Of Memory Cells And Methods Including A Method Used In Forming A Memory Array Comprising Strings Of Memory Cells
The abstract describes a method for forming a memory array with vertically-alternating tiers and memory-block regions with trenches in between. The method involves filling void spaces in the tiers with conductive material, etching the material in certain regions, and then filling those regions with a second conductive material.
- Memory array formed with vertically-alternating tiers and memory-block regions
- Tiers have different vertical thicknesses
- Channel-material strings of memory cells extend through the tiers
- First conductive material is formed in void spaces in the tiers
- Material fills smaller tier thickness in memory-block regions
- Material less-than-fills larger tier thickness in memory-block regions
- Isotropically etching of material in larger tier thickness regions
- Filling etched regions with second conductive material
Potential Applications: - Memory storage devices - Semiconductor manufacturing - Data storage systems
Problems Solved: - Efficient memory array formation - Improved memory cell connectivity - Enhanced data storage capacity
Benefits: - Increased memory array density - Enhanced data storage performance - Cost-effective memory array production
Commercial Applications: Title: Advanced Memory Array Technology for High-Performance Data Storage This technology can be used in the production of high-density memory storage devices for various applications, including smartphones, computers, and servers. The improved memory array formation process can lead to faster and more reliable data storage solutions, making it highly valuable in the semiconductor industry.
Prior Art: Further research can be conducted in the field of memory array formation methods, semiconductor manufacturing processes, and data storage technologies to explore prior art related to this innovative method.
Frequently Updated Research: Researchers are constantly exploring new methods and materials for memory array formation to enhance data storage capabilities and improve memory cell connectivity. Stay updated on the latest advancements in semiconductor manufacturing and memory storage technologies to leverage the benefits of this innovative approach.
Questions about Memory Array Formation: 1. How does the method of isotropically etching conductive material in memory-block regions improve memory array performance? 2. What are the potential challenges in scaling up this memory array formation method for mass production?
Original Abstract Submitted
a method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers comprising laterally-spaced memory-block regions having horizontally-elongated trenches there-between. two of the first tiers have different vertical thicknesses relative one another. channel-material strings of memory cells extend through the first tiers and the second tiers. through the horizontally-elongated trenches, first conductive material is formed in void space in the two first tiers. the first conductive material fills the first tier of the two first tiers that has a smaller of the different vertical thicknesses in individual of the memory-block regions. the first conductive material less-than-fills the first tier of the two first tiers that has a larger of the different vertical thicknesses in the individual memory-block regions. through the horizontally-elongated trenches, the first conductive material is isotropically etched from the first tier having the larger vertical thickness in the individual memory-block regions to leave the first conductive material in the first tier having the smaller vertical thickness in the individual memory-block regions. after the isotropically etching of the first conductive material and through the horizontally-elongated trenches, second conductive material is formed in the first tier having the larger vertical thickness in the individual memory-block regions. other embodiments, including structure independent of method, are disclosed.
